From nobody Sun Feb 8 10:04:39 2026 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B312F18E34B; Tue, 20 Aug 2024 10:40:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724150444; cv=none; b=vFx30GmzVS1B/+iNH8LWHwfKdNH3zPQXFtDtFxINbRWDDcsovOAZmnt1D+TCkJKCZAfOeGBQV5WSKJI79G76vvesyYFFxMkyU097IQ+6dP+jawRUuLPH0b0zjtPum6ke4Ptu4iAkYwtImlJHPLUPZl4gOQhcrkmtSG7D2gLmV50= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724150444; c=relaxed/simple; bh=uqfDo4IJwd422GFXnmU2KcKPNa5l/QC/vTlHZ7o8v0Q=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=L2DgQqxCzozIXMDQy/ED/ANwufSobXyEhowoX/TnkiB2hBTTSi/khDhPAfUTc1Ll/qERA9nOFaz2YqXRcj/18VwUXJB1FKw2eCXpNfGcUh5DfbQVWY85Ov7Fi69IHzP102SzIKxhiwf9WveZZSbQCBRSIREwCbnM/FsMg3cu/XE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=QpCoVNTn; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="QpCoVNTn" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 47KAeZrC060087; Tue, 20 Aug 2024 05:40:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724150435; bh=RPiPfY0jU4ol3aODUmIvh9WAkJ+AHOaJgSEA4myuTac=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QpCoVNTnxqkTTia86BG1JOdJ1tJj9eaVd/870FAULcNCUXTV72aL1oiRvU1WaKe4F i32kBz9LrUFf8Y1gMIquXwK8sPi3jzgMqSRBOaA6uAQfsrQ2UnikPFU3579jfDwkvF /tokao1Oez/VHExHdiYF42W3xDoCnjzmwoUfWGnI= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 47KAeZAW019815 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Aug 2024 05:40:35 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 20 Aug 2024 05:40:34 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 20 Aug 2024 05:40:34 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47KAeYDu003132; Tue, 20 Aug 2024 05:40:34 -0500 From: Hari Nagalla To: , , , , , , CC: , , Subject: [PATCH v4 1/4] arm64: dts: k3-am62a-main: Add C7xv device node Date: Tue, 20 Aug 2024 05:40:31 -0500 Message-ID: <20240820104034.15607-2-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240820104034.15607-1-hnagalla@ti.com> References: <20240820104034.15607-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jai Luthra AM62A SoCs have a C7xv DSP subsystem with Analytics engine capability. This subsystem is intended for deep learning purposes. Define the device node for C7xv DSP. Signed-off-by: Jai Luthra Signed-off-by: Hari Nagalla Reviewed-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index 916fcf3cc57d..818005b8954d 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -1088,4 +1088,15 @@ vpu: video-codec@30210000 { clocks =3D <&k3_clks 204 2>; power-domains =3D <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>; }; + + c7x_0: dsp@7e000000 { + compatible =3D "ti,am62a-c7xv-dsp"; + reg =3D <0x00 0x7e000000 0x00 0x00100000>; + reg-names =3D "l2sram"; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <208>; + ti,sci-proc-ids =3D <0x04 0xff>; + resets =3D <&k3_reset 208 1>; + firmware-name =3D "am62a-c71_0-fw"; + }; }; --=20 2.34.1 From nobody Sun Feb 8 10:04:39 2026 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8C5918E34B; Tue, 20 Aug 2024 10:40:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.248 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724150449; cv=none; b=WDbJn50sWZGgYieRmuXFyBkV92zO1pR6IuC4N19fZ6+6zccM6FP1bgkx/VvKcBOKhfGQ8nLfcLDKCN4fLiyNYH3nZlE0U6eEdyLMLmEsZWNXSXbkC6AebBP1K7KxlrqdJbdWrcHTenwq9jbl0VT7KTG5Cu5c5x9uRnhvTQNrKKY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724150449; c=relaxed/simple; bh=5RVPzMy/QPSlQXb8jYE2+R+rK4CFR75JBYXWa2TedWc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NkOI6t6TaZGNZkR0YkUWSWBZl1m29J0zCogzKoUtFAwtRC3qfU1v3PaMhWrWKK+3bmhpxt5Vz7J03gm2GqRX5oJbY3FDL2i+mfLHIWlM2lFgsTOpxXDfqLxg5rQeqSEawspjpcwgvj8TeiePNYCFXs5ZqW4XrUuCeQfROp5emgA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=h0+MPihU; arc=none smtp.client-ip=198.47.23.248 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="h0+MPihU" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 47KAeZGN102476; Tue, 20 Aug 2024 05:40:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724150435; bh=lRj86cxU3Xj9ynRAeceeFgH8EJzU6nWYxAQZqFM/a68=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=h0+MPihUUH5Cwmi48eZyBE4Ul802LPUuN+Wl3thM8Hm9vULHBCBuPcjhcCAPXQ7Ai fSPTg8MsQBcXsSdM67oRnr8WNTExg+XtMIf7jGK/RUSOqIWgrrtyKpw4s554cqzUnx E9LBd1mI21adcOkIqKP0an/nW/mLvf9j8tLu6di0= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 47KAeZw5072467 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Aug 2024 05:40:35 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 20 Aug 2024 05:40:35 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 20 Aug 2024 05:40:35 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47KAeYoL003145; Tue, 20 Aug 2024 05:40:35 -0500 From: Hari Nagalla To: , , , , , , CC: , , Subject: [PATCH v4 2/4] arm64: dts: k3-am62a-mcu: Add R5F remote proc node Date: Tue, 20 Aug 2024 05:40:32 -0500 Message-ID: <20240820104034.15607-3-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240820104034.15607-1-hnagalla@ti.com> References: <20240820104034.15607-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" AM62A SoCs have a single R5F core in the MCU voltage domain. The MCU domain also has a 512KB sram memory, the R5F core can use for applications needing fast memory access. Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 35 ++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts= /ti/k3-am62a-mcu.dtsi index 8c36e56f4138..803da3cce336 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi @@ -6,6 +6,17 @@ */ =20 &cbass_mcu { + mcu_ram: sram@79100000 { + compatible =3D "mmio-sram"; + reg =3D <0x00 0x79100000 0x00 0x80000>; + ranges =3D <0x00 0x00 0x79100000 0x80000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + + mcu1-sram@0 { + reg =3D <0x0 0x80000>; + }; + }; mcu_pmx0: pinctrl@4084000 { compatible =3D "pinctrl-single"; reg =3D <0x00 0x04084000 0x00 0x88>; @@ -167,4 +178,28 @@ mcu_mcan1: can@4e18000 { bosch,mram-cfg =3D <0x0 128 64 64 64 64 32 32>; status =3D "disabled"; }; + + mcu_r5fss0: r5fss@79000000 { + compatible =3D "ti,am62-r5fss"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x79000000 0x00 0x79000000 0x8000>, + <0x79020000 0x00 0x79020000 0x8000>; + power-domains =3D <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>; + mcu_r5fss0_core0: r5f@79000000 { + compatible =3D "ti,am62-r5f"; + reg =3D <0x79000000 0x00008000>, + <0x79020000 0x00008000>; + reg-names =3D "atcm", "btcm"; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <9>; + ti,sci-proc-ids =3D <0x03 0xff>; + resets =3D <&k3_reset 9 1>; + firmware-name =3D "am62a-mcu-r5f0_0-fw"; + ti,atcm-enable =3D <0>; + ti,btcm-enable =3D <1>; + ti,loczrama =3D <0>; + sram =3D <&mcu_ram>; + }; + }; }; --=20 2.34.1 From nobody Sun Feb 8 10:04:39 2026 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3490D18D636; Tue, 20 Aug 2024 10:40:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724150446; cv=none; b=qe9VShtBsS7Vr2pkudrPWbxkpHnVCqI1qoPkFzzn+6xjHvQd7KN3dlzMj8+e82RJ1NBkA+zIJ6ZNqAEfk/QicsCEPul9Vyr/VZJDRk4bqeHKGmQo/EDBEM0gfjmnrK2OpT5s/NiIZS3QTgYMUWQ9Df9YQRQGoWDVZPH/n9cdGyc= ARC-Message-Signature: i=1; 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Tue, 20 Aug 2024 05:40:35 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47KAeZkN003150; Tue, 20 Aug 2024 05:40:35 -0500 From: Hari Nagalla To: , , , , , , CC: , , Subject: [PATCH v4 3/4] arm64: dts: k3-am62a-wakeup: Add R5F device node Date: Tue, 20 Aug 2024 05:40:33 -0500 Message-ID: <20240820104034.15607-4-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240820104034.15607-1-hnagalla@ti.com> References: <20240820104034.15607-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Devarsh Thakkar AM62A SoCs have a single R5F core in waekup domain. This core is also used as a device manager for the SoC. Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 23 +++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/= dts/ti/k3-am62a-wakeup.dtsi index f5ac101a04df..c4319986e660 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi @@ -76,6 +76,29 @@ wkup_rti0: watchdog@2b000000 { status =3D "reserved"; }; =20 + wkup_r5fss0: r5fss@78000000 { + compatible =3D "ti,am62-r5fss"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges =3D <0x78000000 0x00 0x78000000 0x8000>, + <0x78100000 0x00 0x78100000 0x8000>; + power-domains =3D <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>; + wkup_r5fss0_core0: r5f@78000000 { + compatible =3D "ti,am62-r5f"; + reg =3D <0x78000000 0x00008000>, + <0x78100000 0x00008000>; + reg-names =3D "atcm", "btcm"; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <121>; + ti,sci-proc-ids =3D <0x01 0xff>; + resets =3D <&k3_reset 121 1>; + firmware-name =3D "am62-wkup-r5f0_0-fw"; + ti,atcm-enable =3D <1>; + ti,btcm-enable =3D <1>; + ti,loczrama =3D <1>; + }; + }; + wkup_vtm0: temperature-sensor@b00000 { compatible =3D "ti,j7200-vtm"; reg =3D <0x00 0xb00000 0x00 0x400>, --=20 2.34.1 From nobody Sun Feb 8 10:04:39 2026 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CC9718CC1F; Tue, 20 Aug 2024 10:40:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724150445; cv=none; b=tPLGddKv0jC/1hOBC6OUiSkFmRQf/ZGaksSNiUn8WF7q6ec4+YePZBuh4CJM7L+bfJgUoUYV7yQffUA7iaTHXcvBYtLY0FPikbmfYweHzQYdCi/D02yeUmGjEvC+yl5CVXo+AWGsqyoiZEenoEMvYlAkuPULFvWatLpvVKwcFY0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Tue, 20 Aug 2024 05:40:35 -0500 Received: from localhost ([10.249.48.175]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47KAeZXh107627; Tue, 20 Aug 2024 05:40:35 -0500 From: Hari Nagalla To: , , , , , , CC: , , Subject: [PATCH v4 4/4] arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes Date: Tue, 20 Aug 2024 05:40:34 -0500 Message-ID: <20240820104034.15607-5-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240820104034.15607-1-hnagalla@ti.com> References: <20240820104034.15607-1-hnagalla@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Devarsh Thakkar Reserve memory for remote rpoc IPC and bind the mailbox assignments for each remote proc. Two memory regions are reserved for each remote processor. The first region of 1MB of memory is used for Vring shared buffers and the second region is used as external memory to the remote processor, resource table and as tracebuffer. Signed-off-by: Devarsh Thakkar Signed-off-by: Hari Nagalla --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 68 +++++++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index 67faf46d7a35..fb350b578899 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -61,11 +61,40 @@ secure_ddr: optee@9e800000 { no-map; }; =20 + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9c800000 0x00 0x100000>; + no-map; + }; + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { compatible =3D "shared-dma-pool"; reg =3D <0x00 0x9c900000 0x00 0x01e00000>; no-map; }; + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9b800000 0x00 0x100000>; + no-map; + }; + + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x9b900000 0x00 0x0f00000>; + no-map; + }; + + c7x_0_dma_memory_region: c7x-dma-memory@99800000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x99800000 0x00 0x100000>; + no-map; + }; + + c7x_0_memory_region: c7x-memory@99900000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x00 0x99900000 0x00 0x01f00000>; + no-map; + }; }; =20 vmain_pd: regulator-0 { @@ -728,3 +757,42 @@ dpi1_out: endpoint { }; }; }; + +&mailbox0_cluster0 { + mbox_r5_0: mbox-r5-0 { + ti,mbox-rx =3D <0 0 0>; + ti,mbox-tx =3D <1 0 0>; + }; +}; + +&mailbox0_cluster1 { + mbox_c7x_0: mbox-c7x-0 { + ti,mbox-rx =3D <0 0 0>; + ti,mbox-tx =3D <1 0 0>; + }; +}; + +&mailbox0_cluster2 { + mbox_mcu_r5_0: mbox-mcu-r5-0 { + ti,mbox-rx =3D <0 0 0>; + ti,mbox-tx =3D <1 0 0>; + }; +}; + +&c7x_0 { + mboxes =3D <&mailbox0_cluster1>, <&mbox_c7x_0>; + memory-region =3D <&c7x_0_dma_memory_region>, + <&c7x_0_memory_region>; +}; + +&wkup_r5fss0_core0 { + mboxes =3D <&mailbox0_cluster0>, <&mbox_r5_0>; + memory-region =3D <&wkup_r5fss0_core0_dma_memory_region>, + <&wkup_r5fss0_core0_memory_region>; +}; + +&mcu_r5fss0_core0 { + mboxes =3D <&mailbox0_cluster2>, <&mbox_mcu_r5_0>; + memory-region =3D <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; +}; --=20 2.34.1