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Mon, 19 Aug 2024 15:08:06 -0700 From: Shanker Donthineni To: James Morse CC: Catalin Marinas , Shanker Donthineni , Rohit Mathew , , , , Vikram Sethi Subject: [PATCH] arm_mpam: resctrl: Update only requested configuration Date: Mon, 19 Aug 2024 17:07:52 -0500 Message-ID: <20240819220752.201815-1-sdonthineni@nvidia.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF0000231D:EE_|SN7PR12MB6984:EE_ X-MS-Office365-Filtering-Correlation-Id: d557f863-a273-4687-4eaf-08dcc09b7325 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?G8Uk1baU+nkh+UCr9HBGOnviPEutCfBo0VJdbLYW7yQjyrE6akFI/ZSMOKYu?= =?us-ascii?Q?971KkJZLL0AHXdzSwtb3Qk9pAMU7d0z9DE22fUqgVEAqUBl4XYQuMKj8k/oh?= =?us-ascii?Q?QgOuInjNVlGDhynxn0x+HJ9/lmqcnH+cc35RGlnkgzZvEoUtge0w25aoSU1z?= =?us-ascii?Q?8m3WFzqgTT6lhikHaTSyrConrJgmQdUiu+qGkgW8qtSRdcywTCexaBlZTGOI?= =?us-ascii?Q?hTfpzAVk5CW6i86QxFW6kj1D4RTGmBLDgttYFT/qhZMS4kptmZYVoUWT6KkN?= =?us-ascii?Q?TbgpJ53tC454MA1ZE29fJZeB3PPhg0NWmAJDxa5TZWV1WSZdV7x97f7dQ5LR?= =?us-ascii?Q?WSMl7LCI9JpjYxUvKZ1YE83yjAd3jRRbVat/uVKU0D5LHKRlF4zgUoTXNneJ?= =?us-ascii?Q?q5JJ2i2QoOkcmsSv1LqYLIgt/UErrjQ17zSbgujWHJnQ86Uat0wABRB8rDaM?= =?us-ascii?Q?J6VXz2SgKMUvhMLGbQDPS3/sZiS2Jne2hp5BZhdTs0VAMuB9j79JbzQrf1q7?= =?us-ascii?Q?b0jgs9xXKob9qIhQxfGpB/N8TSuvYZI5+ewViQyD4XA/VM9h3cOQN+6sYBGR?= =?us-ascii?Q?RNhR5GHjkHfomLXCC8bTUR1iu2HoWdicMXp7/J10G4DCey6gjiVTjCO5EMJV?= =?us-ascii?Q?hUth3xG5Mv0acF1NIiOqp7Z5nlAGwQI8BWlgMrQcquHU5TK7mWmiVHi1/FdH?= =?us-ascii?Q?ysKzeVPUvLQpiUsv9KnXOYg0aO8N05KmDO6qnqR74jIVESe+Gvuefsnf9+oO?= =?us-ascii?Q?qEmdiow+q8nRptwMP/bU86se+TF6ME77242+2EogKUmvDoeQfgJUqmgoicdu?= =?us-ascii?Q?5Tyo2aZJ3qyEN18e80KFhU6pZn64wedAFYohAN5m3J4iDxldrnxywhK+7sBu?= =?us-ascii?Q?lzSsJEiDQhKuxBykNWKELxe+HolOMyebKJq4l1X01P8xXC1D4aoXJJocV8ij?= =?us-ascii?Q?XWS+R5dWsYn0sOEBRX50ELDWymI9+oBF7gcfieXYMZ8yKl4omfKn/DGDx2rM?= =?us-ascii?Q?awjvpI9Nbb9fnYW5XUIoFrw1ttO7P5g0xy9f1h15BIz6F3NS+ehYM5qonK4V?= =?us-ascii?Q?eX/IDsu3IawDCrDGzBMqRD7jAK2tHPJm1Vgc5BmHJQU9TiBrY1yWk1W2yOrg?= =?us-ascii?Q?4z/6kLSHsQCKSF7cUuartsyjg9c7tZ4HjWgbklto6mSUSzL9QR249bfJMgch?= =?us-ascii?Q?B84k6Zu6syoE+zHfXHTLYiMd8Z3+dn1yEJTQ2JtOoOp2EtwDWcXbdZeLOxr2?= =?us-ascii?Q?Gimh0cOqZ9nNNne/s6jTi1RlJeLukdpoSGAGXZhvvbAe/jNr6ck9u9+HyGgF?= =?us-ascii?Q?pnyvCDEmXHq1Bm+F4LT5af4aKtKR/vjfSBQoqrwX+eCYCCvzt9bXqdXSRlSz?= =?us-ascii?Q?5LJlnaDN7zcg63jediY++a6Duu4u6BsVKgYUhET3zjDBg7RvNnhxbpvkACLn?= =?us-ascii?Q?gCaL1vsgHGapcYvJGVPqjFeswkIdh9Sv?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Aug 2024 22:08:26.2806 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d557f863-a273-4687-4eaf-08dcc09b7325 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF0000231D.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6984 Content-Type: text/plain; charset="utf-8" The resctrl has helper functions for updating CPOR and MBW configuration updates. While the existing resctrl_arch_update_one() effectively updates the specified configuration as intended, it inadvertently overrides other configurations with default values. Example bandwdith value is not applied: root# cat /sys/fs/resctrl/schemata MB:1=3D100 L3:1=3Dfff root# echo -e "L3:1=3Dfff\nMB:1=3D50" > /sys/fs/resctrl/schemata root# cat /sys/fs/resctrl/schemata MB:1=3D100 L3:1=3Dfff Fix the potential loss of accuracy during the conversion of MBW_MAX from percentage to fixed-point representation, and vice versa. The updated functions provide fixed-point values that closely align with the values specified in the MPAM specification, Table 9-3 for Fraction Widths And Hex Representation. Before this fix: root# echo -e "MB:1=3D1" > /sys/fs/resctrl/schemata root# cat /sys/fs/resctrl/schemata MB:1=3D000 L3:1=3Dfff root# echo -e "MB:1=3D2" > /sys/fs/resctrl/schemata root# cat /sys/fs/resctrl/schemata MB:1=3D001 L3:1=3Dfff root# echo -e "MB:1=3D3" > /sys/fs/resctrl/schemata root@pset# cat /sys/fs/resctrl/schemata MB:1=3D001 L3:1=3Dfff With this patch: root# echo -e "MB:1=3D1" > /sys/fs/resctrl/schemata root# cat /sys/fs/resctrl/schemata MB:1=3D001 L3:1=3Dfff root# echo -e "MB:1=3D2" > /sys/fs/resctrl/schemata root# cat /sys/fs/resctrl/schemata MB:1=3D002 L3:1=3Dfff root# echo -e "MB:1=3D3" > /sys/fs/resctrl/schemata root@pset# cat /sys/fs/resctrl/schemata MB:1=3D003 L3:1=3Dfff Signed-off-by: Shanker Donthineni --- drivers/platform/arm64/mpam/mpam_resctrl.c | 49 ++++------------------ 1 file changed, 7 insertions(+), 42 deletions(-) diff --git a/drivers/platform/arm64/mpam/mpam_resctrl.c b/drivers/platform/= arm64/mpam/mpam_resctrl.c index 258a39e90f2e..f4da24cad600 100644 --- a/drivers/platform/arm64/mpam/mpam_resctrl.c +++ b/drivers/platform/arm64/mpam/mpam_resctrl.c @@ -574,23 +574,7 @@ static u32 mbw_pbm_to_percent(const unsigned long mbw_= pbm, struct mpam_props *cp =20 static u32 mbw_max_to_percent(u16 mbw_max, struct mpam_props *cprops) { - int bit; - u8 num_bits =3D 0; - u32 divisor =3D 2, value =3D 0; - - for (bit =3D 16; bit > (16 - cprops->bwa_wd); bit--) { - if (mbw_max & BIT(bit - 1)) { - num_bits++; - value +=3D MAX_MBA_BW / divisor; - } - divisor <<=3D 1; - } - - /* Lest user-space get confused... */ - if (num_bits =3D=3D cprops->bwa_wd) - return 100; - - return value; + return DIV_ROUND_CLOSEST((mbw_max + 1) * 100, 65536); } =20 static u32 percent_to_mbw_pbm(u8 pc, struct mpam_props *cprops) @@ -605,31 +589,7 @@ static u32 percent_to_mbw_pbm(u8 pc, struct mpam_props= *cprops) =20 static u16 percent_to_mbw_max(u8 pc, struct mpam_props *cprops) { - u8 bit; - u32 divisor =3D 2, value =3D 0, milli_pc; - - /* - * To ensure 100% sets all the bits, we need to the contribution - * of bits worth less than 1%. Scale everything up by 1000. - */ - milli_pc =3D pc * 1000; - - for (bit =3D 16; bit > (16 - cprops->bwa_wd); bit--) { - if (milli_pc >=3D MAX_MBA_BW * 1000 / divisor) { - milli_pc -=3D MAX_MBA_BW * 1000 / divisor; - value |=3D BIT(bit - 1); - } - divisor <<=3D 1; - - if (!milli_pc) - break; - } - - /* Mask out unimplemented bits */ - if (cprops->bwa_wd <=3D 16) - value &=3D GENMASK(15, 16 - cprops->bwa_wd); - - return value; + return (((pc * 65536) / 100) - 1); } =20 /* Find the L3 component that holds this CPU */ @@ -1167,6 +1127,9 @@ int resctrl_arch_update_one(struct rdt_resource *r, s= truct rdt_ctrl_domain *d, if (!r->alloc_capable || partid >=3D resctrl_arch_get_num_closid(r)) return -EINVAL; =20 + /* Update with requested configuration only */ + cfg =3D dom->comp->cfg[partid]; + switch (r->rid) { case RDT_RESOURCE_L2: case RDT_RESOURCE_L3: @@ -1182,6 +1145,8 @@ int resctrl_arch_update_one(struct rdt_resource *r, s= truct rdt_ctrl_domain *d, } else if (mpam_has_feature(mpam_feat_mbw_max, cprops)) { cfg.mbw_max =3D percent_to_mbw_max(cfg_val, cprops); mpam_set_feature(mpam_feat_mbw_max, &cfg); + /* Resctrl doesn't support MBW_MIN yet, use default value */ + mpam_clear_feature(mpam_feat_mbw_min, &cfg.features); break; } fallthrough; --=20 2.25.1