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([178.197.215.209]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-371898498casm8461112f8f.42.2024.08.18.10.28.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Aug 2024 10:28:38 -0700 (PDT) From: Krzysztof Kozlowski To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kunihiko Hayashi , Masami Hiramatsu , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH] dt-bindings: phy: socionext,uniphier: add top-level constraints Date: Sun, 18 Aug 2024 19:28:35 +0200 Message-ID: <20240818172835.121757-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for clock-names and reset-names. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Kunihiko Hayashi Reviewed-by: Rob Herring (Arm) --- .../bindings/phy/socionext,uniphier-ahci-phy.yaml | 8 ++++++-- .../bindings/phy/socionext,uniphier-pcie-phy.yaml | 8 ++++++-- .../bindings/phy/socionext,uniphier-usb3hs-phy.yaml | 7 +++++-- .../bindings/phy/socionext,uniphier-usb3ss-phy.yaml | 7 +++++-- 4 files changed, 22 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-= phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-ph= y.yaml index de3cffc850bc..e34b875a1bb8 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml @@ -30,13 +30,17 @@ properties: minItems: 1 maxItems: 2 =20 - clock-names: true + clock-names: + minItems: 1 + maxItems: 6 =20 resets: minItems: 2 maxItems: 6 =20 - reset-names: true + reset-names: + minItems: 2 + maxItems: 6 =20 allOf: - if: diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-= phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-ph= y.yaml index b3ed2f74a414..9fc0e87c508e 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml @@ -31,13 +31,17 @@ properties: minItems: 1 maxItems: 2 =20 - clock-names: true + clock-names: + minItems: 1 + maxItems: 2 =20 resets: minItems: 1 maxItems: 2 =20 - reset-names: true + reset-names: + minItems: 1 + maxItems: 2 =20 socionext,syscon: $ref: /schemas/types.yaml#/definitions/phandle diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3h= s-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3h= s-phy.yaml index 2107d98ace15..25c4159f86e4 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.y= aml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.y= aml @@ -34,12 +34,15 @@ properties: minItems: 2 maxItems: 3 =20 - clock-names: true + clock-names: + minItems: 2 + maxItems: 3 =20 resets: maxItems: 2 =20 - reset-names: true + reset-names: + maxItems: 2 =20 vbus-supply: description: A phandle to the regulator for USB VBUS diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3s= s-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3s= s-phy.yaml index 8f5aa6238bf3..1f663e9901da 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.y= aml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.y= aml @@ -35,12 +35,15 @@ properties: minItems: 2 maxItems: 3 =20 - clock-names: true + clock-names: + minItems: 2 + maxItems: 3 =20 resets: maxItems: 2 =20 - reset-names: true + reset-names: + maxItems: 2 =20 vbus-supply: description: A phandle to the regulator for USB VBUS, only for USB host --=20 2.43.0