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([2a01:4262:1ab:c:bbf4:eba3:898f:7501]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a80f411bdcbsm182316866b.105.2024.08.14.07.56.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Aug 2024 07:56:50 -0700 (PDT) From: Emil Renner Berthing To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Anup Patel Cc: Thomas Gleixner , Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou Subject: [PATCH v1 8/9] Revert "irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz()" Date: Wed, 14 Aug 2024 16:56:40 +0200 Message-ID: <20240814145642.344485-9-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240814145642.344485-1-emil.renner.berthing@canonical.com> References: <20240814145642.344485-1-emil.renner.berthing@canonical.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This reverts commit 25d862e183d4efeb5e8b9843d783c90aaae4b14a. This is a prerequisite to reverting the patch converting the PLIC into a platform driver. Unfortunately this breaks booting the Allwinner D1 SoC. Fixes: 8ec99b033147 ("irqchip/sifive-plic: Convert PLIC driver into a platf= orm driver") Signed-off-by: Emil Renner Berthing --- drivers/irqchip/irq-sifive-plic.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive= -plic.c index 7cf06bbb3098..ac274e1166c3 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 SiFive * Copyright (C) 2018 Christoph Hellwig */ +#define pr_fmt(fmt) "plic: " fmt #include #include #include @@ -376,10 +377,9 @@ static void plic_handle_irq(struct irq_desc *desc) while ((hwirq =3D readl(claim))) { int err =3D generic_handle_domain_irq(handler->priv->irqdomain, hwirq); - if (unlikely(err)) { - dev_warn_ratelimited(handler->priv->dev, - "can't find mapping for hwirq %lu\n", hwirq); - } + if (unlikely(err)) + pr_warn_ratelimited("can't find mapping for hwirq %lu\n", + hwirq); } =20 chained_irq_exit(chip, desc); @@ -407,7 +407,7 @@ static int plic_starting_cpu(unsigned int cpu) enable_percpu_irq(plic_parent_irq, irq_get_trigger_type(plic_parent_irq)); else - dev_warn(handler->priv->dev, "cpu%d: parent irq not available\n", cpu); + pr_warn("cpu%d: parent irq not available\n", cpu); plic_set_threshold(handler, PLIC_ENABLE_THRESHOLD); =20 return 0; @@ -483,7 +483,7 @@ static int plic_probe(struct platform_device *pdev) unsigned long hartid; =20 if (of_irq_parse_one(to_of_node(dev->fwnode), i, &parent)) { - dev_err(dev, "failed to parse parent for context %d.\n", i); + pr_err("failed to parse parent for context %d.\n", i); continue; } =20 @@ -506,13 +506,13 @@ static int plic_probe(struct platform_device *pdev) =20 error =3D riscv_of_parent_hartid(parent.np, &hartid); if (error < 0) { - dev_warn(dev, "failed to parse hart ID for context %d.\n", i); + pr_warn("failed to parse hart ID for context %d.\n", i); continue; } =20 cpu =3D riscv_hartid_to_cpuid(hartid); if (cpu < 0) { - dev_warn(dev, "Invalid cpuid for context %d\n", i); + pr_warn("Invalid cpuid for context %d\n", i); continue; } =20 @@ -531,7 +531,7 @@ static int plic_probe(struct platform_device *pdev) */ handler =3D per_cpu_ptr(&plic_handlers, cpu); if (handler->present) { - dev_warn(dev, "handler already present for context %d.\n", i); + pr_warn("handler already present for context %d.\n", i); plic_set_threshold(handler, PLIC_DISABLE_THRESHOLD); goto done; } @@ -581,8 +581,8 @@ static int plic_probe(struct platform_device *pdev) } } =20 - dev_info(dev, "mapped %d interrupts with %d handlers for %d contexts.\n", - nr_irqs, nr_handlers, nr_contexts); + pr_info("%pOFP: mapped %d interrupts with %d handlers for %d contexts.\n", + to_of_node(dev->fwnode), nr_irqs, nr_handlers, nr_contexts); return 0; =20 out_free_enable_reg: --=20 2.43.0