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([2a01:4262:1ab:c:bbf4:eba3:898f:7501]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a80f411bdcbsm182316866b.105.2024.08.14.07.56.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Aug 2024 07:56:49 -0700 (PDT) From: Emil Renner Berthing To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Anup Patel Cc: Thomas Gleixner , Paul Walmsley , Samuel Holland , Palmer Dabbelt , Albert Ou Subject: [PATCH v1 7/9] Revert "irqchip/sifive-plic: Use devm_xyz() for managed allocation" Date: Wed, 14 Aug 2024 16:56:39 +0200 Message-ID: <20240814145642.344485-8-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240814145642.344485-1-emil.renner.berthing@canonical.com> References: <20240814145642.344485-1-emil.renner.berthing@canonical.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This reverts commit b68d0ff529a939a118ec52f271be8cad5d99e79a. This is a prerequisite to reverting the patch converting the PLIC into a platform driver. Unfortunately this breaks booting the Allwinner D1 SoC. Fixes: 8ec99b033147 ("irqchip/sifive-plic: Convert PLIC driver into a platf= orm driver") Signed-off-by: Emil Renner Berthing --- drivers/irqchip/irq-sifive-plic.c | 49 +++++++++++++++++++++---------- 1 file changed, 33 insertions(+), 16 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive= -plic.c index 7dbc662a229c..7cf06bbb3098 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -442,30 +442,39 @@ static int plic_probe(struct platform_device *pdev) plic_quirks =3D (unsigned long)id->data; } =20 - priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + priv =3D kzalloc(sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; =20 priv->dev =3D dev; priv->plic_quirks =3D plic_quirks; =20 - priv->regs =3D devm_platform_ioremap_resource(pdev, 0); - if (WARN_ON(!priv->regs)) - return -EIO; + priv->regs =3D of_iomap(to_of_node(dev->fwnode), 0); + if (WARN_ON(!priv->regs)) { + error =3D -EIO; + goto out_free_priv; + } =20 + error =3D -EINVAL; of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", &nr_irqs); if (WARN_ON(!nr_irqs)) - return -EINVAL; + goto out_iounmap; =20 priv->nr_irqs =3D nr_irqs; =20 - priv->prio_save =3D devm_bitmap_zalloc(dev, nr_irqs, GFP_KERNEL); + priv->prio_save =3D bitmap_alloc(nr_irqs, GFP_KERNEL); if (!priv->prio_save) - return -ENOMEM; + goto out_free_priority_reg; =20 nr_contexts =3D of_irq_count(to_of_node(dev->fwnode)); if (WARN_ON(!nr_contexts)) - return -EINVAL; + goto out_free_priority_reg; + + error =3D -ENOMEM; + priv->irqdomain =3D irq_domain_add_linear(to_of_node(dev->fwnode), nr_irq= s + 1, + &plic_irqdomain_ops, priv); + if (WARN_ON(!priv->irqdomain)) + goto out_free_priority_reg; =20 for (i =3D 0; i < nr_contexts; i++) { struct of_phandle_args parent; @@ -536,10 +545,10 @@ static int plic_probe(struct platform_device *pdev) i * CONTEXT_ENABLE_SIZE; handler->priv =3D priv; =20 - handler->enable_save =3D devm_kcalloc(dev, DIV_ROUND_UP(nr_irqs, 32), - sizeof(*handler->enable_save), GFP_KERNEL); + handler->enable_save =3D kcalloc(DIV_ROUND_UP(nr_irqs, 32), + sizeof(*handler->enable_save), GFP_KERNEL); if (!handler->enable_save) - return -ENOMEM; + goto out_free_enable_reg; done: for (hwirq =3D 1; hwirq <=3D nr_irqs; hwirq++) { plic_toggle(handler, hwirq, 0); @@ -549,11 +558,6 @@ static int plic_probe(struct platform_device *pdev) nr_handlers++; } =20 - priv->irqdomain =3D irq_domain_add_linear(to_of_node(dev->fwnode), nr_irq= s + 1, - &plic_irqdomain_ops, priv); - if (WARN_ON(!priv->irqdomain)) - return -ENOMEM; - /* * We can have multiple PLIC instances so setup cpuhp state * and register syscore operations only once after context @@ -580,6 +584,19 @@ static int plic_probe(struct platform_device *pdev) dev_info(dev, "mapped %d interrupts with %d handlers for %d contexts.\n", nr_irqs, nr_handlers, nr_contexts); return 0; + +out_free_enable_reg: + for_each_cpu(cpu, cpu_present_mask) { + handler =3D per_cpu_ptr(&plic_handlers, cpu); + kfree(handler->enable_save); + } +out_free_priority_reg: + kfree(priv->prio_save); +out_iounmap: + iounmap(priv->regs); +out_free_priv: + kfree(priv); + return error; } =20 static struct platform_driver plic_driver =3D { --=20 2.43.0