From nobody Wed Dec 17 18:59:46 2025 Received: from out-189.mta1.migadu.com (out-189.mta1.migadu.com [95.215.58.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C63315F303 for ; Fri, 9 Aug 2024 19:36:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.189 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232187; cv=none; b=r+oqZGUqaTqJVoFSQa6abRC6vxWCK/gNvLyeMubuaNNFv0a/wqqVXcYkFplUuKfFHU+IDChFKymsGOyUAclFiz1U3AbSh2hzAYED8nqmbIini+c0v8SAkM00NM+G5dRi58nfmi9X3Fl+ARrgsyxzTrWXAT39nm3VFIj5Gctpy+E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232187; c=relaxed/simple; bh=LAeMWAPS7iDhVHc+K6GXs/juHcJ5BmLOJVWCWGPDs+s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=nTyQRr2wE5eE+xZ7ov2ewJ7d5xvBLy8sp6slhQTvbazIW5Jm8+n5QCMnvU1cXZpW+DM79anpwyCDK0m32vetLiWcQoDVkwdFwfxzdomGTrvVw9YOGeEiH7jOduZvPqr2J3fXTDqQZHHRPj73/al1KPI6MD5eylq8SeiCLFe2ULI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=qlghef/t; arc=none smtp.client-ip=95.215.58.189 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="qlghef/t" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723232181; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Jzac6s167f/EibwxsfpMGlvZd8RAd5X1jF/kZBreWa0=; b=qlghef/ttCZexKig9Jch5lSW2xzc7BANS7o9DC1GOHOq2kxjB71oEFiEt0WkpXzg/M7aBT PPzsOlK9tE+2thach6XanfFKFbREhHDTS//1b5Qs3OE1nPurVT23GxbwYm0ZEBrkTRl19R bczk3ly0v1y2D5tdvhKaTtoIcwr/tGE= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, David Airlie , Michal Simek , Daniel Vetter , Tomi Valkeinen , Sean Anderson Subject: [PATCH v6 1/8] drm: zynqmp_kms: Unplug DRM device before removal Date: Fri, 9 Aug 2024 15:35:53 -0400 Message-Id: <20240809193600.3360015-2-sean.anderson@linux.dev> In-Reply-To: <20240809193600.3360015-1-sean.anderson@linux.dev> References: <20240809193600.3360015-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Prevent userspace accesses to the DRM device from causing use-after-frees by unplugging the device before we remove it. This causes any further userspace accesses to result in an error without further calls into this driver's internals. Fixes: d76271d22694 ("drm: xlnx: DRM/KMS driver for Xilinx ZynqMP DisplayPo= rt Subsystem") Closes: https://lore.kernel.org/dri-devel/4d8f4c9b-2efb-4774-9a37-2f257f79b= 2c9@linux.dev/ Signed-off-by: Sean Anderson --- Thanks to Maxime for pointing out the correct function to use here. Changes in v6: - New drivers/gpu/drm/xlnx/zynqmp_kms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c b/drivers/gpu/drm/xlnx/zynqm= p_kms.c index bd1368df7870..4556af2faa0f 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c @@ -536,7 +536,7 @@ void zynqmp_dpsub_drm_cleanup(struct zynqmp_dpsub *dpsu= b) { struct drm_device *drm =3D &dpsub->drm->dev; =20 - drm_dev_unregister(drm); + drm_dev_unplug(drm); drm_atomic_helper_shutdown(drm); drm_encoder_cleanup(&dpsub->drm->encoder); drm_kms_helper_poll_fini(drm); --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Dec 17 18:59:46 2025 Received: from out-172.mta1.migadu.com (out-172.mta1.migadu.com [95.215.58.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1F4A15FA73 for ; Fri, 9 Aug 2024 19:36:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232188; cv=none; b=XLJCQcnMFzPxLFkvTR5c7N/OLthNriJgnpkz5Mxsd/3uNfTkFWVEeVtSq4ag0pr2QOV1l7jGIkDVNTVBqUGW+NEHWIRV7Ofm/to3NeRelVTDkRnI/svWhcsxB8GFZjiPTR7qEOE9O7fo8kOGDieTQkDwSjahk14dq/yK7pBqZDk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232188; c=relaxed/simple; bh=9GH8dd6Q1rS60og/Ou29NLpQfxk9EW9ZPhM8wZt55OM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZQAnvDmhlDkZHuFUu/rHdtDuYHWX+JMS/FDEwrXMAViWjRpYyQZRWXEGZk2SM+l9+v2pCBXCvoxFy6sJgOmviNC1l89015fRyijuQccNJmK5PmfjMaMJ9HcXDI6GQGqhVO1oCcWjByBEUAilx036yFwQRxXhuKwaA1tSEf2YILs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=NbRyz7Rn; arc=none smtp.client-ip=95.215.58.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="NbRyz7Rn" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723232183; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=oK3GkwlYIbgKa5E/wcr/BC9b4B3l2udsFuim2xq4G6g=; b=NbRyz7RnF3xFMrm9ajZjqSRV7IRnkXVtqP44r7fxyRPE7Rm/iNQvh8oTKhuxCqXPSmMZD7 ApYqn2y7xtEUgwTM20tVrjSa96Z66akv/brrEKBeNVS9vMVZ5/3OpWQsQUdkP/FMcea0t8 kdGJE8I4uZhBS8uWQdEew8jUuBoeyn0= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, David Airlie , Michal Simek , Daniel Vetter , Tomi Valkeinen , Sean Anderson Subject: [PATCH v6 2/8] drm: zynqmp_dp: Add locking Date: Fri, 9 Aug 2024 15:35:54 -0400 Message-Id: <20240809193600.3360015-3-sean.anderson@linux.dev> In-Reply-To: <20240809193600.3360015-1-sean.anderson@linux.dev> References: <20240809193600.3360015-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add some locking to prevent the IRQ/workers/bridge API calls from stepping on each other's toes. This lock protects: - Non-atomic registers configuring the link. That is, everything but the IRQ registers (since these are accessed in an atomic fashion), and the DP AUX registers (since these don't affect the link). We also access AUX while holding this lock, so it would be very tricky to support. - Link configuration. This is effectively everything in zynqmp_dp which isn't read-only after probe time. So from next_bridge onward. This lock is designed to protect configuration changes so we don't have to do anything tricky. Configuration should never be in the hot path, so I'm not worried about performance. Signed-off-by: Sean Anderson --- (no changes since v2) Changes in v2: - Split off the HPD IRQ work into another commit - Expand the commit message drivers/gpu/drm/xlnx/zynqmp_dp.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp= _dp.c index 129beac4c073..abfccd8bb5a7 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -280,6 +280,7 @@ struct zynqmp_dp_config { * @dpsub: Display subsystem * @iomem: device I/O memory for register access * @reset: reset controller + * @lock: Mutex protecting this struct and register access (but not AUX) * @irq: irq * @bridge: DRM bridge for the DP encoder * @next_bridge: The downstream bridge @@ -294,11 +295,16 @@ struct zynqmp_dp_config { * @link_config: common link configuration between IP core and sink device * @mode: current mode between IP core and sink device * @train_set: set of training data + * + * @lock covers the link configuration in this struct and the device's + * registers. It does not cover @aux. It is not strictly required for any = of + * the members which are only modified at probe/remove time (e.g. @dev). */ struct zynqmp_dp { struct drm_dp_aux aux; struct drm_bridge bridge; struct work_struct hpd_work; + struct mutex lock; =20 struct drm_bridge *next_bridge; struct device *dev; @@ -1386,8 +1392,10 @@ zynqmp_dp_bridge_mode_valid(struct drm_bridge *bridg= e, } =20 /* Check with link rate and lane count */ + mutex_lock(&dp->lock); rate =3D zynqmp_dp_max_rate(dp->link_config.max_rate, dp->link_config.max_lanes, dp->config.bpp); + mutex_unlock(&dp->lock); if (mode->clock > rate) { dev_dbg(dp->dev, "filtered mode %s for high pixel rate\n", mode->name); @@ -1414,6 +1422,7 @@ static void zynqmp_dp_bridge_atomic_enable(struct drm= _bridge *bridge, =20 pm_runtime_get_sync(dp->dev); =20 + mutex_lock(&dp->lock); zynqmp_dp_disp_enable(dp, old_bridge_state); =20 /* @@ -1474,6 +1483,7 @@ static void zynqmp_dp_bridge_atomic_enable(struct drm= _bridge *bridge, zynqmp_dp_write(dp, ZYNQMP_DP_SOFTWARE_RESET, ZYNQMP_DP_SOFTWARE_RESET_ALL); zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_ENABLE, 1); + mutex_unlock(&dp->lock); } =20 static void zynqmp_dp_bridge_atomic_disable(struct drm_bridge *bridge, @@ -1481,6 +1491,7 @@ static void zynqmp_dp_bridge_atomic_disable(struct dr= m_bridge *bridge, { struct zynqmp_dp *dp =3D bridge_to_dp(bridge); =20 + mutex_lock(&dp->lock); dp->enabled =3D false; cancel_work(&dp->hpd_work); zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_ENABLE, 0); @@ -1491,6 +1502,7 @@ static void zynqmp_dp_bridge_atomic_disable(struct dr= m_bridge *bridge, zynqmp_dp_write(dp, ZYNQMP_DP_TX_AUDIO_CONTROL, 0); =20 zynqmp_dp_disp_disable(dp, old_bridge_state); + mutex_unlock(&dp->lock); =20 pm_runtime_put_sync(dp->dev); } @@ -1533,6 +1545,8 @@ static enum drm_connector_status zynqmp_dp_bridge_det= ect(struct drm_bridge *brid u32 state, i; int ret; =20 + mutex_lock(&dp->lock); + /* * This is from heuristic. It takes some delay (ex, 100 ~ 500 msec) to * get the HPD signal with some monitors. @@ -1560,11 +1574,13 @@ static enum drm_connector_status zynqmp_dp_bridge_d= etect(struct drm_bridge *brid dp->num_lanes); =20 dp->status =3D connector_status_connected; + mutex_unlock(&dp->lock); return connector_status_connected; } =20 disconnected: dp->status =3D connector_status_disconnected; + mutex_unlock(&dp->lock); return connector_status_disconnected; } =20 @@ -1725,6 +1741,7 @@ int zynqmp_dp_probe(struct zynqmp_dpsub *dpsub) dp->dev =3D &pdev->dev; dp->dpsub =3D dpsub; dp->status =3D connector_status_disconnected; + mutex_init(&dp->lock); =20 INIT_WORK(&dp->hpd_work, zynqmp_dp_hpd_work_func); =20 @@ -1838,4 +1855,5 @@ void zynqmp_dp_remove(struct zynqmp_dpsub *dpsub) =20 zynqmp_dp_phy_exit(dp); zynqmp_dp_reset(dp, true); + mutex_destroy(&dp->lock); } --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Dec 17 18:59:46 2025 Received: from out-189.mta1.migadu.com (out-189.mta1.migadu.com [95.215.58.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE69016130B for ; Fri, 9 Aug 2024 19:36:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.189 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232189; cv=none; b=d1oBJnA18S15qlVJM3ci/bh+FnvzyXzeYtgNpl0jlyQGHd/erdCR+6+gl8FqJGChKbnU6CiqBP8jPATtnoo3cU4FKfaar+M402nkOVDMgC2HKVYt28ZPHt5xtevYMePM27Bn4pt/U6YRRgW7Z1sPsLLwdX8xQtWfw4euNWC3uDg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232189; c=relaxed/simple; bh=x+wSYNOqgr2hFIz9pBmvTXxnW1v3NMXXowtHGap2lh4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=aUGBRv+31nj4mndnq+x4bfzRKHfdfiAMZxvnY2Txf/Y2CzHwJAoQibG/DA9CURu7ALdXqtb8prU+yQV3lMAxtrhjcpxKqo0Cmc8yOPk9qTL9vf17isIPXPAtx9AvdeUyXdNb3PWsh+Ab8V38gOp0kFZ7tH/aTdNrA+9Y8dzDGio= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=B23VV0lE; arc=none smtp.client-ip=95.215.58.189 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="B23VV0lE" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723232185; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=V/KsopdPTSQejykMzz4/KUwl6vzi9Fn3LMN3IMFqYkw=; b=B23VV0lE1r2lFe78E3CYGMuWjiMj7w6JQLu2XaJj+bujPjO8sntj4Mp14DZXB4sg//pmM4 z/2WSCar11D/Vf7/VQX49rqTRHZOMQy6TGxYaj/R8GCQMJYqklzCO6ZS4giMGESbr3w9TO xpZ5zYZDE4kuCyWncSJcjUAAfWdp1xc= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, David Airlie , Michal Simek , Daniel Vetter , Tomi Valkeinen , Sean Anderson Subject: [PATCH v6 3/8] drm: zynqmp_dp: Don't retrain the link in our IRQ Date: Fri, 9 Aug 2024 15:35:55 -0400 Message-Id: <20240809193600.3360015-4-sean.anderson@linux.dev> In-Reply-To: <20240809193600.3360015-1-sean.anderson@linux.dev> References: <20240809193600.3360015-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Retraining the link can take a while, and might involve waiting for DPCD reads/writes to complete. In preparation for unthreading the IRQ handler, move this into its own work function. Signed-off-by: Sean Anderson --- (no changes since v2) Changes in v2: - Document hpd_irq_work - Split this off from the locking changes drivers/gpu/drm/xlnx/zynqmp_dp.c | 45 ++++++++++++++++++++------------ 1 file changed, 29 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp= _dp.c index abfccd8bb5a7..cec5711c7026 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -289,6 +289,7 @@ struct zynqmp_dp_config { * @phy: PHY handles for DP lanes * @num_lanes: number of enabled phy lanes * @hpd_work: hot plug detection worker + * @hpd_irq_work: hot plug detection IRQ worker * @status: connection status * @enabled: flag to indicate if the device is enabled * @dpcd: DP configuration data from currently connected sink device @@ -304,6 +305,7 @@ struct zynqmp_dp { struct drm_dp_aux aux; struct drm_bridge bridge; struct work_struct hpd_work; + struct work_struct hpd_irq_work; struct mutex lock; =20 struct drm_bridge *next_bridge; @@ -1671,6 +1673,29 @@ static void zynqmp_dp_hpd_work_func(struct work_stru= ct *work) drm_bridge_hpd_notify(&dp->bridge, status); } =20 +static void zynqmp_dp_hpd_irq_work_func(struct work_struct *work) +{ + struct zynqmp_dp *dp =3D container_of(work, struct zynqmp_dp, + hpd_irq_work); + u8 status[DP_LINK_STATUS_SIZE + 2]; + int err; + + mutex_lock(&dp->lock); + err =3D drm_dp_dpcd_read(&dp->aux, DP_SINK_COUNT, status, + DP_LINK_STATUS_SIZE + 2); + if (err < 0) { + dev_dbg_ratelimited(dp->dev, + "could not read sink status: %d\n", err); + } else { + if (status[4] & DP_LINK_STATUS_UPDATED || + !drm_dp_clock_recovery_ok(&status[2], dp->mode.lane_cnt) || + !drm_dp_channel_eq_ok(&status[2], dp->mode.lane_cnt)) { + zynqmp_dp_train_loop(dp); + } + } + mutex_unlock(&dp->lock); +} + static irqreturn_t zynqmp_dp_irq_handler(int irq, void *data) { struct zynqmp_dp *dp =3D (struct zynqmp_dp *)data; @@ -1702,23 +1727,9 @@ static irqreturn_t zynqmp_dp_irq_handler(int irq, vo= id *data) if (status & ZYNQMP_DP_INT_HPD_EVENT) schedule_work(&dp->hpd_work); =20 - if (status & ZYNQMP_DP_INT_HPD_IRQ) { - int ret; - u8 status[DP_LINK_STATUS_SIZE + 2]; + if (status & ZYNQMP_DP_INT_HPD_IRQ) + schedule_work(&dp->hpd_irq_work); =20 - ret =3D drm_dp_dpcd_read(&dp->aux, DP_SINK_COUNT, status, - DP_LINK_STATUS_SIZE + 2); - if (ret < 0) - goto handled; - - if (status[4] & DP_LINK_STATUS_UPDATED || - !drm_dp_clock_recovery_ok(&status[2], dp->mode.lane_cnt) || - !drm_dp_channel_eq_ok(&status[2], dp->mode.lane_cnt)) { - zynqmp_dp_train_loop(dp); - } - } - -handled: return IRQ_HANDLED; } =20 @@ -1744,6 +1755,7 @@ int zynqmp_dp_probe(struct zynqmp_dpsub *dpsub) mutex_init(&dp->lock); =20 INIT_WORK(&dp->hpd_work, zynqmp_dp_hpd_work_func); + INIT_WORK(&dp->hpd_irq_work, zynqmp_dp_hpd_irq_work_func); =20 /* Acquire all resources (IOMEM, IRQ and PHYs). */ res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "dp"); @@ -1848,6 +1860,7 @@ void zynqmp_dp_remove(struct zynqmp_dpsub *dpsub) zynqmp_dp_write(dp, ZYNQMP_DP_INT_DS, ZYNQMP_DP_INT_ALL); disable_irq(dp->irq); =20 + cancel_work_sync(&dp->hpd_irq_work); cancel_work_sync(&dp->hpd_work); =20 zynqmp_dp_write(dp, ZYNQMP_DP_TRANSMITTER_ENABLE, 0); --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Dec 17 18:59:46 2025 Received: from out-176.mta1.migadu.com (out-176.mta1.migadu.com [95.215.58.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 00BBC168486 for ; Fri, 9 Aug 2024 19:36:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232191; cv=none; b=R3/FefBPBCZoslXxUhiBoQlwxKsr4tMOtExhyZ52a1HxWrxP52RH8W182cEILZi7xw9BZWrJ3haihvNgtS/SkFyK1A1bDFipU0S7l2XIdihK6e/tST8LyvkTDMrmsA02UxFkW3A6I4JvjkTy/ZazMbOaPouDGXMe1p/R9HGK64M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232191; c=relaxed/simple; bh=gc4avITRlwrSjXO9PlWm5CdygUmC7j5x84yH+8YOlVA=; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723232187; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ikxIScfUv2b8NNW6uDWKv1jhmd4Ojs4CUAXyBEP9cr8=; b=uWKfHF9mVEROSGlYuIMLMnFyS6kri9nglPKCWfrbBwWpFSwEM7iYXO4wMBRQcHqbUt/0cR UJpVlHY3xm542SqnzkYKUqs54yK+wBiHOdqCOXmBivciW9YX+8tzhFJvsx+oBb7/kt7fRj xFCnCUQXZPA/ntcwW2I20Q4BG1f8oWI= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, David Airlie , Michal Simek , Daniel Vetter , Tomi Valkeinen , Sean Anderson Subject: [PATCH v6 4/8] drm: zynqmp_dp: Convert to a hard IRQ Date: Fri, 9 Aug 2024 15:35:56 -0400 Message-Id: <20240809193600.3360015-5-sean.anderson@linux.dev> In-Reply-To: <20240809193600.3360015-1-sean.anderson@linux.dev> References: <20240809193600.3360015-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Now that all of the sleeping work is done outside of the IRQ, we can convert it to a hard IRQ. Shared IRQs may be triggered even after calling disable_irq, so use free_irq instead which removes our callback altogether. Signed-off-by: Sean Anderson Reviewed-by: Tomi Valkeinen --- Changes in v6: - Fix hang upon driver removal Changes in v3: - New drivers/gpu/drm/xlnx/zynqmp_dp.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp= _dp.c index cec5711c7026..532e103713b3 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -1831,9 +1831,8 @@ int zynqmp_dp_probe(struct zynqmp_dpsub *dpsub) * Now that the hardware is initialized and won't generate spurious * interrupts, request the IRQ. */ - ret =3D devm_request_threaded_irq(dp->dev, dp->irq, NULL, - zynqmp_dp_irq_handler, IRQF_ONESHOT, - dev_name(dp->dev), dp); + ret =3D devm_request_irq(dp->dev, dp->irq, zynqmp_dp_irq_handler, + IRQF_SHARED, dev_name(dp->dev), dp); if (ret < 0) goto err_phy_exit; =20 @@ -1858,7 +1857,7 @@ void zynqmp_dp_remove(struct zynqmp_dpsub *dpsub) struct zynqmp_dp *dp =3D dpsub->dp; =20 zynqmp_dp_write(dp, ZYNQMP_DP_INT_DS, ZYNQMP_DP_INT_ALL); - disable_irq(dp->irq); + devm_free_irq(dp->dev, dp->irq, dp); =20 cancel_work_sync(&dp->hpd_irq_work); cancel_work_sync(&dp->hpd_work); --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Dec 17 18:59:46 2025 Received: from out-187.mta1.migadu.com (out-187.mta1.migadu.com [95.215.58.187]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 759BE1684B4 for ; Fri, 9 Aug 2024 19:36:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.187 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232193; cv=none; b=XUEI8rLr1LtKibgMthmoau4oTUYwVCnJrHdSQJ8AHxKIq+gv3fURRq695AfxYNhl1uQHpV6SRKzsP9l4VyJJoxwiG7ilWhWrsV6KdfDeq+PNjeEPOYjukonFp+StPDIfeXIO/S7c0ZA/+/Ao9SnH8FSbPwXP4jU5G+zNeCMPVOk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232193; c=relaxed/simple; bh=YVx0Jju0NHfGVvosK1trYWMIiVhu1IEO5676tikAtHo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=o2VzV50fdPRwd5F8gL/DkFmU7GTXkK4s2SDcA4aruLfofp60pMbLZvH3mmzcyNLcRvyaDxvdXm4IoQrieUNWrq8Td8Duo62mPGWett0Ztyw65z9vJ5SmN3i0usVMoup3hW962oT2WSkhwOtjpS19nGLUseplAsezSe8GAwJHQvM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=rk48672L; arc=none smtp.client-ip=95.215.58.187 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="rk48672L" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723232189; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=D/1fpZ1MDjJV5NAFHCktQ3DE7M2fl+H7jRHKmk5SH1w=; b=rk48672LdAlHsdDNaArDOsbGYWOC8O3aFLyhLbPYmL/e+q2+Th/BBBDIkYiaRblttnCuQR DZpp4jW87UT0RPSf5tMCmzE7XCa9dH5/cga8z4WpmsMi+6fcXngZA3+5YCNjXLgVwYkdad ytz4PFcM5wnlgKP6AknHBNxkh2NrDeo= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, David Airlie , Michal Simek , Daniel Vetter , Tomi Valkeinen , Sean Anderson Subject: [PATCH v6 5/8] drm: zynqmp_dp: Use AUX IRQs instead of polling Date: Fri, 9 Aug 2024 15:35:57 -0400 Message-Id: <20240809193600.3360015-6-sean.anderson@linux.dev> In-Reply-To: <20240809193600.3360015-1-sean.anderson@linux.dev> References: <20240809193600.3360015-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Instead of polling the status register for the AUX status, just enable the IRQs and signal a completion. Signed-off-by: Sean Anderson --- (no changes since v3) Changes in v3: - New drivers/gpu/drm/xlnx/zynqmp_dp.c | 35 +++++++++++++++++++++++--------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp= _dp.c index 532e103713b3..babfa3581014 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -286,6 +286,7 @@ struct zynqmp_dp_config { * @next_bridge: The downstream bridge * @config: IP core configuration from DTS * @aux: aux channel + * @aux_done: Completed when we get an AUX reply or timeout * @phy: PHY handles for DP lanes * @num_lanes: number of enabled phy lanes * @hpd_work: hot plug detection worker @@ -306,6 +307,7 @@ struct zynqmp_dp { struct drm_bridge bridge; struct work_struct hpd_work; struct work_struct hpd_irq_work; + struct completion aux_done; struct mutex lock; =20 struct drm_bridge *next_bridge; @@ -942,12 +944,15 @@ static int zynqmp_dp_aux_cmd_submit(struct zynqmp_dp = *dp, u32 cmd, u16 addr, u8 *buf, u8 bytes, u8 *reply) { bool is_read =3D (cmd & AUX_READ_BIT) ? true : false; + unsigned long time_left; u32 reg, i; =20 reg =3D zynqmp_dp_read(dp, ZYNQMP_DP_INTERRUPT_SIGNAL_STATE); if (reg & ZYNQMP_DP_INTERRUPT_SIGNAL_STATE_REQUEST) return -EBUSY; =20 + reinit_completion(&dp->aux_done); + zynqmp_dp_write(dp, ZYNQMP_DP_AUX_ADDRESS, addr); if (!is_read) for (i =3D 0; i < bytes; i++) @@ -962,17 +967,14 @@ static int zynqmp_dp_aux_cmd_submit(struct zynqmp_dp = *dp, u32 cmd, u16 addr, zynqmp_dp_write(dp, ZYNQMP_DP_AUX_COMMAND, reg); =20 /* Wait for reply to be delivered upto 2ms */ - for (i =3D 0; ; i++) { - reg =3D zynqmp_dp_read(dp, ZYNQMP_DP_INTERRUPT_SIGNAL_STATE); - if (reg & ZYNQMP_DP_INTERRUPT_SIGNAL_STATE_REPLY) - break; + time_left =3D wait_for_completion_timeout(&dp->aux_done, + msecs_to_jiffies(2)); + if (!time_left) + return -ETIMEDOUT; =20 - if (reg & ZYNQMP_DP_INTERRUPT_SIGNAL_STATE_REPLY_TIMEOUT || - i =3D=3D 2) - return -ETIMEDOUT; - - usleep_range(1000, 1100); - } + reg =3D zynqmp_dp_read(dp, ZYNQMP_DP_INTERRUPT_SIGNAL_STATE); + if (reg & ZYNQMP_DP_INTERRUPT_SIGNAL_STATE_REPLY_TIMEOUT) + return -ETIMEDOUT; =20 reg =3D zynqmp_dp_read(dp, ZYNQMP_DP_AUX_REPLY_CODE); if (reply) @@ -1056,6 +1058,9 @@ static int zynqmp_dp_aux_init(struct zynqmp_dp *dp) (w << ZYNQMP_DP_AUX_CLK_DIVIDER_AUX_FILTER_SHIFT) | (rate / (1000 * 1000))); =20 + zynqmp_dp_write(dp, ZYNQMP_DP_INT_EN, ZYNQMP_DP_INT_REPLY_RECEIVED | + ZYNQMP_DP_INT_REPLY_TIMEOUT); + dp->aux.name =3D "ZynqMP DP AUX"; dp->aux.dev =3D dp->dev; dp->aux.drm_dev =3D dp->bridge.dev; @@ -1073,6 +1078,9 @@ static int zynqmp_dp_aux_init(struct zynqmp_dp *dp) static void zynqmp_dp_aux_cleanup(struct zynqmp_dp *dp) { drm_dp_aux_unregister(&dp->aux); + + zynqmp_dp_write(dp, ZYNQMP_DP_INT_DS, ZYNQMP_DP_INT_REPLY_RECEIVED | + ZYNQMP_DP_INT_REPLY_TIMEOUT); } =20 /* -----------------------------------------------------------------------= ------ @@ -1730,6 +1738,12 @@ static irqreturn_t zynqmp_dp_irq_handler(int irq, vo= id *data) if (status & ZYNQMP_DP_INT_HPD_IRQ) schedule_work(&dp->hpd_irq_work); =20 + if (status & ZYNQMP_DP_INTERRUPT_SIGNAL_STATE_REPLY) + complete(&dp->aux_done); + + if (status & ZYNQMP_DP_INTERRUPT_SIGNAL_STATE_REPLY_TIMEOUT) + complete(&dp->aux_done); + return IRQ_HANDLED; } =20 @@ -1753,6 +1767,7 @@ int zynqmp_dp_probe(struct zynqmp_dpsub *dpsub) dp->dpsub =3D dpsub; dp->status =3D connector_status_disconnected; mutex_init(&dp->lock); + init_completion(&dp->aux_done); =20 INIT_WORK(&dp->hpd_work, zynqmp_dp_hpd_work_func); INIT_WORK(&dp->hpd_irq_work, zynqmp_dp_hpd_irq_work_func); --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Dec 17 18:59:46 2025 Received: from out-182.mta1.migadu.com (out-182.mta1.migadu.com [95.215.58.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9907316A94F for ; Fri, 9 Aug 2024 19:36:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232195; cv=none; b=Tp0pyHlQCnR1r3FV/96ShF2RcbYmqADqW9JuvMJDXQnGzuwFISpu1KuGHWjizRb9uwGfOZ3lmHU2cJ+XVNRNXgUXylRImx0FjUmjYnxBbBSPc+j/sher4lrI7zHHvXIFo3bzLTyrfhbhCTtKTJ91Opmh6+0Fir0nP/GOlQk1ngU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232195; c=relaxed/simple; bh=NmfBPCQOUiqvuYgDchKyG5guDaffzHEJRaAjXJm9klE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=A3+AURBXy7nwLXgfHKJB5m+4oQSrD6r1O9mzMOehAaZX29L6EARiXa9JoEZXnTpJfeD/jMDvPlzPioWGQMSzhdRPQddtDxLQG3Lsw62OWbP2LDExq19GqQcTZLrJRRqyM2G5AUbqWkYsrTCMGaktpRYlN+jVjFzLeGSdJsF5yjk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=f3kf7JZJ; arc=none smtp.client-ip=95.215.58.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="f3kf7JZJ" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723232191; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=quWhlQYCIJ5ooa/bXKzdLXD7dpTxps6C7G+W1eMFLO4=; b=f3kf7JZJNh6Fj4JJy6FTYFDxCEI0GxTlAZ/XgHhmyY469GU9Fa9Kxc2vKWS9LzrO9L8cVO Gyhyk6A9CygsqE87pZiFGtuyEByOh6FlToyB90i9ztVFOofgV376THJ5qiOUN79NhAEaYV VDzJCItHhhndgHAbOEsZQPL2z1W8dsw= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, David Airlie , Michal Simek , Daniel Vetter , Tomi Valkeinen , Sean Anderson Subject: [PATCH v6 6/8] drm: zynqmp_dp: Split off several helper functions Date: Fri, 9 Aug 2024 15:35:58 -0400 Message-Id: <20240809193600.3360015-7-sean.anderson@linux.dev> In-Reply-To: <20240809193600.3360015-1-sean.anderson@linux.dev> References: <20240809193600.3360015-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" In preparation for supporting compliance testing, split off several helper functions. No functional change intended. Signed-off-by: Sean Anderson Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen --- (no changes since v1) drivers/gpu/drm/xlnx/zynqmp_dp.c | 49 ++++++++++++++++++++++---------- 1 file changed, 34 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp= _dp.c index babfa3581014..e0ab3b3e8580 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -636,6 +636,7 @@ static void zynqmp_dp_adjust_train(struct zynqmp_dp *dp, /** * zynqmp_dp_update_vs_emph - Update the training values * @dp: DisplayPort IP core structure + * @train_set: A set of training values * * Update the training values based on the request from sink. The mapped v= alues * are predefined, and values(vs, pe, pc) are from the device manual. @@ -643,12 +644,12 @@ static void zynqmp_dp_adjust_train(struct zynqmp_dp *= dp, * Return: 0 if vs and emph are updated successfully, or the error code re= turned * by drm_dp_dpcd_write(). */ -static int zynqmp_dp_update_vs_emph(struct zynqmp_dp *dp) +static int zynqmp_dp_update_vs_emph(struct zynqmp_dp *dp, u8 *train_set) { unsigned int i; int ret; =20 - ret =3D drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, dp->train_set, + ret =3D drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, train_set, dp->mode.lane_cnt); if (ret < 0) return ret; @@ -656,7 +657,7 @@ static int zynqmp_dp_update_vs_emph(struct zynqmp_dp *d= p) for (i =3D 0; i < dp->mode.lane_cnt; i++) { u32 reg =3D ZYNQMP_DP_SUB_TX_PHY_PRECURSOR_LANE_0 + i * 4; union phy_configure_opts opts =3D { 0 }; - u8 train =3D dp->train_set[i]; + u8 train =3D train_set[i]; =20 opts.dp.voltage[0] =3D (train & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT; @@ -700,7 +701,7 @@ static int zynqmp_dp_link_train_cr(struct zynqmp_dp *dp) * So, This loop should exit before 512 iterations */ for (max_tries =3D 0; max_tries < 512; max_tries++) { - ret =3D zynqmp_dp_update_vs_emph(dp); + ret =3D zynqmp_dp_update_vs_emph(dp, dp->train_set); if (ret) return ret; =20 @@ -765,7 +766,7 @@ static int zynqmp_dp_link_train_ce(struct zynqmp_dp *dp) return ret; =20 for (tries =3D 0; tries < DP_MAX_TRAINING_TRIES; tries++) { - ret =3D zynqmp_dp_update_vs_emph(dp); + ret =3D zynqmp_dp_update_vs_emph(dp, dp->train_set); if (ret) return ret; =20 @@ -788,28 +789,29 @@ static int zynqmp_dp_link_train_ce(struct zynqmp_dp *= dp) } =20 /** - * zynqmp_dp_train - Train the link + * zynqmp_dp_setup() - Set up major link parameters * @dp: DisplayPort IP core structure + * @bw_code: The link bandwidth as a multiple of 270 MHz + * @lane_cnt: The number of lanes to use + * @enhanced: Use enhanced framing + * @downspread: Enable spread-spectrum clocking * - * Return: 0 if all trains are done successfully, or corresponding error c= ode. + * Return: 0 on success, or -errno on failure */ -static int zynqmp_dp_train(struct zynqmp_dp *dp) +static int zynqmp_dp_setup(struct zynqmp_dp *dp, u8 bw_code, u8 lane_cnt, + bool enhanced, bool downspread) { u32 reg; - u8 bw_code =3D dp->mode.bw_code; - u8 lane_cnt =3D dp->mode.lane_cnt; u8 aux_lane_cnt =3D lane_cnt; - bool enhanced; int ret; =20 zynqmp_dp_write(dp, ZYNQMP_DP_LANE_COUNT_SET, lane_cnt); - enhanced =3D drm_dp_enhanced_frame_cap(dp->dpcd); if (enhanced) { zynqmp_dp_write(dp, ZYNQMP_DP_ENHANCED_FRAME_EN, 1); aux_lane_cnt |=3D DP_LANE_COUNT_ENHANCED_FRAME_EN; } =20 - if (dp->dpcd[3] & 0x1) { + if (downspread) { zynqmp_dp_write(dp, ZYNQMP_DP_DOWNSPREAD_CTL, 1); drm_dp_dpcd_writeb(&dp->aux, DP_DOWNSPREAD_CTRL, DP_SPREAD_AMP_0_5); @@ -852,8 +854,25 @@ static int zynqmp_dp_train(struct zynqmp_dp *dp) } =20 zynqmp_dp_write(dp, ZYNQMP_DP_PHY_CLOCK_SELECT, reg); - ret =3D zynqmp_dp_phy_ready(dp); - if (ret < 0) + return zynqmp_dp_phy_ready(dp); +} + + +/** + * zynqmp_dp_train - Train the link + * @dp: DisplayPort IP core structure + * + * Return: 0 if all trains are done successfully, or corresponding error c= ode. + */ +static int zynqmp_dp_train(struct zynqmp_dp *dp) +{ + int ret; + + ret =3D zynqmp_dp_setup(dp, dp->mode.bw_code, dp->mode.lane_cnt, + drm_dp_enhanced_frame_cap(dp->dpcd), + dp->dpcd[DP_MAX_DOWNSPREAD] & + DP_MAX_DOWNSPREAD_0_5); + if (ret) return ret; =20 zynqmp_dp_write(dp, ZYNQMP_DP_SCRAMBLING_DISABLE, 1); --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Dec 17 18:59:46 2025 Received: from out-170.mta1.migadu.com (out-170.mta1.migadu.com [95.215.58.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E2071607A3 for ; Fri, 9 Aug 2024 19:36:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232198; cv=none; b=peRIIXRbmkIhJJsZzsb3FAgOJI7HtsGVFZj1Nzf2VjiyZTZPgH/iEKtV22rjdtQ65Y26AfCvjjsjuyEE2abwdvF3Fq8OMpJ4xoNnAs5gw8PGYk9K9Whco6BFkwPOWy660jQM/5rSh7cLwArMr30oNR5BSwfNs2Ktm60NaVqTQdI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232198; c=relaxed/simple; bh=0fSJl10Wfz/WiOqEdLqluBRz9Ww3o4AEuDmsIsMpqmk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723232194; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=E7CIj8q4tM0sAgHaW8MP8eR835TxAvTZNNma/3Wy8v8=; b=LMn+NvlH7irQNqV/QM3q8852JuMKybyGWRDKWLvqzWifxmU40zKQ7prVaryy6As85hVv+n +8j8nU9hxE0psilplvAQK1C+D8kA8IvEl0csOA2VMQnjoh0VyLJrKTwLKG132xtosrLX6B UcPL2xLoPJ5dMg88DwUKkTg6QbE7znc= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, David Airlie , Michal Simek , Daniel Vetter , Tomi Valkeinen , Sean Anderson Subject: [PATCH v6 7/8] drm: zynqmp_dp: Take dp->lock in zynqmp_dp_hpd_work_func Date: Fri, 9 Aug 2024 15:35:59 -0400 Message-Id: <20240809193600.3360015-8-sean.anderson@linux.dev> In-Reply-To: <20240809193600.3360015-1-sean.anderson@linux.dev> References: <20240809193600.3360015-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add a non-locking version of zynqmp_dp_bridge_detect and use it in zynqmp_dp_hpd_work_func so we can take the lock explicitly. This will make it easier to check for hpd_ignore when we add debugfs support. Signed-off-by: Sean Anderson --- (no changes since v3) Changes in v3: - New drivers/gpu/drm/xlnx/zynqmp_dp.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp= _dp.c index e0ab3b3e8580..f5203ffa3c75 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -1567,14 +1567,13 @@ static int zynqmp_dp_bridge_atomic_check(struct drm= _bridge *bridge, return 0; } =20 -static enum drm_connector_status zynqmp_dp_bridge_detect(struct drm_bridge= *bridge) +static enum drm_connector_status __zynqmp_dp_bridge_detect(struct zynqmp_d= p *dp) { - struct zynqmp_dp *dp =3D bridge_to_dp(bridge); struct zynqmp_dp_link_config *link_config =3D &dp->link_config; u32 state, i; int ret; =20 - mutex_lock(&dp->lock); + lockdep_assert_held(&dp->lock); =20 /* * This is from heuristic. It takes some delay (ex, 100 ~ 500 msec) to @@ -1603,16 +1602,26 @@ static enum drm_connector_status zynqmp_dp_bridge_d= etect(struct drm_bridge *brid dp->num_lanes); =20 dp->status =3D connector_status_connected; - mutex_unlock(&dp->lock); return connector_status_connected; } =20 disconnected: dp->status =3D connector_status_disconnected; - mutex_unlock(&dp->lock); return connector_status_disconnected; } =20 +static enum drm_connector_status zynqmp_dp_bridge_detect(struct drm_bridge= *bridge) +{ + struct zynqmp_dp *dp =3D bridge_to_dp(bridge); + enum drm_connector_status ret; + + mutex_lock(&dp->lock); + ret =3D __zynqmp_dp_bridge_detect(dp); + mutex_unlock(&dp->lock); + + return ret; +} + static const struct drm_edid *zynqmp_dp_bridge_edid_read(struct drm_bridge= *bridge, struct drm_connector *connector) { @@ -1696,7 +1705,10 @@ static void zynqmp_dp_hpd_work_func(struct work_stru= ct *work) struct zynqmp_dp *dp =3D container_of(work, struct zynqmp_dp, hpd_work); enum drm_connector_status status; =20 - status =3D zynqmp_dp_bridge_detect(&dp->bridge); + mutex_lock(&dp->lock); + status =3D __zynqmp_dp_bridge_detect(dp); + mutex_unlock(&dp->lock); + drm_bridge_hpd_notify(&dp->bridge, status); } =20 --=20 2.35.1.1320.gc452695387.dirty From nobody Wed Dec 17 18:59:46 2025 Received: from out-185.mta1.migadu.com (out-185.mta1.migadu.com [95.215.58.185]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9868C16CD16 for ; Fri, 9 Aug 2024 19:36:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.185 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232201; cv=none; b=ubS43s9erHixbQf/Vq2QSDiM932+wexRiZBnBdkFQKMYq4WFPDQH+D2bDIlfeqzeFKThNYKG5m1axYXSyAFZY6HZcbgzsrjkuZCbMeJbXyEsrsXWMSb35Sh4fIzj1WgluJUnrwIQL3koBR7iShttFH3q16iUL7DmkkjEqL9XSd8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723232201; c=relaxed/simple; bh=APHbjFhuADdnKI7XX2YHHsBL7DQoWzDfYLWs8HXWB2g=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BcgZ68EW9/6bzyFuqoGBPAYsi57et5XGjIUvRMpGds2Yec8UuXcKzDj+kYOUvBe59wPZkdwN1uczJaN0sA+C/4jTB3K522YYr5si4w4OeuX1Zm195F+FY0BK9WiYE7tsg7uUEHM1zG5gTORQjUOlEj8b+7Bkii3oN1x4sWWCB24= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=UysOyiE8; arc=none smtp.client-ip=95.215.58.185 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="UysOyiE8" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1723232196; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=k1jj0BYOckdRcWBaF7PakzciL5llI8Oi06630mWRZ4U=; b=UysOyiE84m/AJqbckvEq7/kJ2hjHpb6Vrv5aCH+UlkXUsY/gd5o+Mfnx7UtPXxIGAs0I/c MUV77yN9grmvZLO/4utEGCq2d7zHj6DN+rt6swnug5j0NLSG1mGRPGJYVcdHcsvEISGvN8 Zx0e33zk2mr2zb8K/6tMKn75lTTx/Yk= From: Sean Anderson To: Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, David Airlie , Michal Simek , Daniel Vetter , Tomi Valkeinen , Sean Anderson Subject: [PATCH v6 8/8] drm: zynqmp_dp: Add debugfs interface for compliance testing Date: Fri, 9 Aug 2024 15:36:00 -0400 Message-Id: <20240809193600.3360015-9-sean.anderson@linux.dev> In-Reply-To: <20240809193600.3360015-1-sean.anderson@linux.dev> References: <20240809193600.3360015-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Add a debugfs interface for exercising the various test modes supported by the DisplayPort controller. This allows performing compliance testing, or performing signal integrity measurements on a failing link. At the moment, we do not support sink-driven link quality testing, although such support would be fairly easy to add. Additionally, add some debugfs files for ignoring AUX errors and HPD events, as this can allow testing with equipment that cannot emulate a DPRX. Signed-off-by: Sean Anderson --- (no changes since v2) Changes in v2: - Document debugfs files - Add ignore_aux_errors and ignore_hpd debugfs files to replace earlier implicit functionality - Attempt to fix unreproducable, spurious build warning Documentation/gpu/drivers.rst | 1 + Documentation/gpu/zynqmp.rst | 149 +++++++ MAINTAINERS | 1 + drivers/gpu/drm/xlnx/zynqmp_dp.c | 682 ++++++++++++++++++++++++++++++- 4 files changed, 830 insertions(+), 3 deletions(-) create mode 100644 Documentation/gpu/zynqmp.rst diff --git a/Documentation/gpu/drivers.rst b/Documentation/gpu/drivers.rst index b899cbc5c2b4..187201aedbe5 100644 --- a/Documentation/gpu/drivers.rst +++ b/Documentation/gpu/drivers.rst @@ -22,6 +22,7 @@ GPU Driver Documentation afbc komeda-kms panfrost + zynqmp =20 .. only:: subproject and html =20 diff --git a/Documentation/gpu/zynqmp.rst b/Documentation/gpu/zynqmp.rst new file mode 100644 index 000000000000..f57bfa0ad6ec --- /dev/null +++ b/Documentation/gpu/zynqmp.rst @@ -0,0 +1,149 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +Xilinx ZynqMP Ultrascale+ DisplayPort Subsystem +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +This subsystem handles DisplayPort video and audio output on the ZynqMP. It +supports in-memory framebuffers with the DisplayPort DMA controller +(xilinx-dpdma), as well as "live" video and audio from the programmable lo= gic +(PL). This subsystem can perform several transformations, including color = space +conversion, alpha blending, and audio mixing, although not all features are +currently supported. + +debugfs +------- + +To support debugging and compliance testing, several test modes can be ena= bled +though debugfs. The following files in /sys/kernel/debug/dri/X/DP-1/test/ +control the DisplayPort test modes: + +active: + Writing a 1 to this file will activate test mode, and writing a 0 = will + deactivate test mode. Writing a 1 or 0 when the test mode is alrea= dy + active/inactive will re-activate/re-deactivate test mode. When test + mode is inactive, changes made to other files will have no (immedi= ate) + effect, although the settings will be saved for when test mode is + activated. When test mode is active, changes made to other files w= ill + apply immediately. + +custom: + Custom test pattern value + +downspread: + Enable/disable clock downspreading (spread-spectrum clocking) by + writing 1/0 + +enhanced: + Enable/disable enhanced framing + +ignore_aux_errors: + Ignore AUX errors when set to 1. Writes to this file take effect + immediately (regardless of whether test mode is active) and affect= all + AUX transfers. + +ignore_hpd: + Ignore hotplug events (such as cable removals or monitor link + retraining requests) when set to 1. Writes to this file take effect + immediately (regardless of whether test mode is active). + +laneX_preemphasis: + Preemphasis from 0 (lowest) to 2 (highest) for lane X + +laneX_swing: + Voltage swing from 0 (lowest) to 3 (highest) for lane X + +lanes: + Number of lanes to use (1, 2, or 4) + +pattern: + Test pattern. May be one of: + + video + Use regular video input + + symbol-error + Symbol error measurement pattern + + prbs7 + Output of the PRBS7 (x^7 + x^6 + 1) polynomial + + 80bit-custom + A custom 80-bit pattern + + cp2520 + HBR2 compliance eye pattern + + tps1 + Link training symbol pattern TPS1 (/D10.2/) + + tps2 + Link training symbol pattern TPS2 + + tps3 + Link training symbol pattern TPS3 (for HBR2) + +rate: + Rate in hertz. One of + + * 5400000000 (HBR2) + * 2700000000 (HBR) + * 1620000000 (RBR) + +You can dump the displayport test settings with the following command:: + + for prop in /sys/kernel/debug/dri/1/DP-1/test/*; do + printf '%-17s ' ${prop##*/} + if [ ${prop##*/} =3D custom ]; then + hexdump -C $prop | head -1 + else + cat $prop + fi + done + +The output could look something like:: + + active 1 + custom 00000000 00 00 00 00 00 00 00 00 00 00 = |..........| + downspread 0 + enhanced 1 + ignore_aux_errors 1 + ignore_hpd 1 + lane0_preemphasis 0 + lane0_swing 3 + lane1_preemphasis 0 + lane1_swing 3 + lanes 2 + pattern prbs7 + rate 1620000000 + +The recommended test procedure is to connect the board to a monitor, +configure test mode, activate test mode, and then disconnect the cable +and connect it to your test equipment of choice. For example, one +sequence of commands could be:: + + echo 1 > /sys/kernel/debug/dri/1/DP-1/test/enhanced + echo tps1 > /sys/kernel/debug/dri/1/DP-1/test/pattern + echo 1620000000 > /sys/kernel/debug/dri/1/DP-1/test/rate + echo 1 > /sys/kernel/debug/dri/1/DP-1/test/ignore_aux_errors + echo 1 > /sys/kernel/debug/dri/1/DP-1/test/ignore_hpd + echo 1 > /sys/kernel/debug/dri/1/DP-1/test/active + +at which point the cable could be disconnected from the monitor. + +Internals +--------- + +.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_disp.h + +.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_dpsub.h + +.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_kms.h + +.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_disp.c + +.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_dp.c + +.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_dpsub.c + +.. kernel-doc:: drivers/gpu/drm/xlnx/zynqmp_kms.c diff --git a/MAINTAINERS b/MAINTAINERS index e72268c0fd26..ff387af9350d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7570,6 +7570,7 @@ L: dri-devel@lists.freedesktop.org S: Maintained T: git https://gitlab.freedesktop.org/drm/misc/kernel.git F: Documentation/devicetree/bindings/display/xlnx/ +F: Documentation/gpu/zynqmp.rst F: drivers/gpu/drm/xlnx/ =20 DRM GPU SCHEDULER diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp= _dp.c index f5203ffa3c75..f76107430bd0 100644 --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c @@ -18,7 +18,9 @@ #include #include =20 +#include #include +#include #include #include #include @@ -51,6 +53,7 @@ MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in= msec (default: 4)"); #define ZYNQMP_DP_LANE_COUNT_SET 0x4 #define ZYNQMP_DP_ENHANCED_FRAME_EN 0x8 #define ZYNQMP_DP_TRAINING_PATTERN_SET 0xc +#define ZYNQMP_DP_LINK_QUAL_PATTERN_SET 0x10 #define ZYNQMP_DP_SCRAMBLING_DISABLE 0x14 #define ZYNQMP_DP_DOWNSPREAD_CTL 0x18 #define ZYNQMP_DP_SOFTWARE_RESET 0x1c @@ -64,6 +67,9 @@ MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay in= msec (default: 4)"); ZYNQMP_DP_SOFTWARE_RESET_STREAM3 | \ ZYNQMP_DP_SOFTWARE_RESET_STREAM4 | \ ZYNQMP_DP_SOFTWARE_RESET_AUX) +#define ZYNQMP_DP_COMP_PATTERN_80BIT_1 0x20 +#define ZYNQMP_DP_COMP_PATTERN_80BIT_2 0x24 +#define ZYNQMP_DP_COMP_PATTERN_80BIT_3 0x28 =20 /* Core enable registers */ #define ZYNQMP_DP_TRANSMITTER_ENABLE 0x80 @@ -207,6 +213,7 @@ MODULE_PARM_DESC(power_on_delay_ms, "DP power on delay = in msec (default: 4)"); #define ZYNQMP_DP_TX_PHY_POWER_DOWN_LANE_2 BIT(2) #define ZYNQMP_DP_TX_PHY_POWER_DOWN_LANE_3 BIT(3) #define ZYNQMP_DP_TX_PHY_POWER_DOWN_ALL 0xf +#define ZYNQMP_DP_TRANSMIT_PRBS7 0x230 #define ZYNQMP_DP_PHY_PRECURSOR_LANE_0 0x23c #define ZYNQMP_DP_PHY_PRECURSOR_LANE_1 0x240 #define ZYNQMP_DP_PHY_PRECURSOR_LANE_2 0x244 @@ -274,6 +281,69 @@ struct zynqmp_dp_config { u8 bpp; }; =20 +/** + * enum test_pattern - Test patterns for test testing + * @TEST_VIDEO: Use regular video input + * @TEST_SYMBOL_ERROR: Symbol error measurement pattern + * @TEST_PRBS7: Output of the PRBS7 (x^7 + x^6 + 1) polynomial + * @TEST_80BIT_CUSTOM: A custom 80-bit pattern + * @TEST_CP2520: HBR2 compliance eye pattern + * @TEST_TPS1: Link training symbol pattern TPS1 (/D10.2/) + * @TEST_TPS2: Link training symbol pattern TPS2 + * @TEST_TPS3: Link training symbol pattern TPS3 (for HBR2) + */ +enum test_pattern { + TEST_VIDEO, + TEST_TPS1, + TEST_TPS2, + TEST_TPS3, + TEST_SYMBOL_ERROR, + TEST_PRBS7, + TEST_80BIT_CUSTOM, + TEST_CP2520, +}; + +static const char *const test_pattern_str[] =3D { + [TEST_VIDEO] =3D "video", + [TEST_TPS1] =3D "tps1", + [TEST_TPS2] =3D "tps2", + [TEST_TPS3] =3D "tps3", + [TEST_SYMBOL_ERROR] =3D "symbol-error", + [TEST_PRBS7] =3D "prbs7", + [TEST_80BIT_CUSTOM] =3D "80bit-custom", + [TEST_CP2520] =3D "cp2520", +}; + +/** + * struct zynqmp_dp_test - Configuration for test mode + * @pattern: The test pattern + * @enhanced: Use enhanced framing + * @downspread: Use SSC + * @active: Whether test mode is active + * @custom: Custom pattern for %TEST_80BIT_CUSTOM + * @train_set: Voltage/preemphasis settings + * @bw_code: Bandwidth code for the link + * @link_cnt: Number of lanes + */ +struct zynqmp_dp_test { + enum test_pattern pattern; + bool enhanced, downspread, active; + u8 custom[10]; + u8 train_set[ZYNQMP_DP_MAX_LANES]; + u8 bw_code; + u8 link_cnt; +}; + +/** + * struct zynqmp_dp_train_set_priv - Private data for train_set debugfs fi= les + * @dp: DisplayPort IP core structure + * @lane: The lane for this file + */ +struct zynqmp_dp_train_set_priv { + struct zynqmp_dp *dp; + int lane; +}; + /** * struct zynqmp_dp - Xilinx DisplayPort core * @dev: device structure @@ -284,23 +354,28 @@ struct zynqmp_dp_config { * @irq: irq * @bridge: DRM bridge for the DP encoder * @next_bridge: The downstream bridge + * @test: Configuration for test mode * @config: IP core configuration from DTS * @aux: aux channel * @aux_done: Completed when we get an AUX reply or timeout + * @ignore_aux_errors: If set, AUX errors are suppressed * @phy: PHY handles for DP lanes * @num_lanes: number of enabled phy lanes * @hpd_work: hot plug detection worker * @hpd_irq_work: hot plug detection IRQ worker + * @ignore_hpd: If set, HPD events and IRQs are ignored * @status: connection status * @enabled: flag to indicate if the device is enabled * @dpcd: DP configuration data from currently connected sink device * @link_config: common link configuration between IP core and sink device * @mode: current mode between IP core and sink device * @train_set: set of training data + * @debugfs_train_set: Debugfs private data for @train_set * * @lock covers the link configuration in this struct and the device's - * registers. It does not cover @aux. It is not strictly required for any = of - * the members which are only modified at probe/remove time (e.g. @dev). + * registers. It does not cover @aux or @ignore_aux_errors. It is not stri= ctly + * required for any of the members which are only modified at probe/remove= time + * (e.g. @dev). */ struct zynqmp_dp { struct drm_dp_aux aux; @@ -320,9 +395,13 @@ struct zynqmp_dp { enum drm_connector_status status; int irq; bool enabled; + bool ignore_aux_errors; + bool ignore_hpd; =20 + struct zynqmp_dp_train_set_priv debugfs_train_set[ZYNQMP_DP_MAX_LANES]; struct zynqmp_dp_mode mode; struct zynqmp_dp_link_config link_config; + struct zynqmp_dp_test test; struct zynqmp_dp_config config; u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 train_set[ZYNQMP_DP_MAX_LANES]; @@ -1035,6 +1114,8 @@ zynqmp_dp_aux_transfer(struct drm_dp_aux *aux, struct= drm_dp_aux_msg *msg) =20 if (dp->status =3D=3D connector_status_disconnected) { dev_dbg(dp->dev, "no connected aux device\n"); + if (dp->ignore_aux_errors) + goto fake_response; return -ENODEV; } =20 @@ -1043,7 +1124,13 @@ zynqmp_dp_aux_transfer(struct drm_dp_aux *aux, struc= t drm_dp_aux_msg *msg) =20 dev_dbg(dp->dev, "failed to do aux transfer (%d)\n", ret); =20 - return ret; + if (!dp->ignore_aux_errors) + return ret; + +fake_response: + msg->reply =3D DP_AUX_NATIVE_REPLY_ACK; + memset(msg->buffer, 0, msg->size); + return msg->size; } =20 /** @@ -1659,6 +1746,584 @@ zynqmp_dp_bridge_get_input_bus_fmts(struct drm_brid= ge *bridge, return zynqmp_dp_bridge_default_bus_fmts(num_input_fmts); } =20 +/* -----------------------------------------------------------------------= ------ + * debugfs + */ + +/** + * zynqmp_dp_set_test_pattern() - Configure the link for a test pattern + * @dp: DisplayPort IP core structure + * @pattern: The test pattern to configure + * @custom: The custom pattern to use if @pattern is %TEST_80BIT_CUSTOM + * + * Return: 0 on success, or negative errno on (DPCD) failure + */ +static int zynqmp_dp_set_test_pattern(struct zynqmp_dp *dp, + enum test_pattern pattern, + u8 *const custom) +{ + bool scramble =3D false; + u32 train_pattern =3D 0; + u32 link_pattern =3D 0; + u8 dpcd_train =3D 0; + u8 dpcd_link =3D 0; + int ret; + + switch (pattern) { + case TEST_TPS1: + train_pattern =3D 1; + break; + case TEST_TPS2: + train_pattern =3D 2; + break; + case TEST_TPS3: + train_pattern =3D 3; + break; + case TEST_SYMBOL_ERROR: + scramble =3D true; + link_pattern =3D DP_PHY_TEST_PATTERN_ERROR_COUNT; + break; + case TEST_PRBS7: + /* We use a dedicated register to enable PRBS7 */ + dpcd_link =3D DP_LINK_QUAL_PATTERN_ERROR_RATE; + break; + case TEST_80BIT_CUSTOM: { + const u8 *p =3D custom; + + link_pattern =3D DP_LINK_QUAL_PATTERN_80BIT_CUSTOM; + + zynqmp_dp_write(dp, ZYNQMP_DP_COMP_PATTERN_80BIT_1, + (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); + zynqmp_dp_write(dp, ZYNQMP_DP_COMP_PATTERN_80BIT_2, + (p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4]); + zynqmp_dp_write(dp, ZYNQMP_DP_COMP_PATTERN_80BIT_3, + (p[9] << 8) | p[8]); + break; + } + case TEST_CP2520: + link_pattern =3D DP_LINK_QUAL_PATTERN_CP2520_PAT_1; + break; + default: + WARN_ON_ONCE(1); + fallthrough; + case TEST_VIDEO: + scramble =3D true; + } + + zynqmp_dp_write(dp, ZYNQMP_DP_SCRAMBLING_DISABLE, !scramble); + zynqmp_dp_write(dp, ZYNQMP_DP_TRAINING_PATTERN_SET, train_pattern); + zynqmp_dp_write(dp, ZYNQMP_DP_LINK_QUAL_PATTERN_SET, link_pattern); + zynqmp_dp_write(dp, ZYNQMP_DP_TRANSMIT_PRBS7, pattern =3D=3D TEST_PRBS7); + + dpcd_link =3D dpcd_link ?: link_pattern; + dpcd_train =3D train_pattern; + if (!scramble) + dpcd_train |=3D DP_LINK_SCRAMBLING_DISABLE; + + if (dp->dpcd[DP_DPCD_REV] < 0x12) { + if (pattern =3D=3D TEST_CP2520) + dev_warn(dp->dev, + "can't set sink link quality pattern to CP2520 for DPCD < r1.2; error = counters will be invalid\n"); + else + dpcd_train |=3D FIELD_PREP(DP_LINK_QUAL_PATTERN_11_MASK, + dpcd_link); + } else { + u8 dpcd_link_lane[ZYNQMP_DP_MAX_LANES]; + + memset(dpcd_link_lane, dpcd_link, ZYNQMP_DP_MAX_LANES); + ret =3D drm_dp_dpcd_write(&dp->aux, DP_LINK_QUAL_LANE0_SET, + dpcd_link_lane, ZYNQMP_DP_MAX_LANES); + if (ret < 0) + return ret; + } + + ret =3D drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, dpcd_train); + return ret < 0 ? ret : 0; +} + +static int zynqmp_dp_test_setup(struct zynqmp_dp *dp) +{ + return zynqmp_dp_setup(dp, dp->test.bw_code, dp->test.link_cnt, + dp->test.enhanced, dp->test.downspread); +} + +static ssize_t zynqmp_dp_pattern_read(struct file *file, char __user *user= _buf, + size_t count, loff_t *ppos) +{ + struct dentry *dentry =3D file->f_path.dentry; + struct zynqmp_dp *dp =3D file->private_data; + char buf[16]; + ssize_t ret; + + ret =3D debugfs_file_get(dentry); + if (unlikely(ret)) + return ret; + + mutex_lock(&dp->lock); + ret =3D snprintf(buf, sizeof(buf), "%s\n", + test_pattern_str[dp->test.pattern]); + mutex_unlock(&dp->lock); + + debugfs_file_put(dentry); + return simple_read_from_buffer(user_buf, count, ppos, buf, ret); +} + +static ssize_t zynqmp_dp_pattern_write(struct file *file, + const char __user *user_buf, + size_t count, loff_t *ppos) +{ + + struct dentry *dentry =3D file->f_path.dentry; + struct zynqmp_dp *dp =3D file->private_data; + char buf[16]; + ssize_t ret; + int pattern; + + ret =3D debugfs_file_get(dentry); + if (unlikely(ret)) + return ret; + + ret =3D simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, user_buf, + count); + if (ret < 0) + goto out; + buf[ret] =3D '\0'; + + pattern =3D sysfs_match_string(test_pattern_str, buf); + if (pattern < 0) { + ret =3D -EINVAL; + goto out; + } + + mutex_lock(&dp->lock); + dp->test.pattern =3D pattern; + if (dp->test.active) + ret =3D zynqmp_dp_set_test_pattern(dp, dp->test.pattern, + dp->test.custom) ?: ret; + mutex_unlock(&dp->lock); + +out: + debugfs_file_put(dentry); + return ret; +} + +static const struct file_operations fops_zynqmp_dp_pattern =3D { + .read =3D zynqmp_dp_pattern_read, + .write =3D zynqmp_dp_pattern_write, + .open =3D simple_open, + .llseek =3D noop_llseek, +}; + +static int zynqmp_dp_enhanced_get(void *data, u64 *val) +{ + struct zynqmp_dp *dp =3D data; + + mutex_lock(&dp->lock); + *val =3D dp->test.enhanced; + mutex_unlock(&dp->lock); + return 0; +} + +static int zynqmp_dp_enhanced_set(void *data, u64 val) +{ + struct zynqmp_dp *dp =3D data; + int ret =3D 0; + + mutex_lock(&dp->lock); + dp->test.enhanced =3D val; + if (dp->test.active) + ret =3D zynqmp_dp_test_setup(dp); + mutex_unlock(&dp->lock); + + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_enhanced, zynqmp_dp_enhanced_get, + zynqmp_dp_enhanced_set, "%llu\n"); + +static int zynqmp_dp_downspread_get(void *data, u64 *val) +{ + struct zynqmp_dp *dp =3D data; + + mutex_lock(&dp->lock); + *val =3D dp->test.downspread; + mutex_unlock(&dp->lock); + return 0; +} + +static int zynqmp_dp_downspread_set(void *data, u64 val) +{ + struct zynqmp_dp *dp =3D data; + int ret =3D 0; + + mutex_lock(&dp->lock); + dp->test.downspread =3D val; + if (dp->test.active) + ret =3D zynqmp_dp_test_setup(dp); + mutex_unlock(&dp->lock); + + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_downspread, zynqmp_dp_downspread_g= et, + zynqmp_dp_downspread_set, "%llu\n"); + +static int zynqmp_dp_active_get(void *data, u64 *val) +{ + struct zynqmp_dp *dp =3D data; + + mutex_lock(&dp->lock); + *val =3D dp->test.active; + mutex_unlock(&dp->lock); + return 0; +} + +static int zynqmp_dp_active_set(void *data, u64 val) +{ + struct zynqmp_dp *dp =3D data; + int ret =3D 0; + + mutex_lock(&dp->lock); + if (val) { + if (val < 2) { + ret =3D zynqmp_dp_test_setup(dp); + if (ret) + goto out; + } + + ret =3D zynqmp_dp_set_test_pattern(dp, dp->test.pattern, + dp->test.custom); + if (ret) + goto out; + + ret =3D zynqmp_dp_update_vs_emph(dp, dp->test.train_set); + if (ret) + goto out; + + dp->test.active =3D true; + } else { + int err; + + dp->test.active =3D false; + err =3D zynqmp_dp_set_test_pattern(dp, TEST_VIDEO, NULL); + if (err) + dev_warn(dp->dev, "could not clear test pattern: %d\n", + err); + zynqmp_dp_train_loop(dp); + } +out: + mutex_unlock(&dp->lock); + + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_active, zynqmp_dp_active_get, + zynqmp_dp_active_set, "%llu\n"); + +static ssize_t zynqmp_dp_custom_read(struct file *file, char __user *user_= buf, + size_t count, loff_t *ppos) +{ + struct dentry *dentry =3D file->f_path.dentry; + struct zynqmp_dp *dp =3D file->private_data; + ssize_t ret; + + ret =3D debugfs_file_get(dentry); + if (unlikely(ret)) + return ret; + + mutex_lock(&dp->lock); + ret =3D simple_read_from_buffer(user_buf, count, ppos, &dp->test.custom, + sizeof(dp->test.custom)); + mutex_unlock(&dp->lock); + + debugfs_file_put(dentry); + return ret; +} + +static ssize_t zynqmp_dp_custom_write(struct file *file, + const char __user *user_buf, + size_t count, loff_t *ppos) +{ + + struct dentry *dentry =3D file->f_path.dentry; + struct zynqmp_dp *dp =3D file->private_data; + ssize_t ret; + char buf[sizeof(dp->test.custom)]; + + ret =3D debugfs_file_get(dentry); + if (unlikely(ret)) + return ret; + + ret =3D simple_write_to_buffer(buf, sizeof(buf), ppos, user_buf, count); + if (ret < 0) + goto out; + + mutex_lock(&dp->lock); + memcpy(dp->test.custom, buf, ret); + if (dp->test.active) + ret =3D zynqmp_dp_set_test_pattern(dp, dp->test.pattern, + dp->test.custom) ?: ret; + mutex_unlock(&dp->lock); + +out: + debugfs_file_put(dentry); + return ret; +} + +static const struct file_operations fops_zynqmp_dp_custom =3D { + .read =3D zynqmp_dp_custom_read, + .write =3D zynqmp_dp_custom_write, + .open =3D simple_open, + .llseek =3D noop_llseek, +}; + +static int zynqmp_dp_swing_get(void *data, u64 *val) +{ + struct zynqmp_dp_train_set_priv *priv =3D data; + struct zynqmp_dp *dp =3D priv->dp; + + mutex_lock(&dp->lock); + *val =3D dp->test.train_set[priv->lane] & DP_TRAIN_VOLTAGE_SWING_MASK; + mutex_unlock(&dp->lock); + return 0; +} + +static int zynqmp_dp_swing_set(void *data, u64 val) +{ + struct zynqmp_dp_train_set_priv *priv =3D data; + struct zynqmp_dp *dp =3D priv->dp; + u8 *train_set =3D &dp->test.train_set[priv->lane]; + int ret =3D 0; + + if (val > 3) + return -EINVAL; + + mutex_lock(&dp->lock); + *train_set &=3D ~(DP_TRAIN_MAX_SWING_REACHED | + DP_TRAIN_VOLTAGE_SWING_MASK); + *train_set |=3D val; + if (val =3D=3D 3) + *train_set |=3D DP_TRAIN_MAX_SWING_REACHED; + + if (dp->test.active) + ret =3D zynqmp_dp_update_vs_emph(dp, dp->test.train_set); + mutex_unlock(&dp->lock); + + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_swing, zynqmp_dp_swing_get, + zynqmp_dp_swing_set, "%llu\n"); + +static int zynqmp_dp_preemphasis_get(void *data, u64 *val) +{ + struct zynqmp_dp_train_set_priv *priv =3D data; + struct zynqmp_dp *dp =3D priv->dp; + + mutex_lock(&dp->lock); + *val =3D FIELD_GET(DP_TRAIN_PRE_EMPHASIS_MASK, + dp->test.train_set[priv->lane]); + mutex_unlock(&dp->lock); + return 0; +} + +static int zynqmp_dp_preemphasis_set(void *data, u64 val) +{ + struct zynqmp_dp_train_set_priv *priv =3D data; + struct zynqmp_dp *dp =3D priv->dp; + u8 *train_set =3D &dp->test.train_set[priv->lane]; + int ret =3D 0; + + if (val > 2) + return -EINVAL; + + mutex_lock(&dp->lock); + *train_set &=3D ~(DP_TRAIN_MAX_PRE_EMPHASIS_REACHED | + DP_TRAIN_PRE_EMPHASIS_MASK); + *train_set |=3D val; + if (val =3D=3D 2) + *train_set |=3D DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; + + if (dp->test.active) + ret =3D zynqmp_dp_update_vs_emph(dp, dp->test.train_set); + mutex_unlock(&dp->lock); + + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_preemphasis, zynqmp_dp_preemphasis= _get, + zynqmp_dp_preemphasis_set, "%llu\n"); + +static int zynqmp_dp_lanes_get(void *data, u64 *val) +{ + struct zynqmp_dp *dp =3D data; + + mutex_lock(&dp->lock); + *val =3D dp->test.link_cnt; + mutex_unlock(&dp->lock); + return 0; +} + +static int zynqmp_dp_lanes_set(void *data, u64 val) +{ + struct zynqmp_dp *dp =3D data; + int ret =3D 0; + + if (val > ZYNQMP_DP_MAX_LANES) + return -EINVAL; + + mutex_lock(&dp->lock); + if (val > dp->num_lanes) { + ret =3D -EINVAL; + } else { + dp->test.link_cnt =3D val; + if (dp->test.active) + ret =3D zynqmp_dp_test_setup(dp); + } + mutex_unlock(&dp->lock); + + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_lanes, zynqmp_dp_lanes_get, + zynqmp_dp_lanes_set, "%llu\n"); + +static int zynqmp_dp_rate_get(void *data, u64 *val) +{ + struct zynqmp_dp *dp =3D data; + + mutex_lock(&dp->lock); + *val =3D drm_dp_bw_code_to_link_rate(dp->test.bw_code) * 10000; + mutex_unlock(&dp->lock); + return 0; +} + +static int zynqmp_dp_rate_set(void *data, u64 val) +{ + struct zynqmp_dp *dp =3D data; + int link_rate; + int ret =3D 0; + u8 bw_code; + + if (do_div(val, 10000)) + return -EINVAL; + + bw_code =3D drm_dp_link_rate_to_bw_code(val); + link_rate =3D drm_dp_bw_code_to_link_rate(bw_code); + if (val !=3D link_rate) + return -EINVAL; + + if (bw_code !=3D DP_LINK_BW_1_62 && bw_code !=3D DP_LINK_BW_2_7 && + bw_code !=3D DP_LINK_BW_5_4) + return -EINVAL; + + mutex_lock(&dp->lock); + dp->test.bw_code =3D bw_code; + if (dp->test.active) + ret =3D zynqmp_dp_test_setup(dp); + mutex_unlock(&dp->lock); + + return ret; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_rate, zynqmp_dp_rate_get, + zynqmp_dp_rate_set, "%llu\n"); + +static int zynqmp_dp_ignore_aux_errors_get(void *data, u64 *val) +{ + struct zynqmp_dp *dp =3D data; + + mutex_lock(&dp->aux.hw_mutex); + *val =3D dp->ignore_aux_errors; + mutex_unlock(&dp->aux.hw_mutex); + return 0; +} + +static int zynqmp_dp_ignore_aux_errors_set(void *data, u64 val) +{ + struct zynqmp_dp *dp =3D data; + + if (val !=3D !!val) + return -EINVAL; + + mutex_lock(&dp->aux.hw_mutex); + dp->ignore_aux_errors =3D val; + mutex_unlock(&dp->aux.hw_mutex); + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_ignore_aux_errors, + zynqmp_dp_ignore_aux_errors_get, + zynqmp_dp_ignore_aux_errors_set, "%llu\n"); + +static int zynqmp_dp_ignore_hpd_get(void *data, u64 *val) +{ + struct zynqmp_dp *dp =3D data; + + mutex_lock(&dp->lock); + *val =3D dp->ignore_hpd; + mutex_unlock(&dp->lock); + return 0; +} + +static int zynqmp_dp_ignore_hpd_set(void *data, u64 val) +{ + struct zynqmp_dp *dp =3D data; + + if (val !=3D !!val) + return -EINVAL; + + mutex_lock(&dp->lock); + dp->ignore_hpd =3D val; + mutex_lock(&dp->lock); + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_zynqmp_dp_ignore_hpd, zynqmp_dp_ignore_hpd_g= et, + zynqmp_dp_ignore_hpd_set, "%llu\n"); + +static void zynqmp_dp_bridge_debugfs_init(struct drm_bridge *bridge, + struct dentry *root) +{ + struct zynqmp_dp *dp =3D bridge_to_dp(bridge); + struct dentry *test; + int i; + + dp->test.bw_code =3D DP_LINK_BW_5_4; + dp->test.link_cnt =3D dp->num_lanes; + + test =3D debugfs_create_dir("test", root); +#define CREATE_FILE(name) \ + debugfs_create_file(#name, 0600, test, dp, &fops_zynqmp_dp_##name) + CREATE_FILE(pattern); + CREATE_FILE(enhanced); + CREATE_FILE(downspread); + CREATE_FILE(active); + CREATE_FILE(custom); + CREATE_FILE(rate); + CREATE_FILE(lanes); + CREATE_FILE(ignore_aux_errors); + CREATE_FILE(ignore_hpd); + + for (i =3D 0; i < dp->num_lanes; i++) { + static const char fmt[] =3D "lane%d_preemphasis"; + char name[sizeof(fmt)]; + + dp->debugfs_train_set[i].dp =3D dp; + dp->debugfs_train_set[i].lane =3D i; + + snprintf(name, sizeof(name), fmt, i); + debugfs_create_file(name, 0600, test, + &dp->debugfs_train_set[i], + &fops_zynqmp_dp_preemphasis); + + snprintf(name, sizeof(name), "lane%d_swing", i); + debugfs_create_file(name, 0600, test, + &dp->debugfs_train_set[i], + &fops_zynqmp_dp_swing); + } +} + static const struct drm_bridge_funcs zynqmp_dp_bridge_funcs =3D { .attach =3D zynqmp_dp_bridge_attach, .detach =3D zynqmp_dp_bridge_detach, @@ -1672,6 +2337,7 @@ static const struct drm_bridge_funcs zynqmp_dp_bridge= _funcs =3D { .detect =3D zynqmp_dp_bridge_detect, .edid_read =3D zynqmp_dp_bridge_edid_read, .atomic_get_input_bus_fmts =3D zynqmp_dp_bridge_get_input_bus_fmts, + .debugfs_init =3D zynqmp_dp_bridge_debugfs_init, }; =20 /* -----------------------------------------------------------------------= ------ @@ -1706,6 +2372,11 @@ static void zynqmp_dp_hpd_work_func(struct work_stru= ct *work) enum drm_connector_status status; =20 mutex_lock(&dp->lock); + if (dp->ignore_hpd) { + mutex_unlock(&dp->lock); + return; + } + status =3D __zynqmp_dp_bridge_detect(dp); mutex_unlock(&dp->lock); =20 @@ -1720,6 +2391,11 @@ static void zynqmp_dp_hpd_irq_work_func(struct work_= struct *work) int err; =20 mutex_lock(&dp->lock); + if (dp->ignore_hpd) { + mutex_unlock(&dp->lock); + return; + } + err =3D drm_dp_dpcd_read(&dp->aux, DP_SINK_COUNT, status, DP_LINK_STATUS_SIZE + 2); if (err < 0) { --=20 2.35.1.1320.gc452695387.dirty