From nobody Thu Dec 18 18:01:14 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E8A816D4D2 for ; Fri, 9 Aug 2024 05:58:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723183095; cv=none; b=qBxy90m9dtzgx1MAQP+A0MG2u0Ert0FMrEDX/6JnD9kN5N48P+63WW9smAKaeVZhuDZIV1nD2kz3NDcsce5DqQTXaSuE8SvirYrUgiN6sU0sELDs7rIja1a7NOBIluQrcYQK51x7KgI2ZRWe24zwPiO+nmKSfyhrTMfhM+SnrkA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723183095; c=relaxed/simple; bh=HFZE57x2+Nj1jkA/bX23L4spW8btu9BuCoFmdE33nLA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NJChRZsWXglhFOasEOHj8T2tDAn4Du51f/J5v92soFXAnE6yNALDPzjMYlKBJDlAz4piF7yLoHKr8oSQI9VJW0U/ZaJBs6p+NdIPsRJ0zuHOYuL1nnXQz4YyVv0Wpccg/XvSzvX1n+5PI5oi1egcy+VLKoVyIO/BZEiwKFW9mNQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JxsStSof; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JxsStSof" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723183094; x=1754719094; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HFZE57x2+Nj1jkA/bX23L4spW8btu9BuCoFmdE33nLA=; b=JxsStSoffGVTovjPiLiy07Ilkln/KG8Vo+/0BQEMxC03E2qKVdwwP193 p4BY4dZXSIkYU9AlUfFi0Xp8Lc8BpeRytH6DirmLEJ3tVr7cT4bEx2dIO YefUoy/It+/cRRRZdB0wKyixPX1ttxMtchBgRSp9WzYxyRFhrjlngZ3j9 rhELA4l4MeyQqPJUMk3UhdmHJBJPTGFXgDucgUG5eFRcEV8RSGZZfaZ2F 3gBVj3tWXyMAO6LEMhCuYI3DLodRiu3EFT0zRyyxH3XerfYZsWrXDm7e8 4QBwUyexkPI/dBuIdICN9voWG/WbNX8//zwRHSCAyy6NrOEhNb4MyW+jv g==; X-CSE-ConnectionGUID: bUIVlhd1SWiBENGoaUZ6ww== X-CSE-MsgGUID: IUpXLCZwS2KCz22rpKHipg== X-IronPort-AV: E=McAfee;i="6700,10204,11158"; a="21469154" X-IronPort-AV: E=Sophos;i="6.09,275,1716274800"; d="scan'208";a="21469154" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2024 22:58:14 -0700 X-CSE-ConnectionGUID: ERqxv9LVSy2+gPg6Vpt1+w== X-CSE-MsgGUID: /VyJAjy5Twa3qL+NKN8bNg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,275,1716274800"; d="scan'208";a="57540924" Received: from allen-box.sh.intel.com ([10.239.159.127]) by fmviesa010.fm.intel.com with ESMTP; 08 Aug 2024 22:58:12 -0700 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Lu Baolu , Jason Gunthorpe Subject: [PATCH v4 5/7] iommu/vt-d: Factor out helpers from domain_context_mapping_one() Date: Fri, 9 Aug 2024 13:54:29 +0800 Message-Id: <20240809055431.36513-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240809055431.36513-1-baolu.lu@linux.intel.com> References: <20240809055431.36513-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extract common code from domain_context_mapping_one() into new helpers, making it reusable by other functions such as the upcoming identity domain implementation. No intentional functional changes. Reviewed-by: Jason Gunthorpe Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 99 ++++++++++++++++++++++--------------- 1 file changed, 58 insertions(+), 41 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index aa8e10a2ad51..7950152bb4e6 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1597,6 +1597,61 @@ static void domain_exit(struct dmar_domain *domain) kfree(domain); } =20 +/* + * For kdump cases, old valid entries may be cached due to the + * in-flight DMA and copied pgtable, but there is no unmapping + * behaviour for them, thus we need an explicit cache flush for + * the newly-mapped device. For kdump, at this point, the device + * is supposed to finish reset at its driver probe stage, so no + * in-flight DMA will exist, and we don't need to worry anymore + * hereafter. + */ +static void copied_context_tear_down(struct intel_iommu *iommu, + struct context_entry *context, + u8 bus, u8 devfn) +{ + u16 did_old; + + if (!context_copied(iommu, bus, devfn)) + return; + + assert_spin_locked(&iommu->lock); + + did_old =3D context_domain_id(context); + context_clear_entry(context); + + if (did_old < cap_ndoms(iommu->cap)) { + iommu->flush.flush_context(iommu, did_old, + (((u16)bus) << 8) | devfn, + DMA_CCMD_MASK_NOBIT, + DMA_CCMD_DEVICE_INVL); + iommu->flush.flush_iotlb(iommu, did_old, 0, 0, + DMA_TLB_DSI_FLUSH); + } + + clear_context_copied(iommu, bus, devfn); +} + +/* + * It's a non-present to present mapping. If hardware doesn't cache + * non-present entry we only need to flush the write-buffer. If the + * _does_ cache non-present entries, then it does so in the special + * domain #0, which we have to flush: + */ +static void context_present_cache_flush(struct intel_iommu *iommu, u16 did, + u8 bus, u8 devfn) +{ + if (cap_caching_mode(iommu->cap)) { + iommu->flush.flush_context(iommu, 0, + (((u16)bus) << 8) | devfn, + DMA_CCMD_MASK_NOBIT, + DMA_CCMD_DEVICE_INVL); + iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH); + } else { + iommu_flush_write_buffer(iommu); + } +} + static int domain_context_mapping_one(struct dmar_domain *domain, struct intel_iommu *iommu, u8 bus, u8 devfn) @@ -1625,31 +1680,9 @@ static int domain_context_mapping_one(struct dmar_do= main *domain, if (context_present(context) && !context_copied(iommu, bus, devfn)) goto out_unlock; =20 - /* - * For kdump cases, old valid entries may be cached due to the - * in-flight DMA and copied pgtable, but there is no unmapping - * behaviour for them, thus we need an explicit cache flush for - * the newly-mapped device. For kdump, at this point, the device - * is supposed to finish reset at its driver probe stage, so no - * in-flight DMA will exist, and we don't need to worry anymore - * hereafter. - */ - if (context_copied(iommu, bus, devfn)) { - u16 did_old =3D context_domain_id(context); - - if (did_old < cap_ndoms(iommu->cap)) { - iommu->flush.flush_context(iommu, did_old, - (((u16)bus) << 8) | devfn, - DMA_CCMD_MASK_NOBIT, - DMA_CCMD_DEVICE_INVL); - iommu->flush.flush_iotlb(iommu, did_old, 0, 0, - DMA_TLB_DSI_FLUSH); - } - - clear_context_copied(iommu, bus, devfn); - } - + copied_context_tear_down(iommu, context, bus, devfn); context_clear_entry(context); + context_set_domain_id(context, did); =20 if (translation !=3D CONTEXT_TT_PASS_THROUGH) { @@ -1685,23 +1718,7 @@ static int domain_context_mapping_one(struct dmar_do= main *domain, context_set_present(context); if (!ecap_coherent(iommu->ecap)) clflush_cache_range(context, sizeof(*context)); - - /* - * It's a non-present to present mapping. If hardware doesn't cache - * non-present entry we only need to flush the write-buffer. If the - * _does_ cache non-present entries, then it does so in the special - * domain #0, which we have to flush: - */ - if (cap_caching_mode(iommu->cap)) { - iommu->flush.flush_context(iommu, 0, - (((u16)bus) << 8) | devfn, - DMA_CCMD_MASK_NOBIT, - DMA_CCMD_DEVICE_INVL); - iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH); - } else { - iommu_flush_write_buffer(iommu); - } - + context_present_cache_flush(iommu, did, bus, devfn); ret =3D 0; =20 out_unlock: --=20 2.34.1