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Signed-off-by: Matthias Schiffer --- v3: - Rebased to v6.11-rc1 v2: - Dropped binding change patch - Moved prueth device node to DTS toplevel, matching the AM64x EVM - Update firmware filenames to match EVM .../dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts | 98 +++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts b/arch/= arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts index c40ad67cee019..c2a62cb763a59 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts @@ -24,6 +24,8 @@ / { =20 aliases { ethernet0 =3D &cpsw_port1; + ethernet1 =3D &icssg1_emac0; + ethernet2 =3D &icssg1_emac1; i2c1 =3D &mcu_i2c0; mmc1 =3D &sdhci1; serial0 =3D &mcu_uart0; @@ -71,6 +73,66 @@ led-1 { }; }; =20 + icssg1_eth: icssg1-eth { + compatible =3D "ti,am642-icssg-prueth"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pru_icssg1_rgmii1_pins>, <&pru_icssg1_rgmii2_pins>; + interrupt-parent =3D <&icssg1_intc>; + interrupts =3D <24 0 2>, <25 1 3>; + interrupt-names =3D "tx_ts0", "tx_ts1"; + dmas =3D <&main_pktdma 0xc200 15>, /* egress slice 0 */ + <&main_pktdma 0xc201 15>, /* egress slice 0 */ + <&main_pktdma 0xc202 15>, /* egress slice 0 */ + <&main_pktdma 0xc203 15>, /* egress slice 0 */ + <&main_pktdma 0xc204 15>, /* egress slice 1 */ + <&main_pktdma 0xc205 15>, /* egress slice 1 */ + <&main_pktdma 0xc206 15>, /* egress slice 1 */ + <&main_pktdma 0xc207 15>, /* egress slice 1 */ + <&main_pktdma 0x4200 15>, /* ingress slice 0 */ + <&main_pktdma 0x4201 15>; /* ingress slice 1 */ + dma-names =3D "tx0-0", "tx0-1", "tx0-2", "tx0-3", + "tx1-0", "tx1-1", "tx1-2", "tx1-3", + "rx0", "rx1"; + sram =3D <&oc_sram>; + firmware-name =3D "ti-pruss/am64x-sr2-pru0-prueth-fw.elf", + "ti-pruss/am64x-sr2-rtu0-prueth-fw.elf", + "ti-pruss/am64x-sr2-txpru0-prueth-fw.elf", + "ti-pruss/am64x-sr2-pru1-prueth-fw.elf", + "ti-pruss/am64x-sr2-rtu1-prueth-fw.elf", + "ti-pruss/am64x-sr2-txpru1-prueth-fw.elf"; + ti,prus =3D <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&= tx_pru1_1>; + ti,pruss-gp-mux-sel =3D <2>, /* MII mode */ + <2>, + <2>, + <2>, /* MII mode */ + <2>, + <2>; + ti,mii-g-rt =3D <&icssg1_mii_g_rt>; + ti,mii-rt =3D <&icssg1_mii_rt>; + ti,iep =3D <&icssg1_iep0>, <&icssg1_iep1>; + + ethernet-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + icssg1_emac0: port@0 { + reg =3D <0>; + phy-handle =3D <&icssg1_phy0c>; + phy-mode =3D "rgmii-id"; + /* Filled in by bootloader */ + local-mac-address =3D [00 00 00 00 00 00]; + }; + + icssg1_emac1: port@1 { + reg =3D <1>; + phy-handle =3D <&icssg1_phy03>; + phy-mode =3D "rgmii-id"; + /* Filled in by bootloader */ + local-mac-address =3D [00 00 00 00 00 00]; + }; + }; + }; + fan0: pwm-fan { compatible =3D "pwm-fan"; pinctrl-names =3D "default"; @@ -154,6 +216,42 @@ &epwm5 { status =3D "okay"; }; =20 +&icssg1_mdio { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pru_icssg1_mdio_pins>; + status =3D "okay"; + + /* phy-mode is fixed up to rgmii-rxid by prueth driver to account for + * the SoC integration, so the only rx-internal-delay and no + * tx-internal-delay is set for the PHYs. + */ + + icssg1_phy03: ethernet-phy@3 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x3>; + reset-gpios =3D <&main_gpio1 47 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <1000>; + reset-deassert-us =3D <1000>; + ti,rx-fifo-depth =3D ; + ti,tx-fifo-depth =3D ; + ti,rx-internal-delay =3D ; + ti,clk-output-sel =3D ; + }; + + icssg1_phy0c: ethernet-phy@c { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0xc>; + reset-gpios =3D <&main_gpio1 51 GPIO_ACTIVE_LOW>; + reset-assert-us =3D <1000>; + reset-deassert-us =3D <1000>; + ti,rx-fifo-depth =3D ; + ti,tx-fifo-depth =3D ; + ti,rx-internal-delay =3D ; + ti,clk-output-sel =3D ; + }; +}; + + &main_gpio0 { pinctrl-names =3D "default"; pinctrl-0 =3D <&main_gpio0_digital_pins>, --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/