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charset="utf-8" Move the "exit sleep mode" and "set display on" command from enable() to init() function. As mentioned in the patch: https://lore.kernel.org/all/20240624141926.5250-2-lvzhaoxiong@huaqin.corp-p= artner.google.com/ The Mediatek Soc DSI host has different modes in prepare() and enable() functions, prepare() is in LP mode and enable() is in HS mode. Since the "exit sleep mode" and "set display on" command must also be sent in LP mode, so we also move "exit sleep mode" and "set display on" command to the init() function. We have no other actions in the enable() function after moves "exit sleep mode" and "set display on", and we checked the call of the enable() function during the "startup" process. It seems that only one judgment was made in drm_panel_enabel(). If the panel does not define enable(), the judgment will skip the enable() and continue execution. This does not seem to have any other effect, and we found that some drivers also seem to have no enable() function added, for example: panel-asus-z00t-tm5p5-n35596 / panel-boe-himax8279d... In addition, we briefly tested the kingdisplay_kd101ne3 panel and melfas_lmfbx101117480 panel, and it seems that there is no garbage on the panel, so we delete enable() function. After moving the "exit sleep mode" and "set display on" command to the init() function, we no longer need additional delay judgment, so we delete variables "exit_sleep_to_display_on_delay_ms" and "display_on_delay_ms". Reviewed-by: Douglas Anderson Signed-off-by: Zhaoxiong Lv Acked-by: Jessica Zhang --- Changes between V3 and V2: - 1. The code has not changed, Just modified the nit in the commit=20 - information mentioned by Doug. v2: https://lore.kernel.org/all/20240806034015.11884-2-lvzhaoxiong@huaqin.c= orp-partner.google.com/ Changes between V2 and V1: - 1. The code has not changed, Modify the commit information. v1: https://lore.kernel.org/all/20240725083245.12253-2-lvzhaoxiong@huaqin.c= orp-partner.google.com/ --- .../gpu/drm/panel/panel-jadard-jd9365da-h3.c | 59 ++++++++++--------- 1 file changed, 32 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu= /drm/panel/panel-jadard-jd9365da-h3.c index 04d315d96bff..ce73e8cb1db5 100644 --- a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c @@ -31,8 +31,6 @@ struct jadard_panel_desc { bool reset_before_power_off_vcioo; unsigned int vcioo_to_lp11_delay_ms; unsigned int lp11_to_reset_delay_ms; - unsigned int exit_sleep_to_display_on_delay_ms; - unsigned int display_on_delay_ms; unsigned int backlight_off_to_display_off_delay_ms; unsigned int display_off_to_enter_sleep_delay_ms; unsigned int enter_sleep_to_reset_down_delay_ms; @@ -66,26 +64,6 @@ static inline struct jadard *panel_to_jadard(struct drm_= panel *panel) return container_of(panel, struct jadard, panel); } =20 -static int jadard_enable(struct drm_panel *panel) -{ - struct jadard *jadard =3D panel_to_jadard(panel); - struct mipi_dsi_multi_context dsi_ctx =3D { .dsi =3D jadard->dsi }; - - msleep(120); - - mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); - - if (jadard->desc->exit_sleep_to_display_on_delay_ms) - mipi_dsi_msleep(&dsi_ctx, jadard->desc->exit_sleep_to_display_on_delay_m= s); - - mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); - - if (jadard->desc->display_on_delay_ms) - mipi_dsi_msleep(&dsi_ctx, jadard->desc->display_on_delay_ms); - - return dsi_ctx.accum_err; -} - static int jadard_disable(struct drm_panel *panel) { struct jadard *jadard =3D panel_to_jadard(panel); @@ -202,7 +180,6 @@ static const struct drm_panel_funcs jadard_funcs =3D { .disable =3D jadard_disable, .unprepare =3D jadard_unprepare, .prepare =3D jadard_prepare, - .enable =3D jadard_enable, .get_modes =3D jadard_get_modes, .get_orientation =3D jadard_panel_get_orientation, }; @@ -382,6 +359,12 @@ static int radxa_display_8hd_ad002_init_cmds(struct ja= dard *jadard) =20 jd9365da_switch_page(&dsi_ctx, 0x00); =20 + mipi_dsi_msleep(&dsi_ctx, 120); + + mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); + + mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); + return dsi_ctx.accum_err; }; =20 @@ -608,6 +591,12 @@ static int cz101b4001_init_cmds(struct jadard *jadard) mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE6, 0x02); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE7, 0x0C); =20 + mipi_dsi_msleep(&dsi_ctx, 120); + + mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); + + mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); + return dsi_ctx.accum_err; }; =20 @@ -831,6 +820,16 @@ static int kingdisplay_kd101ne3_init_cmds(struct jadar= d *jadard) =20 jd9365da_switch_page(&dsi_ctx, 0x00); =20 + mipi_dsi_msleep(&dsi_ctx, 120); + + mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); + + mipi_dsi_msleep(&dsi_ctx, 120); + + mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); + + mipi_dsi_msleep(&dsi_ctx, 20); + return dsi_ctx.accum_err; }; =20 @@ -859,8 +858,6 @@ static const struct jadard_panel_desc kingdisplay_kd101= ne3_40ti_desc =3D { .reset_before_power_off_vcioo =3D true, .vcioo_to_lp11_delay_ms =3D 5, .lp11_to_reset_delay_ms =3D 10, - .exit_sleep_to_display_on_delay_ms =3D 120, - .display_on_delay_ms =3D 20, .backlight_off_to_display_off_delay_ms =3D 100, .display_off_to_enter_sleep_delay_ms =3D 50, .enter_sleep_to_reset_down_delay_ms =3D 100, @@ -1074,6 +1071,16 @@ static int melfas_lmfbx101117480_init_cmds(struct ja= dard *jadard) mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x02); 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Wed, 07 Aug 2024 03:04:49 -0700 (PDT) Received: from lvzhaoxiong-KLVC-WXX9.huaqin.com ([116.66.212.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7106ecdff89sm8119248b3a.103.2024.08.07.03.04.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Aug 2024 03:04:48 -0700 (PDT) From: Zhaoxiong Lv To: neil.armstrong@linaro.org, quic_jesszhan@quicinc.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, dianders@chromium.org, hsinyi@google.com, airlied@gmail.com, daniel@ffwll.ch, jagan@edgeble.ai, dmitry.baryshkov@linaro.org, jani.nikula@linux.intel.com Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Zhaoxiong Lv Subject: [PATCH v3 2/2] drm/panel: jd9365da: Modify the init code of Melfas Date: Wed, 7 Aug 2024 18:04:29 +0800 Message-Id: <20240807100429.13260-3-lvzhaoxiong@huaqin.corp-partner.google.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240807100429.13260-1-lvzhaoxiong@huaqin.corp-partner.google.com> References: <20240807100429.13260-1-lvzhaoxiong@huaqin.corp-partner.google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Modify the Melfas panel init code to satisfy the gamma value of 2.2 Acked-by: Jessica Zhang Signed-off-by: Zhaoxiong Lv --- Changes between V3 and V2: - 1. No changed. v2: https://lore.kernel.org/all/20240806034015.11884-3-lvzhaoxiong@huaqin.c= orp-partner.google.com/ Changes between V2 and V1: - 1. No changed. v1: https://lore.kernel.org/all/20240725083245.12253-3-lvzhaoxiong@huaqin.c= orp-partner.google.com/ --- .../gpu/drm/panel/panel-jadard-jd9365da-h3.c | 78 +++++++++---------- 1 file changed, 39 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu= /drm/panel/panel-jadard-jd9365da-h3.c index ce73e8cb1db5..44897e5218a6 100644 --- a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c +++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c @@ -873,22 +873,22 @@ static int melfas_lmfbx101117480_init_cmds(struct jad= ard *jadard) jd9365da_switch_page(&dsi_ctx, 0x01); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xbf); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xd7); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xbf); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xd7); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x01); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x70); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x2d); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x2d); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x7e); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfd); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x28); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x12); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x78); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x7e); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f); @@ -899,47 +899,47 @@ static int melfas_lmfbx101117480_init_cmds(struct jad= ard *jadard) mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x01); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x8e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x6a); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x09); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2e); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x1a); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x15); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x69); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x59); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x4e); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x4c); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x40); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x45); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x30); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x4a); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x49); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x4a); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x68); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x57); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x5b); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x4e); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x49); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x73); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x56); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x43); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x38); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x36); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x28); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x2f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x19); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x32); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x4f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x3e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x47); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x36); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x31); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x24); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x12); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x69); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x59); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x4e); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x4c); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x40); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x45); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x30); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x4a); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x49); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x4a); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x68); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x57); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x5b); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x4e); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x49); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x73); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x56); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x43); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x38); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x36); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x28); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x2f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x19); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x32); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x4f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x3e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x47); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x36); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x31); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x24); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x12); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x02); --=20 2.17.1