From nobody Mon Feb 9 01:10:55 2026 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B94151D415B for ; Tue, 6 Aug 2024 13:53:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.60.130.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722952403; cv=none; b=NkDNsaTSwp+SRo/wFjmB0r4EmRV/4+S9sIyefO5SnwhV/fjNV+SgmttdzAI2jnv+PbDi9eWXXk6eW07AH7TrrBa60e74bbpWYTA09pkIXz4+tk/cmqxdCEvSpj7CsFB44c3e4iWAM28oM1Ebbu+CDlm1itsbufZ81tPR4KePFhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722952403; c=relaxed/simple; bh=GOKwm4o2yDEGmm7ce/V2+O8Hz1PQCFU7L0IusNDrJFQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VxhgXOipvl5YEUHV2znOZs5F4vTJ5ePtK+12dSTTdkRL83jQ63W+vDHQuposJtQyAdNlYYL1mxnYhfT4TuPle783SfTaD1UapnAWNsFC0mDvNleM2hgGfBdzGQUZc2DFpYs8LPtaAJ3/PmLrblmrdhGKPqr2RdV+p+jXwHOOoxk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=ktB09b2a; arc=none smtp.client-ip=178.60.130.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="ktB09b2a" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=q+v19bvdqNESVGVUutWSAtJlOIkfu4uBfSctC94vmDA=; b=ktB09b2a25/hSGNww+z0RK13cZ SQJKQ8k5jE1juCIOSw/RpEL5dXtgA7c8KVO1INo/u4tbCXctkjvCRYDBBd2HfnmhlicSG3+N8J/bQ EyXRkSsnzOw2C4rtwbMFDdVVFEw0wtKs8HcIevJ+kdZW8tctUqNAL3HArFnDXYOhjGAPm+AnsHsZY Qf6ZqnUFgerP/jKody0Y0cRZpjo1yIUXlFVxlDXuj85ss9isskbe+y680oCpVZMhhs4chykF9Hyti uDSbaaj7b0YzZEE6Xh8XtQh0TUCpIodrnLw4nI357uhIEFvnUon8CvlXiDkbZx41mOsZFsqRGllFU 4i40+pQg==; Received: from [179.118.186.198] (helo=localhost.localdomain) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1sbKch-008buR-Qo; Tue, 06 Aug 2024 15:53:12 +0200 From: =?UTF-8?q?Andr=C3=A9=20Almeida?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: kernel-dev@igalia.com, alexander.deucher@amd.com, christian.koenig@amd.com, Simon Ser , Pekka Paalanen , daniel@ffwll.ch, Daniel Stone , =?UTF-8?q?=27Marek=20Ol=C5=A1=C3=A1k=27?= , Dave Airlie , ville.syrjala@linux.intel.com, Xaver Hugl , Joshua Ashton , =?UTF-8?q?Michel=20D=C3=A4nzer?= , Dmitry Baryshkov , =?UTF-8?q?Andr=C3=A9=20Almeida?= Subject: [PATCH RESEND v8 1/2] drm/atomic: Let drivers decide which planes to async flip Date: Tue, 6 Aug 2024 10:52:59 -0300 Message-ID: <20240806135300.114469-2-andrealmeid@igalia.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240806135300.114469-1-andrealmeid@igalia.com> References: <20240806135300.114469-1-andrealmeid@igalia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Currently, DRM atomic uAPI allows only primary planes to be flipped asynchronously. However, each driver might be able to perform async flips in other different plane types. To enable drivers to set their own restrictions on which type of plane they can or cannot flip, use the existing atomic_async_check() from struct drm_plane_helper_funcs to enhance this flexibility, thus allowing different plane types to be able to do async flips as well. In order to prevent regressions and such, we keep the current policy: we skip the driver check for the primary plane, because it is always allowed to do async flips on it. Signed-off-by: Andr=C3=A9 Almeida --- drivers/gpu/drm/drm_atomic_uapi.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic= _uapi.c index fc16fddee5c5..8568c2428670 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -27,8 +27,9 @@ * Daniel Vetter */ =20 -#include #include +#include +#include #include #include #include @@ -1059,6 +1060,7 @@ int drm_atomic_set_property(struct drm_atomic_state *= state, struct drm_plane *plane =3D obj_to_plane(obj); struct drm_plane_state *plane_state; struct drm_mode_config *config =3D &plane->dev->mode_config; + const struct drm_plane_helper_funcs *plane_funcs =3D plane->helper_priva= te; =20 plane_state =3D drm_atomic_get_plane_state(state, plane); if (IS_ERR(plane_state)) { @@ -1073,11 +1075,20 @@ int drm_atomic_set_property(struct drm_atomic_state= *state, break; } =20 - if (async_flip && plane_state->plane->type !=3D DRM_PLANE_TYPE_PRIMARY) { - drm_dbg_atomic(prop->dev, - "[OBJECT:%d] Only primary planes can be changed during async fl= ip\n", - obj->id); - ret =3D -EINVAL; + if (async_flip) { + /* we always allow primary planes */ + if (plane->type !=3D DRM_PLANE_TYPE_PRIMARY) { + ret =3D -EINVAL; + + if (plane_funcs && plane_funcs->atomic_async_check) + ret =3D plane_funcs->atomic_async_check(plane, state); + + if (ret) { + drm_dbg_atomic(prop->dev, + "[PLANE:%d] does not support async flips\n", + obj->id); + } + } break; } =20 --=20 2.46.0 From nobody Mon Feb 9 01:10:55 2026 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8892F20FAAE for ; Tue, 6 Aug 2024 13:53:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.60.130.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722952406; cv=none; b=nNtWuDqECzD5PXLQppSPJCWGL6yBR0jcxyVYbMiP1qSHl49QFgLPyKDeIfRAIV5Xa2y8bB5PHDh7QciYNZE2j9dvh5Epe4ntNG5ER+fhMg6K1EsU5IikPPmbQi5ZVz2AGToc0o2XtYfNdMOSdQUlLQPDfdFRzMwL11C9O+tykdE= ARC-Message-Signature: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable amdgpu can handle async flips on overlay planes, so allow it for atomic async checks. Signed-off-by: Andr=C3=A9 Almeida --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/driv= ers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c index 8a4c40b4c27e..125402964289 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c @@ -1175,8 +1175,7 @@ static int amdgpu_dm_plane_atomic_check(struct drm_pl= ane *plane, static int amdgpu_dm_plane_atomic_async_check(struct drm_plane *plane, struct drm_atomic_state *state) { - /* Only support async updates on cursor planes. */ - if (plane->type !=3D DRM_PLANE_TYPE_CURSOR) + if (plane->type !=3D DRM_PLANE_TYPE_CURSOR && plane->type !=3D DRM_PLANE_= TYPE_OVERLAY) return -EINVAL; =20 return 0; --=20 2.46.0