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([188.163.112.54]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9d8a4b1sm546428366b.151.2024.08.06.05.39.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Aug 2024 05:39:30 -0700 (PDT) From: Svyatoslav Ryhel To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Jonathan Hunter , Svyatoslav Ryhel Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 01/11] ARM: nvidia: tf701t: use unimomentary pinmux setup Date: Tue, 6 Aug 2024 15:38:56 +0300 Message-ID: <20240806123906.161218-2-clamor95@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240806123906.161218-1-clamor95@gmail.com> References: <20240806123906.161218-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Mimic original downstream board behavior to set up all pinmux at once. Per-device pinmux is good but we have no complete board schematics to allow such luxury. Signed-off-by: Svyatoslav Ryhel --- .../boot/dts/nvidia/tegra114-asus-tf701t.dts | 1047 +++++++++++++++-- 1 file changed, 920 insertions(+), 127 deletions(-) diff --git a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts b/arch/arm/b= oot/dts/nvidia/tegra114-asus-tf701t.dts index 763ab812eb87..00708c3c3ed9 100644 --- a/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts +++ b/arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts @@ -88,177 +88,1001 @@ panel_secondary: panel@0 { }; =20 pinmux@70000868 { - asus_pad_ec_default: pinmux-asus-pad-ec-default { - ec-interrupt { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&state_default>; + + state_default: pinmux { + /* WLAN SDIO pinmux */ + sdmmc1-clk { + nvidia,pins =3D "sdmmc1_clk_pz0"; + nvidia,function =3D "sdmmc1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + sdmmc1-cmd { + nvidia,pins =3D "sdmmc1_cmd_pz1", + "sdmmc1_dat0_py7", + "sdmmc1_dat1_py6", + "sdmmc1_dat2_py5", + "sdmmc1_dat3_py4"; + nvidia,function =3D "sdmmc1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + wlan-power { + nvidia,pins =3D "clk2_req_pcc5"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + wlan-reset { + nvidia,pins =3D "gpio_x7_aud_px7"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + wlan-host-wake { + nvidia,pins =3D "pu5"; + nvidia,function =3D "pwm2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + wlan-3v3-com { + nvidia,pins =3D "pu1"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* UART-A pinmux */ + uarta-cts { + nvidia,pins =3D "kb_row10_ps2"; + nvidia,function =3D "uarta"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + uarta-rts { + nvidia,pins =3D "kb_row9_ps1"; + nvidia,function =3D "uarta"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* GNSS UART-B pinmux */ + uartb-cts { + nvidia,pins =3D "uart2_cts_n_pj5"; + nvidia,function =3D "uartb"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + uartb-rts { + nvidia,pins =3D "uart2_rts_n_pj6"; + nvidia,function =3D "uartb"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + uartb-rxd { + nvidia,pins =3D "uart2_rxd_pc3"; + nvidia,function =3D "irda"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + uartb-txd { + nvidia,pins =3D "uart2_txd_pc2"; + nvidia,function =3D "irda"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* Bluetooth UART-C pinmux */ + uartc-cts-rxd { + nvidia,pins =3D "uart3_cts_n_pa1", + "uart3_rxd_pw7"; + nvidia,function =3D "uartc"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + uartc-rts-txd { + nvidia,pins =3D "uart3_rts_n_pc0", + "uart3_txd_pw6"; + nvidia,function =3D "uartc"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + bt-shutdown { + nvidia,pins =3D "kb_col6_pq6", + "kb_col7_pq7"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + bt-dev-wake { + nvidia,pins =3D "clk3_req_pee1"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + bt-host-wake { + nvidia,pins =3D "pu6"; + nvidia,function =3D "pwm3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + bt-pcm-dap4-out { + nvidia,pins =3D "dap4_fs_pp4", + "dap4_dout_pp6", + "dap4_sclk_pp7"; + nvidia,function =3D "i2s3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + bt-pcm-dap4-in { + nvidia,pins =3D "dap4_din_pp5"; + nvidia,function =3D "i2s3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* UART-D pinmux */ + uartd-cts { + nvidia,pins =3D "gmi_a17_pb0"; + nvidia,function =3D "uartd"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + uartd-rts { + nvidia,pins =3D "gmi_a16_pj7", + "gmi_a19_pk7"; + nvidia,function =3D "uartd"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* MicroSD pinmux */ + sdmmc3-clk { + nvidia,pins =3D "sdmmc3_clk_pa6"; + nvidia,function =3D "sdmmc3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + sdmmc3-data { + nvidia,pins =3D "sdmmc3_cmd_pa7", + "sdmmc3_dat0_pb7", + "sdmmc3_dat1_pb6", + "sdmmc3_dat2_pb5", + "sdmmc3_dat3_pb4", + "kb_col4_pq4", + "sdmmc3_cd_n_pv2", + "sdmmc3_clk_lb_out_pee4", + "sdmmc3_clk_lb_in_pee5"; + nvidia,function =3D "sdmmc3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + microsd-pwr { + nvidia,pins =3D "gmi_clk_pk1"; + nvidia,function =3D "gmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* EMMC pinmux */ + sdmmc4-clk-cmd { + nvidia,pins =3D "sdmmc4_clk_pcc4"; + nvidia,function =3D "sdmmc4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + sdmmc4-data { + nvidia,pins =3D "sdmmc4_cmd_pt7", + "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function =3D "sdmmc4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* I2C pinmux */ + gen1-i2c { + nvidia,pins =3D "gen1_i2c_scl_pc4", + "gen1_i2c_sda_pc5"; + nvidia,function =3D "i2c1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + nvidia,open-drain =3D ; + nvidia,lock =3D ; + }; + gen2-i2c { + nvidia,pins =3D "gen2_i2c_scl_pt5", + "gen2_i2c_sda_pt6"; + nvidia,function =3D "i2c2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + nvidia,open-drain =3D ; + nvidia,lock =3D ; + }; + cam-i2c { + nvidia,pins =3D "cam_i2c_scl_pbb1", + "cam_i2c_sda_pbb2"; + nvidia,function =3D "i2c3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + nvidia,open-drain =3D ; + nvidia,lock =3D ; + }; + ddc-i2c { + nvidia,pins =3D "ddc_scl_pv4", + "ddc_sda_pv5"; + nvidia,function =3D "i2c4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + nvidia,lock =3D ; + }; + pwr-i2c { + nvidia,pins =3D "pwr_i2c_scl_pz6", + "pwr_i2c_sda_pz7"; + nvidia,function =3D "i2cpwr"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + nvidia,open-drain =3D ; + nvidia,lock =3D ; + }; + + /* SPI pinmux */ + spi1-out { + nvidia,pins =3D "ulpi_clk_py0", + "ulpi_nxt_py2", + "ulpi_stp_py3"; + nvidia,function =3D "spi1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + spi1-in { + nvidia,pins =3D "ulpi_dir_py1"; + nvidia,function =3D "spi1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + spi2 { + nvidia,pins =3D "ulpi_data4_po5", + "ulpi_data7_po0"; + nvidia,function =3D "spi2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + spi4-out { + nvidia,pins =3D "gmi_ad6_pg6", + "gmi_wr_n_pi0"; + nvidia,function =3D "spi4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + spi4-in { + nvidia,pins =3D "gmi_ad5_pg5", + "gmi_ad7_pg7"; + nvidia,function =3D "spi4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* GPIO keys pinmux */ + hall-switch { + nvidia,pins =3D "ulpi_data4_po5"; + nvidia,function =3D "spi2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + lineout-switch { + nvidia,pins =3D "gpio_x5_aud_px5"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + power-key { + nvidia,pins =3D "kb_col0_pq0"; + nvidia,function =3D "kbc"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + volume-keys { + nvidia,pins =3D "kb_row1_pr1", + "kb_row2_pr2"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* Sensors pinmux */ + nct-irq { + nvidia,pins =3D "ulpi_data3_po4"; + nvidia,function =3D "ulpi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + mpu-irq { + nvidia,pins =3D "kb_row3_pr3"; + nvidia,function =3D "rsvd3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* HDMI pinmux */ + hdmi-hpd { + nvidia,pins =3D "hdmi_int_pn7"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + hdmi-en { + nvidia,pins =3D "dap3_dout_pp2"; + nvidia,function =3D "i2s2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + hdmi-cec { + nvidia,pins =3D "hdmi_cec_pee3"; + nvidia,function =3D "cec"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* LED pinmux */ + backlight-pwm { + nvidia,pins =3D "gmi_ad9_ph1"; + nvidia,function =3D "pwm1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + backlight-en { + nvidia,pins =3D "gmi_ad10_ph2"; + nvidia,function =3D "gmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* Touchscreen pinmux */ + touch-irq { + nvidia,pins =3D "gmi_cs4_n_pk2"; + nvidia,function =3D "gmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + touch-rst { + nvidia,pins =3D "gmi_cs3_n_pk4"; + nvidia,function =3D "gmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + touch-pwr { + nvidia,pins =3D "gmi_ad8_ph0"; + nvidia,function =3D "gmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + touch-vio { + nvidia,pins =3D "gmi_ad12_ph4"; + nvidia,function =3D "rsvd4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* AUDIO pinmux */ + audio-ldo1 { + nvidia,pins =3D "sdmmc1_wp_n_pv3"; + nvidia,function =3D "sdmmc1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + hp-detect { + nvidia,pins =3D "kb_row7_pr7"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + dap-i2s0-in { + nvidia,pins =3D "dap1_din_pn1"; + nvidia,function =3D "i2s0"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + dap-i2s0-out { + nvidia,pins =3D "dap1_dout_pn2", + "dap1_fs_pn0", + "dap1_sclk_pn3"; + nvidia,function =3D "i2s0"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + dap-i2s1-in { + nvidia,pins =3D "dap2_din_pa4"; + nvidia,function =3D "i2s1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + dap-i2s1-out { + nvidia,pins =3D "dap2_dout_pa5", + "dap2_fs_pa2", + "dap2_sclk_pa3"; + nvidia,function =3D "i2s1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + dap-i2s2-in { + nvidia,pins =3D "dap3_fs_pp0", + "dap3_sclk_pp3"; + nvidia,function =3D "i2s2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + dap-i2s2-out { + nvidia,pins =3D "dap3_din_pp1"; + nvidia,function =3D "i2s2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + spdif-in { + nvidia,pins =3D "spdif_in_pk6"; + nvidia,function =3D "rsvd3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + spdif-out { + nvidia,pins =3D "spdif_out_pk5"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* AsusEC pinmux */ + ec-irq { nvidia,pins =3D "kb_col5_pq5"; nvidia,function =3D "kbc"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - - ec-request { - nvidia,pins =3D "kb_col2_pq2"; - nvidia,function =3D "kbc"; + ec-req { + nvidia,pins =3D "kb_col2_pq2"; + nvidia,function =3D "kbc"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + hotplug-i2c { + nvidia,pins =3D "ulpi_data7_po0"; + nvidia,function =3D "spi2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + ps2-irq { + nvidia,pins =3D "gpio_w2_aud_pw2"; + nvidia,function =3D "spi6"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + kbd-irq { + nvidia,pins =3D "gmi_cs0_n_pj0"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + dvfs-pin { + nvidia,pins =3D "dvfs_pwm_px0", + "dvfs_clk_px2"; + nvidia,function =3D "cldvfs"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* Core pinmux */ + clk-32k-out { + nvidia,pins =3D "clk_32k_out_pa0"; + nvidia,function =3D "soc"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + sys-clk-req { + nvidia,pins =3D "sys_clk_req_pz5"; + nvidia,function =3D "sysclk"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + core-pwr-req { + nvidia,pins =3D "core_pwr_req"; + nvidia,function =3D "pwron"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + cpu-pwr-req { + nvidia,pins =3D "cpu_pwr_req"; + nvidia,function =3D "cpu"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + pwr-int-n { + nvidia,pins =3D "pwr_int_n"; + nvidia,function =3D "pmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + clk-32k-in { + nvidia,pins =3D "clk_32k_in"; + nvidia,function =3D "clk"; nvidia,pull =3D ; nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + owr { + nvidia,pins =3D "owr"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; - - backlight_default: pinmux-backlight-default { - backlight-enable { - nvidia,pins =3D "gmi_ad10_ph2"; - nvidia,function =3D "gmi"; + reset-out-n { + nvidia,pins =3D "reset_out_n"; + nvidia,function =3D "reset_out_n"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; =20 - codec_default: pinmux-codec-default { - interrupt { - nvidia,pins =3D "gpio_w2_aud_pw2", - "gpio_w3_aud_pw3"; - nvidia,function =3D "spi6"; + /* ULPI pinmux */ + ulpi-data0-6 { + nvidia,pins =3D "ulpi_data0_po1", + "ulpi_data6_po7"; + nvidia,function =3D "ulpi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + ulpi-data1-5 { + nvidia,pins =3D "ulpi_data1_po2", + "ulpi_data5_po6"; + nvidia,function =3D "ulpi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + ulpi-data2-3 { + nvidia,pins =3D "ulpi_data2_po3", + "ulpi_data3_po4"; + nvidia,function =3D "ulpi"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; =20 - ldo1-en { - nvidia,pins =3D "sdmmc1_wp_n_pv3"; - nvidia,function =3D "sdmmc1"; + /* PORT V */ + pv0-gpio { + nvidia,pins =3D "pv0"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + pv1-gpio { + nvidia,pins =3D "pv1"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* PORT U */ + pu0-gpio { + nvidia,pins =3D "pu0"; + nvidia,function =3D "rsvd3"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; - - gpio_hall_sensor_default: pinmux-gpio-hall-sensor-default { - ulpi_data4_po5 { - nvidia,pins =3D "ulpi_data4_po5"; - nvidia,function =3D "spi2"; + pu2-gpio { + nvidia,pins =3D "pu2"; + nvidia,function =3D "rsvd1"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; =20 - gpio_keys_default: pinmux-gpio-keys-default { - power { - nvidia,pins =3D "kb_col0_pq0"; - nvidia,function =3D "kbc"; - nvidia,pull =3D ; + /* PWM pinmux */ + pwm0 { + nvidia,pins =3D "pu3"; + nvidia,function =3D "pwm0"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + pwm1 { + nvidia,pins =3D "pu4"; + nvidia,function =3D "pwm1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* EXTPERIPH pinmux */ + clk1-out { + nvidia,pins =3D "clk1_out_pw4"; + nvidia,function =3D "extperiph1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + clk2-out { + nvidia,pins =3D "clk2_out_pw5"; + nvidia,function =3D "extperiph2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + clk3-out { + nvidia,pins =3D "clk3_out_pee0"; + nvidia,function =3D "extperiph3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + clk1-req { + nvidia,pins =3D "clk1_req_pee2"; + nvidia,function =3D "rsvd3"; + nvidia,pull =3D ; nvidia,tristate =3D ; - nvidia,enable-input =3D ; + nvidia,enable-input =3D ; }; =20 - volume { - nvidia,pins =3D "kb_row1_pr1", - "kb_row2_pr2"; + /* GMI pinmux */ + gmi-wp-n { + nvidia,pins =3D "gmi_wp_n_pc7"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-adv { + nvidia,pins =3D "gmi_adv_n_pk0"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-ad0-ad1 { + nvidia,pins =3D "gmi_ad0_pg0", + "gmi_ad1_pg1"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-ad2-ad3 { + nvidia,pins =3D "gmi_ad2_pg2", + "gmi_ad3_pg3"; + nvidia,function =3D "rsvd1"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-iordy { + nvidia,pins =3D "gmi_iordy_pi5"; nvidia,function =3D "rsvd2"; nvidia,pull =3D ; - nvidia,tristate =3D ; + nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; - - hp_det_default: pinmux-hp-det-default { - gmi_iordy_pi5 { - nvidia,pins =3D "kb_row7_pr7"; + gmi-a18 { + nvidia,pins =3D "gmi_a18_pb1"; nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-wait { + nvidia,pins =3D "gmi_wait_pi7"; + nvidia,function =3D "nand"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-cs6-n { + nvidia,pins =3D "gmi_cs6_n_pi3"; + nvidia,function =3D "nand"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-cs7-n { + nvidia,pins =3D "gmi_cs7_n_pi6"; + nvidia,function =3D "nand"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-dqs-p { + nvidia,pins =3D "gmi_dqs_p_pj3"; + nvidia,function =3D "nand"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-cs2-ad { + nvidia,pins =3D "gmi_cs2_n_pk3", + "gmi_ad14_ph6", + "gmi_ad15_ph7"; + nvidia,function =3D "gmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-cs4-clk { + nvidia,pins =3D "gmi_cs4_n_pk2", + "gmi_clk_lb"; + nvidia,function =3D "gmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-ad11 { + nvidia,pins =3D "gmi_ad11_ph3"; + nvidia,function =3D "gmi"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-cs1-oe { + nvidia,pins =3D "gmi_cs1_n_pj2", + "gmi_oe_n_pi1"; + nvidia,function =3D "soc"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; + gmi-ad4 { + nvidia,pins =3D "gmi_ad4_pg4"; + nvidia,function =3D "rsvd4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-ad13 { + nvidia,pins =3D "gmi_ad13_ph5"; + nvidia,function =3D "rsvd4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gmi-rst-n { + nvidia,pins =3D "gmi_rst_n_pi4"; + nvidia,function =3D "rsvd4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; =20 - imu_default: pinmux-imu-default { - kb_row3_pr3 { - nvidia,pins =3D "kb_row3_pr3"; - nvidia,function =3D "rsvd3"; + /* PORT CC */ + pcc-gpio { + nvidia,pins =3D "pcc1", "pcc2"; + nvidia,function =3D "rsvd2"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; =20 - pwm_default: pinmux-pwm-default { - gmi_ad9_ph1 { - nvidia,pins =3D "gmi_ad9_ph1"; - nvidia,function =3D "pwm1"; + /* PORT BB */ + pbb3-gpio { + nvidia,pins =3D "pbb3"; + nvidia,function =3D "rsvd4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + pbb4-5-6-gpio { + nvidia,pins =3D "pbb4", "pbb5", "pbb6"; + nvidia,function =3D "rsvd4"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; - - /* XXX make this something more sensible */ - pwm_sleep: pinmux-pwm-sleep { - gmi_ad9_ph1 { - nvidia,pins =3D "gmi_ad9_ph1"; - nvidia,function =3D "pwm1"; + pbb7-gpio { + nvidia,pins =3D "pbb7"; + nvidia,function =3D "rsvd2"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; =20 - sdmmc3_default: pinmux-sdmmc3-default { - drive_sdio3 { - nvidia,pins =3D "drive_sdio3"; - nvidia,high-speed-mode =3D ; - nvidia,schmitt =3D ; - nvidia,pull-down-strength =3D <22>; - nvidia,pull-up-strength =3D <36>; - nvidia,slew-rate-rising =3D ; - nvidia,slew-rate-falling =3D ; + /* KBC pinmux */ + kb-r0-c1 { + nvidia,pins =3D "kb_row0_pr0", + "kb_col1_pq1"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; }; - - sdmmc3_clk_pa6 { - nvidia,pins =3D "sdmmc3_clk_pa6"; - nvidia,function =3D "sdmmc3"; + kb-row4 { + nvidia,pins =3D "kb_row4_pr4"; + nvidia,function =3D "kbc"; nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + kb-row5 { + nvidia,pins =3D "kb_row5_pr5"; + nvidia,function =3D "kbc"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + kb-row6 { + nvidia,pins =3D "kb_row6_pr6"; + nvidia,function =3D "kbc"; + nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - - sdmmc3_cmd_pa7 { - nvidia,pins =3D "sdmmc3_cmd_pa7", - "sdmmc3_dat0_pb7", - "sdmmc3_dat1_pb6", - "sdmmc3_dat2_pb5", - "sdmmc3_dat3_pb4", - "kb_col4_pq4", - "sdmmc3_clk_lb_out_pee4", - "sdmmc3_clk_lb_in_pee5", - "sdmmc3_cd_n_pv2"; - nvidia,function =3D "sdmmc3"; + kb-r8-c3 { + nvidia,pins =3D "kb_row8_ps0", + "kb_col3_pq3"; + nvidia,function =3D "kbc"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; =20 - sdmmc3_vdd_default: pinmux-sdmmc3-vdd-default { - gmi_clk_pk1 { - nvidia,pins =3D "gmi_clk_pk1"; - nvidia,function =3D "gmi"; + /* VI pinmux */ + cam-mclk { + nvidia,pins =3D "cam_mclk_pcc0", + "pbb0"; + nvidia,function =3D "vi_alt3"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; - }; =20 - vdd_lcd_default: pinmux-vdd-lcd-default { - sdmmc4_clk_pcc4 { - nvidia,pins =3D "sdmmc4_clk_pcc4"; - nvidia,function =3D "sdmmc4"; + /* AUD pinmux */ + gpio-x4-aud { + nvidia,pins =3D "gpio_x4_aud_px4"; + nvidia,function =3D "rsvd1"; nvidia,pull =3D ; nvidia,tristate =3D ; nvidia,enable-input =3D ; }; + gpio-x1-aud { + nvidia,pins =3D "gpio_x1_aud_px1"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gpio-x3-aud { + nvidia,pins =3D "gpio_x3_aud_px3"; + nvidia,function =3D "rsvd3"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + gpio-x6-aud { + nvidia,pins =3D "gpio_x6_aud_px6"; + nvidia,function =3D "rsvd4"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + usb-vbus { + nvidia,pins =3D "usb_vbus_en0_pn4", + "usb_vbus_en1_pn5"; + nvidia,function =3D "rsvd2"; + nvidia,pull =3D ; + nvidia,tristate =3D ; + nvidia,enable-input =3D ; + }; + + /* GPIO power/drive control */ + drive-sdio1 { + nvidia,pins =3D "drive_sdio1"; + nvidia,high-speed-mode =3D ; + nvidia,schmitt =3D ; + nvidia,pull-down-strength =3D <36>; + nvidia,pull-up-strength =3D <20>; + nvidia,slew-rate-rising =3D ; + nvidia,slew-rate-falling =3D ; + }; + drive-sdio3 { + nvidia,pins =3D "drive_sdio3"; + nvidia,high-speed-mode =3D ; + nvidia,schmitt =3D ; + nvidia,pull-down-strength =3D <22>; + nvidia,pull-up-strength =3D <36>; + nvidia,slew-rate-rising =3D ; + nvidia,slew-rate-falling =3D ; + }; + drive-gma { + nvidia,pins =3D "drive_gma"; + nvidia,high-speed-mode =3D ; + nvidia,schmitt =3D ; + nvidia,pull-down-strength =3D <2>; + nvidia,pull-up-strength =3D <2>; + nvidia,slew-rate-rising =3D ; + nvidia,slew-rate-falling =3D ; + }; }; }; =20 @@ -278,10 +1102,6 @@ serial@70006300 { =20 pwm@7000a000 { status =3D "okay"; - - pinctrl-names =3D "default", "sleep"; - pinctrl-0 =3D <&pwm_default>; - pinctrl-1 =3D <&pwm_sleep>; }; =20 i2c@7000c000 { @@ -303,9 +1123,6 @@ rt5639: audio-codec@1c { interrupts =3D ; =20 realtek,ldo1-en-gpios =3D <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&codec_default>; }; =20 temp_sensor: temperature-sensor@4c { @@ -326,9 +1143,6 @@ motion-tracker@68 { mount-matrix =3D "0", "-1", "0", "1", "0", "0", "0", "0", "1"; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&imu_default>; }; }; =20 @@ -623,9 +1437,6 @@ mmc@78000400 { =20 vmmc-supply =3D <&vdd_usd>; vqmmc-supply =3D <&tps65913_ldo9>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&sdmmc3_default>; }; =20 mmc@78000600 { @@ -665,9 +1476,6 @@ backlight: backlight { brightness-levels =3D <1 255>; num-interpolated-steps =3D <254>; default-brightness-level =3D <224>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&backlight_default>; }; =20 /* PMIC has a built-in 32KHz oscillator which is used by PMC */ @@ -683,9 +1491,6 @@ gpio-hall-sensor { =20 label =3D "GPIO Hall Effect Sensor"; =20 - pinctrl-names =3D "default"; - pinctrl-0 =3D <&gpio_hall_sensor_default>; - switch-hall-sensor { label =3D "Hall Effect Sensor"; gpios =3D <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>; @@ -701,9 +1506,6 @@ gpio-keys { =20 label =3D "GPIO Buttons"; =20 - pinctrl-names =3D "default"; - pinctrl-0 =3D <&gpio_keys_default>; - button-power { label =3D "Power"; gpios =3D <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; @@ -757,9 +1559,6 @@ sound { =20 assigned-clock-parents =3D <&tegra_car TEGRA114_CLK_PLL_A_OUT0>, <&tegra_car TEGRA114_CLK_EXTERN1>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&hp_det_default>; }; =20 vdd_5v0_sys: regulator-5v0-sys { @@ -789,9 +1588,6 @@ vdd_lcd: regulator-vdd-lcd { enable-active-high; gpio =3D <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>; regulator-boot-on; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&vdd_lcd_default>; }; =20 vdd_usd: regulator-vdd-usd { @@ -802,8 +1598,5 @@ vdd_usd: regulator-vdd-usd { vin-supply =3D <&tps65913_smps9>; enable-active-high; gpio =3D <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; - - pinctrl-names =3D "default"; - pinctrl-0 =3D <&sdmmc3_vdd_default>; }; }; --=20 2.43.0