From nobody Mon Dec 15 21:27:44 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F40562F2E; Sun, 4 Aug 2024 03:40:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722742845; cv=none; b=OZoNkNr0iqVLSIBS2EDRdwF9lLzlSyxxs7rfgTrAZnlhx4UPVSfhAJAWWRJv2klsToePv4StQX04q0oJsQ7QTNURZxBhjiLxeHH91QiG3OjT6EOLxzEtj5WN1gdIzmGkLz/my5q8TOH4L/0W/aVQgq089TunMDblUUF2NpWUI3k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722742845; c=relaxed/simple; bh=tTsJlsqt9PgjobXbGaWgUj5lIlY9CiKIWXIQpxm4yR8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=ixsIXO7lT2XbwAl1nJZejK5VnkEwipkg9kNtlODpBgq3WNPQdjTDMTYsffHIhnUDPwbGwPm4A9A2BtXl63odf53GHd33preIccckSGcHCnY9F0v1PEZ64AWKFKJF9GZ9oMP7796duELEPnMqqYz9z39r6NI1Z0OCujDNnje9EQg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=iAj7dy//; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="iAj7dy//" Received: by smtp.kernel.org (Postfix) with ESMTPS id 822E6C32786; Sun, 4 Aug 2024 03:40:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1722742844; bh=tTsJlsqt9PgjobXbGaWgUj5lIlY9CiKIWXIQpxm4yR8=; h=From:Date:Subject:To:Cc:Reply-To:From; b=iAj7dy//39uhNuW1ig3EEYyw5ji+po4WcI0mqcoWKEFq/0ItPjOKSiZ6FFmaGg+JU bxDfZxcbp+7IIhBWzLUqDx6Aol+eozg8TEuHCzuIPAdBH2WTBBuDfwNxCcU4d26V/P v7ERjDKk4jVQB54KRwlzhhy/roGFE3kz7lz2fgg83cgPUnNpdcNRI653g4lNwf7AsC L/QCkc4UORv3VIVVftQEJ4BO9hljiRe/+FF8aKJc0ldGWVznIQ/gALTC75EyjY7PFp c6jQs/5zlqWoBOcHjMdrkiMCXS7skFnEUsiracWQuLnnuV2KKNoxXKFRJKWiQhniat e3xc2FLHIIiYw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F373C3DA7F; Sun, 4 Aug 2024 03:40:44 +0000 (UTC) From: Koakuma via B4 Relay Date: Sun, 04 Aug 2024 10:39:49 +0700 Subject: [PATCH] sparc/vdso: Add helper function for 64-bit right shift on 32-bit target Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240804-sparc-shr64-v1-1-25050968339a@protonmail.com> X-B4-Tracking: v=1; b=H4sIAAT4rmYC/x3MMQqAMAxA0atIZgtpKUa8ijgUjZpFSwIilN7d4 viG/wsYq7DB1BVQfsTkvhp838F6putgJ1szBAwRyZOznHR1duoQXdgRE41jJEJoRVbe5f1v81L rB4OsFpBdAAAA To: "David S. Miller" , Andreas Larsson , Andy Lutomirski , Thomas Gleixner , Vincenzo Frascino , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt Cc: sparclinux@vger.kernel.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev, Koakuma X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1722742843; l=3316; i=koachan@protonmail.com; s=20240620; h=from:subject:message-id; bh=5vLiK7ELLqD1RRIEMvqkT4bYtvygqFoGLfpouZxp/Ns=; b=VGHa0DUmTa67NoKaZwaMHf2po7TjbodTym97uTjAmdtk/iY/OmPZTEI5cVbFiZWWBQBEJKWku Jhid1FM83fRAZ8JbZbH+jGYt7MRV1DsT9z8K7DrQRITNzWjcW7eIzDb X-Developer-Key: i=koachan@protonmail.com; a=ed25519; pk=UA59FS3yiAA1cnAAUZ1rehTmr6skh95PgkNRBLcoKCg= X-Endpoint-Received: by B4 Relay for koachan@protonmail.com/20240620 with auth_id=174 X-Original-From: Koakuma Reply-To: koachan@protonmail.com From: Koakuma Add helper function for 64-bit right shift on 32-bit target so that clang does not emit a runtime library call. Signed-off-by: Koakuma --- Hi~ This adds a small function to do 64-bit right shifts for use in vDSO code, needed so that clang does not emit a call to runtime library. --- arch/sparc/vdso/vclock_gettime.c | 8 ++++---- include/vdso/math64.h | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 4 deletions(-) diff --git a/arch/sparc/vdso/vclock_gettime.c b/arch/sparc/vdso/vclock_gett= ime.c index e794edde6755..c0251a632bdb 100644 --- a/arch/sparc/vdso/vclock_gettime.c +++ b/arch/sparc/vdso/vclock_gettime.c @@ -154,7 +154,7 @@ notrace static __always_inline int do_realtime(struct v= var_data *vvar, ts->tv_sec =3D vvar->wall_time_sec; ns =3D vvar->wall_time_snsec; ns +=3D vgetsns(vvar); - ns >>=3D vvar->clock.shift; + ns =3D __shr64(ns, vvar->clock.shift); } while (unlikely(vvar_read_retry(vvar, seq))); =20 ts->tv_sec +=3D __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns); @@ -174,7 +174,7 @@ notrace static __always_inline int do_realtime_stick(st= ruct vvar_data *vvar, ts->tv_sec =3D vvar->wall_time_sec; ns =3D vvar->wall_time_snsec; ns +=3D vgetsns_stick(vvar); - ns >>=3D vvar->clock.shift; + ns =3D __shr64(ns, vvar->clock.shift); } while (unlikely(vvar_read_retry(vvar, seq))); =20 ts->tv_sec +=3D __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns); @@ -194,7 +194,7 @@ notrace static __always_inline int do_monotonic(struct = vvar_data *vvar, ts->tv_sec =3D vvar->monotonic_time_sec; ns =3D vvar->monotonic_time_snsec; ns +=3D vgetsns(vvar); - ns >>=3D vvar->clock.shift; + ns =3D __shr64(ns, vvar->clock.shift); } while (unlikely(vvar_read_retry(vvar, seq))); =20 ts->tv_sec +=3D __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns); @@ -214,7 +214,7 @@ notrace static __always_inline int do_monotonic_stick(s= truct vvar_data *vvar, ts->tv_sec =3D vvar->monotonic_time_sec; ns =3D vvar->monotonic_time_snsec; ns +=3D vgetsns_stick(vvar); - ns >>=3D vvar->clock.shift; + ns =3D __shr64(ns, vvar->clock.shift); } while (unlikely(vvar_read_retry(vvar, seq))); =20 ts->tv_sec +=3D __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns); diff --git a/include/vdso/math64.h b/include/vdso/math64.h index 22ae212f8b28..771d84faa8d7 100644 --- a/include/vdso/math64.h +++ b/include/vdso/math64.h @@ -21,6 +21,34 @@ __iter_div_u64_rem(u64 dividend, u32 divisor, u64 *remai= nder) return ret; } =20 +#if BITS_PER_LONG =3D=3D 32 +/* This is to prevent the compiler from emitting a call to __lshrdi3. */ +static __always_inline u64 +__shr64(u64 val, int amt) +{ + u32 mask =3D (1U << amt) - 1; + u32 lo =3D val; + u32 hi =3D val >> 32; + u32 mi; + + if (amt >=3D 32) + return hi >> (amt - 32); + + + mi =3D (hi & mask) << (32 - amt); + hi >>=3D amt; + lo =3D (lo >> amt) | mi; + + return ((u64) hi) << 32 | lo; +} +#else +static __always_inline u64 +__shr64(u64 val, int amt) +{ + return val >> amt; +} +#endif /* BITS_PER_LONG =3D=3D 32 */ + #if defined(CONFIG_ARCH_SUPPORTS_INT128) && defined(__SIZEOF_INT128__) =20 #ifndef mul_u64_u32_add_u64_shr --- base-commit: defaf1a2113a22b00dfa1abc0fd2014820eaf065 change-id: 20240717-sparc-shr64-2f00a7884770 Best regards, --=20 Koakuma