From nobody Sun Feb 8 17:47:42 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 856E01C3F1B for ; Fri, 2 Aug 2024 08:56:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722588974; cv=none; b=Xx1Bu4upfuTMyTSoeigRyG531OlGWmmoOVUaBL1RNm8Xm07wurd/B4laBLGZLEihU9yRFvwMVxy+CJGo0YzS3DxE0CEZHHYvY4LLNoYOLLCS8tTwmoO/+TpIzKBQ8uUXcCVs2Jj87YaBYC7AB3dot5oiIX0KSiOyoGCSKvBy6Xg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722588974; c=relaxed/simple; bh=Mb9WDkqLU/aQEf1I2Y9pAvGcPFmnhBvD2qvfNmVm7sI=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=be0NLuoVsIbqq7L+jBP37JcsVPjADkpfGcWOY78mDLgZmy2sBNSbq6M83rQPgiNxNXGSaX4gCAmeAPlNLUMD3VdFolLxA+UrfK4YRurjNjCqEK2N1k9xSDdUIgTUWwXZ5ctT+LOodtmllmyeVgxfVpGTSSYq5g9Apo3lAVIu2aE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3AE3D1007; Fri, 2 Aug 2024 01:56:36 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.56.112]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A12C43F766; Fri, 2 Aug 2024 01:56:07 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Marc Zyngier , Thomas Gleixner , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Zenghui Yu Subject: [PATCH V2] irqchip/gic-v4.1: Replace GIC version with ID_AA64PFR0_EL1_GIC_V4P1 Date: Fri, 2 Aug 2024 14:26:01 +0530 Message-Id: <20240802085601.1824057-1-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace open encoding for GIC version code with ID_AA64PFR0_EL1_GIC_V4P1 in gic_cpuif_has_vsgi(). Cc: Marc Zyngier Cc: Thomas Gleixner Cc: Catalin Marinas Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Zenghui Yu Acked-by: Marc Zyngier Signed-off-by: Anshuman Khandual --- This patch applies on v6.11-rc1. ID_AA64PFR0_EL1.GIC field value for V4P1 has been fixed via a recent commit f3dfcd25455b ("arm64/sysreg: Correct the values for GICv4.1"). Changes in V2: - Updated the subject line per Marc Changes in V1: https://lore.kernel.org/all/20240724054623.667595-1-anshuman.khandual@arm.c= om/ drivers/irqchip/irq-gic-v4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic-v4.c b/drivers/irqchip/irq-gic-v4.c index ca32ac19d284..58c28895f8c4 100644 --- a/drivers/irqchip/irq-gic-v4.c +++ b/drivers/irqchip/irq-gic-v4.c @@ -97,7 +97,7 @@ bool gic_cpuif_has_vsgi(void) =20 fld =3D cpuid_feature_extract_unsigned_field(reg, ID_AA64PFR0_EL1_GIC_SHI= FT); =20 - return fld >=3D 0x3; + return fld >=3D ID_AA64PFR0_EL1_GIC_V4P1; } #else bool gic_cpuif_has_vsgi(void) --=20 2.30.2