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Fri, 2 Aug 2024 00:24:33 -0700 From: Dragos Tatulea To: Dragos Tatulea , "Michael S. Tsirkin" , Jason Wang , Xuan Zhuo , =?UTF-8?q?Eugenio=20P=C3=A9rez?= CC: Si-Wei Liu , Tariq Toukan , , Subject: [PATCH vhost 4/7] vdpa/mlx5: Use async API for vq modify commands Date: Fri, 2 Aug 2024 10:20:21 +0300 Message-ID: <20240802072039.267446-5-dtatulea@nvidia.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240802072039.267446-1-dtatulea@nvidia.com> References: <20240802072039.267446-1-dtatulea@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PEPF00000143:EE_|DM4PR12MB6541:EE_ X-MS-Office365-Filtering-Correlation-Id: d9813031-532d-48d6-4d97-08dcb2c43188 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?OJc9a7/6HyeP1j1cCr11SSK7OU/ry9HU1SdLkCrbX/m6GtD55cjWY3UQKOXg?= =?us-ascii?Q?So4MJkHXCbnXJRDvYiCGXoPZJvuuttRCZIHqzpKp0ShDAu/ILeJsbVX20pNQ?= =?us-ascii?Q?RisVjUsaEU9nzeSFqLv4M2WkXln95JU42YmqVbACCKPQa4o/KiExX8I8Y00M?= =?us-ascii?Q?hXxLtApB+nyi1zBDXBC7gadr2ToSYUxihfmQWJjwzWSVXxCFs+kKy86i65Hv?= =?us-ascii?Q?EHP7k3ZN8vDc99dyrrxRWwJnuXOidW3yciRtlFHgW0KFaF+IITBP7IzKT5ye?= =?us-ascii?Q?RxBFiDx1JxBGWdgEXfjSyWiUiOejdjZynqN3oSsKSFRjS4AcEkGXB2UXevYc?= =?us-ascii?Q?MeG8iFO6x2BHyEenoCceWeLQ5sAyiMhwKnT4XrIP0pIKP4p8U5SRAdew+LmS?= =?us-ascii?Q?dLw1FmWGPaKZuGevWVN634hLxEEpPk5htZGO0z6GgXqv9hbbNHAHm9ZI6yoe?= =?us-ascii?Q?kiDKS45ZdNzMQ06YpVbx0Dltds+LrQziOU4hrhCullc+ImCnA7CtCAnn0/fF?= =?us-ascii?Q?7mrSHf0XpwuHw9SSLdDiAqNF6b1hZwn9wIt2vUHYxnI5qaq/Z3poBoc1ov4J?= =?us-ascii?Q?+kqH32uhnfoVuTYw6SYOVhv21DiVv0A8HXrXWF/IF1LQe34kAZdirl7PVkGu?= =?us-ascii?Q?xg60ENMi4Kd+2h/Kerv5yqUX/i39Jobuq8ssiHRTe90pOcrD4eadDbhvU2eI?= =?us-ascii?Q?O0E5KC634wGguXCR0DywHvo5O9QD1+7Wlf5qT+fsypdHAYjx1oYM+KxmlgmC?= =?us-ascii?Q?BR7suBaxH1de0+NBZT4u423NgTdKzQdmJs0MHPf6yiW9qf/+oyLmg+AXVSv7?= =?us-ascii?Q?00TZSf64rKg9uLiDHobYs6sf5O6Yv4MakIlAn99Vnfk/ahsYkfNp0lJga/9s?= =?us-ascii?Q?zL9OczGp/ROSwYTtNS664MhLcp9x7Cv3qDu9xN4IFoTwEict/RgEhfLTlxkX?= =?us-ascii?Q?KIEacRAsX7mosqKbD+JTusOZBiyYmAa/4CaIO1Uf0EApqJYN34v/OSXcJGqA?= =?us-ascii?Q?DpIHwJz1mxKBfNsBbqcbT5EDASXj6w4Tm7dXBvcdiUB8sExuS8t+KZXMjKT5?= =?us-ascii?Q?fK4k2AU2LEBxOgHyiWjSlqe+/7n8ayWmFRaUBbKUs2b7TvaJ0sHjV/YewLuP?= =?us-ascii?Q?+5RT39a1YV+RwgMrvGckn/MiBZvS1dGXNiFElQn0vQe23sEMSCiGTv9BfbO4?= =?us-ascii?Q?GK8zHrRiuujqv0BMF9fymlVaDAaFGcSK+dodqwKqhOm30fzb1zKh4r0Db5GR?= =?us-ascii?Q?3GBRvA5sD0KmHjlH4G49qlQUqpxxwy3LxMsnRSsdweMlwQtJPGEwkiOoBmZ1?= =?us-ascii?Q?SwvKrw2gHJH3RP77L4FH5Tk+euRAUYzY39v1+urZctiFMvxqb3AJUUtazFds?= =?us-ascii?Q?gHjbD7EozEtb6VeqNta+tSVdkO8pDkijObJz/+9ra2yqqfpEPtZyTGHW1GXQ?= =?us-ascii?Q?cklpM0lIZAM4LTHD6mqL+eBoV4e/PXMF?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(82310400026)(1800799024)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Aug 2024 07:24:49.2555 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9813031-532d-48d6-4d97-08dcb2c43188 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF00000143.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6541 Content-Type: text/plain; charset="utf-8" Switch firmware vq modify command to be issued via the async API to allow future parallelization. The new refactored function applies the modify on a range of vqs and waits for their execution to complete. For now the command is still used in a serial fashion. A later patch will switch to modifying multiple vqs in parallel. Signed-off-by: Dragos Tatulea Reviewed-by: Tariq Toukan --- drivers/vdpa/mlx5/net/mlx5_vnet.c | 150 ++++++++++++++++++++---------- 1 file changed, 103 insertions(+), 47 deletions(-) diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5= _vnet.c index be8df9d9f4df..e56a0ee1b725 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c @@ -1189,6 +1189,12 @@ struct mlx5_virtqueue_query_mem { u8 out[MLX5_ST_SZ_BYTES(query_virtio_net_q_out)]; }; =20 +struct mlx5_virtqueue_modify_mem { + u8 in[MLX5_ST_SZ_BYTES(modify_virtio_net_q_in)]; + u8 out[MLX5_ST_SZ_BYTES(modify_virtio_net_q_out)]; +}; + + struct mlx5_vdpa_async_virtqueue_cmd { int err; struct mlx5_async_work cb_work; @@ -1202,6 +1208,7 @@ struct mlx5_vdpa_async_virtqueue_cmd { =20 union { struct mlx5_virtqueue_query_mem query; + struct mlx5_virtqueue_modify_mem modify; }; }; =20 @@ -1384,51 +1391,35 @@ static bool modifiable_virtqueue_fields(struct mlx5= _vdpa_virtqueue *mvq) return true; } =20 -static int modify_virtqueue(struct mlx5_vdpa_net *ndev, - struct mlx5_vdpa_virtqueue *mvq, - int state) +static void fill_modify_virtqueue_cmd(struct mlx5_vdpa_net *ndev, + struct mlx5_vdpa_virtqueue *mvq, + int state, + struct mlx5_vdpa_async_virtqueue_cmd *cmd) { - int inlen =3D MLX5_ST_SZ_BYTES(modify_virtio_net_q_in); - u32 out[MLX5_ST_SZ_DW(modify_virtio_net_q_out)] =3D {}; struct mlx5_vdpa_dev *mvdev =3D &ndev->mvdev; struct mlx5_vdpa_mr *desc_mr =3D NULL; struct mlx5_vdpa_mr *vq_mr =3D NULL; - bool state_change =3D false; void *obj_context; void *cmd_hdr; void *vq_ctx; - void *in; - int err; =20 - if (mvq->fw_state =3D=3D MLX5_VIRTIO_NET_Q_OBJECT_NONE) - return 0; - - if (!modifiable_virtqueue_fields(mvq)) - return -EINVAL; - - in =3D kzalloc(inlen, GFP_KERNEL); - if (!in) - return -ENOMEM; + cmd->in =3D &cmd->modify.in; + cmd->inlen =3D sizeof(cmd->modify.in); + cmd->out =3D &cmd->modify.out; + cmd->outlen =3D sizeof(cmd->modify.out); =20 - cmd_hdr =3D MLX5_ADDR_OF(modify_virtio_net_q_in, in, general_obj_in_cmd_h= dr); + cmd_hdr =3D MLX5_ADDR_OF(modify_virtio_net_q_in, cmd->in, general_obj_in_= cmd_hdr); =20 MLX5_SET(general_obj_in_cmd_hdr, cmd_hdr, opcode, MLX5_CMD_OP_MODIFY_GENE= RAL_OBJECT); MLX5_SET(general_obj_in_cmd_hdr, cmd_hdr, obj_type, MLX5_OBJ_TYPE_VIRTIO_= NET_Q); MLX5_SET(general_obj_in_cmd_hdr, cmd_hdr, obj_id, mvq->virtq_id); MLX5_SET(general_obj_in_cmd_hdr, cmd_hdr, uid, ndev->mvdev.res.uid); =20 - obj_context =3D MLX5_ADDR_OF(modify_virtio_net_q_in, in, obj_context); + obj_context =3D MLX5_ADDR_OF(modify_virtio_net_q_in, cmd->in, obj_context= ); vq_ctx =3D MLX5_ADDR_OF(virtio_net_q_object, obj_context, virtio_q_contex= t); =20 - if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_STATE) { - if (!is_valid_state_change(mvq->fw_state, state, is_resumable(ndev))) { - err =3D -EINVAL; - goto done; - } - + if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_STATE) MLX5_SET(virtio_net_q_object, obj_context, state, state); - state_change =3D true; - } =20 if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_VIRTIO_Q_ADDRS) { MLX5_SET64(virtio_q, vq_ctx, desc_addr, mvq->desc_addr); @@ -1474,38 +1465,36 @@ static int modify_virtqueue(struct mlx5_vdpa_net *n= dev, } =20 MLX5_SET64(virtio_net_q_object, obj_context, modify_field_select, mvq->mo= dified_fields); - err =3D mlx5_cmd_exec(ndev->mvdev.mdev, in, inlen, out, sizeof(out)); - if (err) - goto done; +} =20 - if (state_change) - mvq->fw_state =3D state; +static void modify_virtqueue_end(struct mlx5_vdpa_net *ndev, + struct mlx5_vdpa_virtqueue *mvq, + int state) +{ + struct mlx5_vdpa_dev *mvdev =3D &ndev->mvdev; =20 if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_VIRTIO_Q_MKEY) { + unsigned int asid =3D mvdev->group2asid[MLX5_VDPA_DATAVQ_GROUP]; + struct mlx5_vdpa_mr *vq_mr =3D mvdev->mr[asid]; + mlx5_vdpa_put_mr(mvdev, mvq->vq_mr); mlx5_vdpa_get_mr(mvdev, vq_mr); mvq->vq_mr =3D vq_mr; } =20 if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_DESC_GROUP_MKEY) { + unsigned int asid =3D mvdev->group2asid[MLX5_VDPA_DATAVQ_DESC_GROUP]; + struct mlx5_vdpa_mr *desc_mr =3D mvdev->mr[asid]; + mlx5_vdpa_put_mr(mvdev, mvq->desc_mr); mlx5_vdpa_get_mr(mvdev, desc_mr); mvq->desc_mr =3D desc_mr; } =20 - mvq->modified_fields =3D 0; - -done: - kfree(in); - return err; -} + if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_STATE) + mvq->fw_state =3D state; =20 -static int modify_virtqueue_state(struct mlx5_vdpa_net *ndev, - struct mlx5_vdpa_virtqueue *mvq, - unsigned int state) -{ - mvq->modified_fields |=3D MLX5_VIRTQ_MODIFY_MASK_STATE; - return modify_virtqueue(ndev, mvq, state); + mvq->modified_fields =3D 0; } =20 static int counter_set_alloc(struct mlx5_vdpa_net *ndev, struct mlx5_vdpa_= virtqueue *mvq) @@ -1658,6 +1647,73 @@ static int setup_vq(struct mlx5_vdpa_net *ndev, return err; } =20 +static int modify_virtqueues(struct mlx5_vdpa_net *ndev, int start_vq, int= num_vqs, int state) +{ + struct mlx5_vdpa_async_virtqueue_cmd *cmds; + struct mlx5_vdpa_dev *mvdev =3D &ndev->mvdev; + int err =3D 0; + + WARN(start_vq + num_vqs > mvdev->max_vqs, "modify vq range invalid [%d, %= d), max_vqs: %u\n", + start_vq, start_vq + num_vqs, mvdev->max_vqs); + + cmds =3D kvcalloc(num_vqs, sizeof(*cmds), GFP_KERNEL); + if (!cmds) + return -ENOMEM; + + for (int i =3D 0; i < num_vqs; i++) { + struct mlx5_vdpa_async_virtqueue_cmd *cmd =3D &cmds[i]; + struct mlx5_vdpa_virtqueue *mvq; + int vq_idx =3D start_vq + i; + + mvq =3D &ndev->vqs[vq_idx]; + + if (!modifiable_virtqueue_fields(mvq)) { + err =3D -EINVAL; + goto done; + } + + if (mvq->fw_state !=3D state) { + if (!is_valid_state_change(mvq->fw_state, state, is_resumable(ndev))) { + err =3D -EINVAL; + goto done; + } + + mvq->modified_fields |=3D MLX5_VIRTQ_MODIFY_MASK_STATE; + } + + fill_modify_virtqueue_cmd(ndev, mvq, state, cmd); + } + + err =3D exec_virtqueue_async_cmds(ndev, cmds, num_vqs); + if (err) { + mlx5_vdpa_err(mvdev, "error issuing modify cmd for vq range [%d, %d)\n", + start_vq, start_vq + num_vqs); + goto done; + } + + for (int i =3D 0; i < num_vqs; i++) { + struct mlx5_vdpa_async_virtqueue_cmd *cmd =3D &cmds[i]; + struct mlx5_vdpa_virtqueue *mvq; + int vq_idx =3D start_vq + i; + + mvq =3D &ndev->vqs[vq_idx]; + + if (cmd->err) { + mlx5_vdpa_err(mvdev, "modify vq %d failed, state: %d -> %d, err: %d\n", + vq_idx, mvq->fw_state, state, err); + if (!err) + err =3D cmd->err; + continue; + } + + modify_virtqueue_end(ndev, mvq, state); + } + +done: + kfree(cmds); + return err; +} + static int suspend_vq(struct mlx5_vdpa_net *ndev, struct mlx5_vdpa_virtque= ue *mvq) { struct mlx5_virtq_attr attr; @@ -1669,7 +1725,7 @@ static int suspend_vq(struct mlx5_vdpa_net *ndev, str= uct mlx5_vdpa_virtqueue *mv if (mvq->fw_state !=3D MLX5_VIRTIO_NET_Q_OBJECT_STATE_RDY) return 0; =20 - err =3D modify_virtqueue_state(ndev, mvq, MLX5_VIRTIO_NET_Q_OBJECT_STATE_= SUSPEND); + err =3D modify_virtqueues(ndev, mvq->index, 1, MLX5_VIRTIO_NET_Q_OBJECT_S= TATE_SUSPEND); if (err) { mlx5_vdpa_err(&ndev->mvdev, "modify to suspend failed, err: %d\n", err); return err; @@ -1716,7 +1772,7 @@ static int resume_vq(struct mlx5_vdpa_net *ndev, stru= ct mlx5_vdpa_virtqueue *mvq /* Due to a FW quirk we need to modify the VQ fields first then change s= tate. * This should be fixed soon. After that, a single command can be used. */ - err =3D modify_virtqueue(ndev, mvq, 0); + err =3D modify_virtqueues(ndev, mvq->index, 1, mvq->fw_state); if (err) { mlx5_vdpa_err(&ndev->mvdev, "modify vq properties failed for vq %u, err: %d\n", @@ -1738,7 +1794,7 @@ static int resume_vq(struct mlx5_vdpa_net *ndev, stru= ct mlx5_vdpa_virtqueue *mvq return -EINVAL; } =20 - err =3D modify_virtqueue_state(ndev, mvq, MLX5_VIRTIO_NET_Q_OBJECT_STATE_= RDY); + err =3D modify_virtqueues(ndev, mvq->index, 1, MLX5_VIRTIO_NET_Q_OBJECT_S= TATE_RDY); if (err) mlx5_vdpa_err(&ndev->mvdev, "modify to resume failed for vq %u, err: %d\= n", mvq->index, err); --=20 2.45.2