From nobody Wed Oct 30 22:13:04 2024 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6B951EB4AF; Thu, 1 Aug 2024 21:05:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722546331; cv=none; b=j4mrlYAEw/nkU6lAygt7WJ12m+Ip8cc5vX9Y1iNIa10TSWCe+zD8uo84SrkwRom5GyvfRpjuSn1pyiAdZBGrfUzvKpNGXxVNhzCiZV+LVAj6vzAIIOfVPqFU5MGqQqevq4cX4KO0UF5hukoygh8KoFhj/k2mftgoVWYPjb3r+fs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722546331; c=relaxed/simple; bh=g7Bnuk8Wjkp634pvnkFzLhNdTB3IOoB1XO3CU3lIn7I=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tpCb6/qAKF4KTVJ9H3lmplky6KPbLpvzXnACaNT6fNJ87PxRjn07SMXN3MqpyJEbR4oFiXlyMVf2BhscIDzhO5bsri3HULBnuG357VEX+sSyJ85wEcDmugskD1tsx/G2IPOdoUyw+UB2zrtgkERslUOSSZlsiXSzEBLzUZFaLSY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=ESZ8yS8w; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ESZ8yS8w" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 471L5M8r004128; Thu, 1 Aug 2024 16:05:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1722546322; bh=b9JCIu3vgzvuuyB9FzIys0ajlrvriJvHjMYfrzigbIk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ESZ8yS8whmtpe6hP8Gr/u2M4gBludrynyk+G6t6IUuOCVIzFlz6K52ZuzBpDgSbjw g1i61NCphUKZ7Sh4BauR0XINBGSfmoZauTc7tqgB/KIYSq2A/YlL2lQ2Kf13axu4u8 ZmRC9aPXUreDVNJSiR+5NiULh12pmMN/5qg5BP3E= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 471L5MK2002329 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 1 Aug 2024 16:05:22 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 1 Aug 2024 16:05:21 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 1 Aug 2024 16:05:22 -0500 Received: from localhost (uda0499903.dhcp.ti.com [128.247.81.191]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 471L5L5r105779; Thu, 1 Aug 2024 16:05:21 -0500 From: Jared McArthur To: Conor Dooley , Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Jared McArthur Subject: [PATCH v2 1/3] arm64: dts: ti: k3-am62p: Add gpio-ranges for mcu_gpio0 Date: Thu, 1 Aug 2024 16:04:12 -0500 Message-ID: <20240801210414.715306-2-j-mcarthur@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240801210414.715306-1-j-mcarthur@ti.com> References: <20240801210414.715306-1-j-mcarthur@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Commit d72d73a44c3c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties") introduced pinmux range definition for gpio-ranges, however missed introducing the range description for the mcu_gpio node. As a result, automatic mapping of GPIO to pin control for mcu gpios is broken. Fix this by introducing the proper ranges. Fixes: d72d73a44c3c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties") Signed-off-by: Jared McArthur --- Changes since v1: * dropped redundant ti,ngpio v1: https://lore.kernel.org/linux-arm-kernel/20240730143324.114146-2-j-mcar= thur@ti.com/ arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi b/arch/a= rm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi index e65db6ce02bf..df7945156397 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi @@ -146,6 +146,8 @@ mcu_gpio0: gpio@4201000 { power-domains =3D <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>; clocks =3D <&k3_clks 79 0>; clock-names =3D "gpio"; + gpio-ranges =3D <&mcu_pmx0 0 0 21>, <&mcu_pmx0 21 23 1>, + <&mcu_pmx0 22 32 2>; }; =20 mcu_rti0: watchdog@4880000 { --=20 2.34.1 From nobody Wed Oct 30 22:13:04 2024 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A1F313E04C; Thu, 1 Aug 2024 21:05:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722546331; cv=none; b=Q168aPr1TLdP0lOCfVjoGC/e1cT3OkGGM7cJU2vBKpRjhVM+ffFxU++50SJLSTLDGDZjPNVPp/HmaqK121lpPhfGOJfm10nmYCu1d/pn9mts5fYrNZ3WiBzdERYCmwiqhyx7+Bs4mXjbshwCV6tKr5n4bDASQeaat3Sa+uomIfI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722546331; c=relaxed/simple; bh=Ekuta/pBbRFxhkFHJZ42JoT5WTBifV1idhQ4xWbw2x0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=T0deRPosEDxYFehQ7KitIJxG8aHB8MG7U6qzmnGeJ5TZF5ugwIr4vAnio9qhNBPYsU8WVY4LutbZpPHckHeafz4I9xfc4mGW0DI2REN/Sj1fET7gngDQV/94kGnRG2eVX0eA2V3Uxahnc5A6wnHylnPqypD1CG3kSubQ5gwkCYg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=lMTZA3xe; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="lMTZA3xe" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 471L5Mh6004120; Thu, 1 Aug 2024 16:05:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1722546322; bh=pJN6qnHF/4DT1uXdge7zSy+X4d2EnY1ksPhBHlo/BJU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lMTZA3xejJyDSSiEVc0DPWK22/9/tMisic6b0FeezcpvY+MVtr884lvwPEc+HpehW imnynBPJxfGFL62SvRCouukeE2gUWWPjKRKKLV6JPX1efOVDUV3B4WeXhck7r8wP5s vlrJrho68dbUBS/5yGTfh3maTOP4YC0TBaUooPBc= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 471L5MsW104991 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 1 Aug 2024 16:05:22 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 1 Aug 2024 16:05:22 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 1 Aug 2024 16:05:21 -0500 Received: from localhost (uda0499903.dhcp.ti.com [128.247.81.191]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 471L5LdR059853; Thu, 1 Aug 2024 16:05:21 -0500 From: Jared McArthur To: Conor Dooley , Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Jared McArthur Subject: [PATCH v2 2/3] arm64: dts: ti: k3-am62p: Fix gpio-range for main_pmx0 Date: Thu, 1 Aug 2024 16:04:13 -0500 Message-ID: <20240801210414.715306-3-j-mcarthur@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240801210414.715306-1-j-mcarthur@ti.com> References: <20240801210414.715306-1-j-mcarthur@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Commit d72d73a44c3c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties") introduced pinmux range definition for gpio-ranges, however missed a hole within gpio-range for main_pmx0. As a result, automatic mapping of GPIO to pin control for gpios within the main_pmx0 domain is broken. Fix this by correcting the gpio-range. Fixes: d72d73a44c3c ("arm64: dts: ti: k3-am62p: Add gpio-ranges properties") Signed-off-by: Jared McArthur --- Changes since v1: * None v1: https://lore.kernel.org/linux-arm-kernel/20240730143324.114146-3-j-mcar= thur@ti.com/ arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62p-main.dtsi index 57383bd2eaeb..0ce9721b4176 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -45,7 +45,8 @@ &inta_main_dmss { &main_pmx0 { pinctrl-single,gpio-range =3D <&main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD>, - <&main_pmx0_range 33 92 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 33 38 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 72 22 PIN_GPIO_RANGE_IOPAD>, <&main_pmx0_range 137 5 PIN_GPIO_RANGE_IOPAD>, <&main_pmx0_range 143 3 PIN_GPIO_RANGE_IOPAD>, <&main_pmx0_range 149 2 PIN_GPIO_RANGE_IOPAD>; --=20 2.34.1 From nobody Wed Oct 30 22:13:04 2024 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E445414883C; Thu, 1 Aug 2024 21:05:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722546332; cv=none; b=JzIkqER6qPxnn2qv2aDgWOBr30HPrFe0fOUEM7EKCS0/yAo9XREPPpwR1zuSEf9TS2EZo/KPGsuXBSuwkTF8IpIP8Kd95tFhpAztZweDmPLPu7AgOYhijvNNa1Y7SloWsJvDAz5PbRHN/+6+/dxvv5NbvMLvuRFA4m10aeopBG4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722546332; c=relaxed/simple; bh=qF3gkFUI/OArfrpnNmw6KfTS25RnCgsCufjt33ajSuw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=k/GO3ImQaPwYDONBhHx0rzPGi2gSaDZXXQPEDxfQSj0Yhwa4mamoKvpWhrx3+PZIM3B/8Amh2RIbVtfOrZ94uDjwlyF62suMsq081j6EyZX4tu3Rb+RQGsxwD9nV9wmQ0pwLXElh2p848+mC6vBtHKrv0dfO1RhqdNCwPrEKFB8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=iIZ+sRgI; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="iIZ+sRgI" Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 471L5M32035091; Thu, 1 Aug 2024 16:05:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1722546322; bh=GHkPqlPN6e55ynFogOss7TeSkMCf1tr7ys3Dm61ZRok=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=iIZ+sRgI6DomHKf+IojFLMmJgqSBLDViuRHrDFEy8CZOnG6684CdVmyycX61nJpzA 0iwv4eZEGWIv3fhesbRcfxX1hx49M+myKhluYDNdOJIptzYJIHf73AFdEcdJ7Z/XKs ecD4bvw1UMK+OyMvUvme8hiQVZoWM6bUfxIn7zY8= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 471L5MAn002326 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 1 Aug 2024 16:05:22 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 1 Aug 2024 16:05:22 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 1 Aug 2024 16:05:21 -0500 Received: from localhost (uda0499903.dhcp.ti.com [128.247.81.191]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 471L5L6F059856; Thu, 1 Aug 2024 16:05:21 -0500 From: Jared McArthur To: Conor Dooley , Krzysztof Kozlowski , Rob Herring CC: , , , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Jared McArthur Subject: [PATCH v2 3/3] arm64: dts: ti: k3-j722s: Fix gpio-range for main_pmx0 Date: Thu, 1 Aug 2024 16:04:14 -0500 Message-ID: <20240801210414.715306-4-j-mcarthur@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240801210414.715306-1-j-mcarthur@ti.com> References: <20240801210414.715306-1-j-mcarthur@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Commit 5e5c50964e2e ("arm64: dts: ti: k3-j722s: Add gpio-ranges properties") introduced pinmux range definition for gpio-ranges, however missed a hole within gpio-range for main_pmx0. As a result, automatic mapping of GPIO to pin control for gpios within the main_pmx0 domain is broken. Fix this by correcting the gpio-range. Fixes: 5e5c50964e2e ("arm64: dts: ti: k3-j722s: Add gpio-ranges properties") Signed-off-by: Jared McArthur --- Changes since v1: * None v1: https://lore.kernel.org/linux-arm-kernel/20240730143324.114146-4-j-mcar= thur@ti.com/ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j722s-main.dtsi index c797980528ec..dde4bd5c6645 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -193,7 +193,8 @@ &inta_main_dmss { &main_pmx0 { pinctrl-single,gpio-range =3D <&main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD>, - <&main_pmx0_range 33 55 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 33 38 PIN_GPIO_RANGE_IOPAD>, + <&main_pmx0_range 72 17 PIN_GPIO_RANGE_IOPAD>, <&main_pmx0_range 101 25 PIN_GPIO_RANGE_IOPAD>, <&main_pmx0_range 137 5 PIN_GPIO_RANGE_IOPAD>, <&main_pmx0_range 143 3 PIN_GPIO_RANGE_IOPAD>, --=20 2.34.1