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a=openpgp; fpr=1B6F948213EA489734F3997035D5CD577C1E6010 From: Drew Fustini Change the dma-controller and timer nodes to use the APB clock provided by the AP_SUBSYS clock controller. Remove apb_clk reference from BeagleV Ahead and LPI4a dts. Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/d= ocs Signed-off-by: Drew Fustini --- arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 4 ---- .../boot/dts/thead/th1520-lichee-module-4a.dtsi | 4 ---- arch/riscv/boot/dts/thead/th1520.dtsi | 24 ++++++++----------= ---- 3 files changed, 9 insertions(+), 23 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/risc= v/boot/dts/thead/th1520-beaglev-ahead.dts index 5169a718f79c..425f07d73b32 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -45,10 +45,6 @@ &osc_32k { clock-frequency =3D <32768>; }; =20 -&apb_clk { - clock-frequency =3D <62500000>; -}; - &spi_clk { clock-frequency =3D <396000000>; }; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/= riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi index be982a3ac18c..077dbbe4abb6 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi @@ -25,10 +25,6 @@ &osc_32k { clock-frequency =3D <32768>; }; =20 -&apb_clk { - clock-frequency =3D <62500000>; -}; - &spi_clk { clock-frequency =3D <396000000>; }; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/th= ead/th1520.dtsi index f3b2f8236096..6ea5cabbcf60 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -216,12 +216,6 @@ osc_32k: 32k-oscillator { #clock-cells =3D <0>; }; =20 - apb_clk: apb-clk-clock { - compatible =3D "fixed-clock"; - clock-output-names =3D "apb_clk"; - #clock-cells =3D <0>; - }; - spi_clk: spi-clock { compatible =3D "fixed-clock"; clock-output-names =3D "spi_clk"; @@ -422,7 +416,7 @@ dmac0: dma-controller@ffefc00000 { compatible =3D "snps,axi-dma-1.01a"; reg =3D <0xff 0xefc00000 0x0 0x1000>; interrupts =3D <27 IRQ_TYPE_LEVEL_HIGH>; - clocks =3D <&apb_clk>, <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>, <&clk CLK_PERI_APB_PCLK>; clock-names =3D "core-clk", "cfgr-clk"; #dma-cells =3D <1>; dma-channels =3D <4>; @@ -437,7 +431,7 @@ dmac0: dma-controller@ffefc00000 { timer0: timer@ffefc32000 { compatible =3D "snps,dw-apb-timer"; reg =3D <0xff 0xefc32000 0x0 0x14>; - clocks =3D <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>; clock-names =3D "timer"; interrupts =3D <16 IRQ_TYPE_LEVEL_HIGH>; status =3D "disabled"; @@ -446,7 +440,7 @@ timer0: timer@ffefc32000 { timer1: timer@ffefc32014 { compatible =3D "snps,dw-apb-timer"; reg =3D <0xff 0xefc32014 0x0 0x14>; - clocks =3D <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>; clock-names =3D "timer"; interrupts =3D <17 IRQ_TYPE_LEVEL_HIGH>; status =3D "disabled"; @@ -455,7 +449,7 @@ timer1: timer@ffefc32014 { timer2: timer@ffefc32028 { compatible =3D "snps,dw-apb-timer"; reg =3D <0xff 0xefc32028 0x0 0x14>; - clocks =3D <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>; clock-names =3D "timer"; interrupts =3D <18 IRQ_TYPE_LEVEL_HIGH>; status =3D "disabled"; @@ -464,7 +458,7 @@ timer2: timer@ffefc32028 { timer3: timer@ffefc3203c { compatible =3D "snps,dw-apb-timer"; reg =3D <0xff 0xefc3203c 0x0 0x14>; - clocks =3D <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>; clock-names =3D "timer"; interrupts =3D <19 IRQ_TYPE_LEVEL_HIGH>; status =3D "disabled"; @@ -495,7 +489,7 @@ uart5: serial@fff7f0c000 { timer4: timer@ffffc33000 { compatible =3D "snps,dw-apb-timer"; reg =3D <0xff 0xffc33000 0x0 0x14>; - clocks =3D <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>; clock-names =3D "timer"; interrupts =3D <20 IRQ_TYPE_LEVEL_HIGH>; status =3D "disabled"; @@ -504,7 +498,7 @@ timer4: timer@ffffc33000 { timer5: timer@ffffc33014 { compatible =3D "snps,dw-apb-timer"; reg =3D <0xff 0xffc33014 0x0 0x14>; - clocks =3D <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>; clock-names =3D "timer"; interrupts =3D <21 IRQ_TYPE_LEVEL_HIGH>; status =3D "disabled"; @@ -513,7 +507,7 @@ timer5: timer@ffffc33014 { timer6: timer@ffffc33028 { compatible =3D "snps,dw-apb-timer"; reg =3D <0xff 0xffc33028 0x0 0x14>; - clocks =3D <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>; clock-names =3D "timer"; interrupts =3D <22 IRQ_TYPE_LEVEL_HIGH>; status =3D "disabled"; @@ -522,7 +516,7 @@ timer6: timer@ffffc33028 { timer7: timer@ffffc3303c { compatible =3D "snps,dw-apb-timer"; reg =3D <0xff 0xffc3303c 0x0 0x14>; - clocks =3D <&apb_clk>; + clocks =3D <&clk CLK_PERI_APB_PCLK>; clock-names =3D "timer"; interrupts =3D <23 IRQ_TYPE_LEVEL_HIGH>; status =3D "disabled"; --=20 2.34.1