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a=openpgp; fpr=1B6F948213EA489734F3997035D5CD577C1E6010 From: Drew Fustini Change the clock property in the TH1520 mmc controller nodes to a clock provided by AP_SYS clock controller. Remove sdhci fixed clock reference from BeagleV Ahead and LPI4a dts. Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/d= ocs Signed-off-by: Drew Fustini --- arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 4 ---- arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi | 4 ---- arch/riscv/boot/dts/thead/th1520.dtsi | 13 +++---------- 3 files changed, 3 insertions(+), 18 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/risc= v/boot/dts/thead/th1520-beaglev-ahead.dts index 90585883b059..5169a718f79c 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -49,10 +49,6 @@ &apb_clk { clock-frequency =3D <62500000>; }; =20 -&sdhci_clk { - clock-frequency =3D <198000000>; -}; - &spi_clk { clock-frequency =3D <396000000>; }; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/= riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi index 1c5c7075ae17..be982a3ac18c 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi @@ -29,10 +29,6 @@ &apb_clk { clock-frequency =3D <62500000>; }; =20 -&sdhci_clk { - clock-frequency =3D <198000000>; -}; - &spi_clk { clock-frequency =3D <396000000>; }; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/th= ead/th1520.dtsi index a543be8d6e37..f3b2f8236096 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -228,13 +228,6 @@ spi_clk: spi-clock { #clock-cells =3D <0>; }; =20 - sdhci_clk: sdhci-clock { - compatible =3D "fixed-clock"; - clock-frequency =3D <198000000>; - clock-output-names =3D "sdhci_clk"; - #clock-cells =3D <0>; - }; - soc { compatible =3D "simple-bus"; interrupt-parent =3D <&plic>; @@ -290,7 +283,7 @@ emmc: mmc@ffe7080000 { compatible =3D "thead,th1520-dwcmshc"; reg =3D <0xff 0xe7080000 0x0 0x10000>; interrupts =3D <62 IRQ_TYPE_LEVEL_HIGH>; - clocks =3D <&sdhci_clk>; + clocks =3D <&clk CLK_EMMC_SDIO>; clock-names =3D "core"; status =3D "disabled"; }; @@ -299,7 +292,7 @@ sdio0: mmc@ffe7090000 { compatible =3D "thead,th1520-dwcmshc"; reg =3D <0xff 0xe7090000 0x0 0x10000>; interrupts =3D <64 IRQ_TYPE_LEVEL_HIGH>; - clocks =3D <&sdhci_clk>; + clocks =3D <&clk CLK_EMMC_SDIO>; clock-names =3D "core"; status =3D "disabled"; }; @@ -308,7 +301,7 @@ sdio1: mmc@ffe70a0000 { compatible =3D "thead,th1520-dwcmshc"; reg =3D <0xff 0xe70a0000 0x0 0x10000>; interrupts =3D <71 IRQ_TYPE_LEVEL_HIGH>; - clocks =3D <&sdhci_clk>; + clocks =3D <&clk CLK_EMMC_SDIO>; clock-names =3D "core"; status =3D "disabled"; }; --=20 2.34.1