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Cc: Daniel Baluta Signed-off-by: Animesh Agarwal --- .../bindings/clock/nxp,lpc3220-clk.txt | 30 ----------- .../bindings/clock/nxp,lpc3220-clk.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 30 deletions(-) delete mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk= .txt create mode 100644 Documentation/devicetree/bindings/clock/nxp,lpc3220-clk= .yaml diff --git a/Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt b/= Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt deleted file mode 100644 index 20cbca3f41d8..000000000000 --- a/Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt +++ /dev/null @@ -1,30 +0,0 @@ -NXP LPC32xx Clock Controller - -Required properties: -- compatible: should be "nxp,lpc3220-clk" -- reg: should contain clock controller registers location and length -- #clock-cells: must be 1, the cell holds id of a clock provided by the - clock controller -- clocks: phandles of external oscillators, the list must contain one - 32768 Hz oscillator and may have one optional high frequency oscillator -- clock-names: list of external oscillator clock names, must contain - "xtal_32k" and may have optional "xtal" - -Examples: - - /* System Control Block */ - scb { - compatible =3D "simple-bus"; - ranges =3D <0x0 0x040004000 0x00001000>; - #address-cells =3D <1>; - #size-cells =3D <1>; - - clk: clock-controller@0 { - compatible =3D "nxp,lpc3220-clk"; - reg =3D <0x00 0x114>; - #clock-cells =3D <1>; - - clocks =3D <&xtal_32k>, <&xtal>; - clock-names =3D "xtal_32k", "xtal"; - }; - }; diff --git a/Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.yaml b= /Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.yaml new file mode 100644 index 000000000000..2faa845bab21 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/nxp,lpc3220-clk.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC32xx Clock Controller + +maintainers: + - Animesh Agarwal + +properties: + compatible: + const: nxp,lpc3220-clk + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + clocks: + description: Phandles of external oscillators, the list must contain o= ne + 32768 Hz oscillator and may have one optional high frequency oscilla= tor. + maxItems: 2 + + clock-names: + oneOf: + - items: + - const: xtal_32k + - const: xtal + - const: xtal_32k + +required: + - compatible + - reg + - '#clock-cells' + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + clock-controller@0 { + compatible =3D "nxp,lpc3220-clk"; + reg =3D <0x00 0x114>; + #clock-cells =3D <1>; + clocks =3D <&xtal_32k>, <&xtal>; + clock-names =3D "xtal_32k", "xtal"; + }; --=20 2.45.2