From nobody Fri Sep 20 01:45:38 2024 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9A8B12D773 for ; Mon, 29 Jul 2024 07:09:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722236996; cv=none; b=lRT+0N8u5X7Q9mwL9Ze9D3Hz2Ay+LeiTjyetb1dWmmI1CH0HkYznlC6Xe+oEP8LS/JbWoQMPViEMFQTPZSgtuJcLJEenpzjzSOq+03riSE6zTn9FBcBgFM3DUNoDKTlJ6qcJcN/SK6hTViwvJih0mvcu7kYT3cWZYDVcDrf4ps8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722236996; c=relaxed/simple; bh=Zp4EXrWaqvt9w4fN5txweOfGJMN/jM2LGcFRrFU+QQY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fCE4g/nLzZz/3EmObUimtz/vT4X5LIlG8jtrZ78Um5ams4/gxoE0ZTpjEYCwftJTEFJO7GPBkISLCydOLynZTrA4xxYW2zkAOw7+naJJKmJgvREaTmdTPL9ODAaWkZh9pfff9HSmsSYSJWA8Tz2Tnb2YNtDv+ZIkqlmfxTauCeg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=sFXhpdAB; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="sFXhpdAB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1722236995; x=1753772995; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Zp4EXrWaqvt9w4fN5txweOfGJMN/jM2LGcFRrFU+QQY=; b=sFXhpdAB9mzv9FctscZnnx7bm2PgIrKX+CnJEhkUjAVgQB5hmpqneJ8E SIIzTn56sOraxz4SAiKUR5dPU42OJex6VblYUTXX0aWspKctRY5RObyfn gMw7u3pJIDQ1sjDTuV/uMbiK41ghekc1n+9JkTfLB898TVnzUx57yqo6w Hp6tVvGTwA2cH1XtZby0qAU6x06CNhi1Ja+SE2Y+K1SGakhnOc8MyYIxq loOMK9ZgxVMfegGHua9m1gBMJGjyJ1J1oZZpf6s7aJMdHvQuE1yv3m732 5e+YcA0206YPNcw4SLmHTldiytpwf7q4V54bm6dNualVzdMlD7dpzsyn/ Q==; X-CSE-ConnectionGUID: YmCZXuD3Tai4yHyg8vJh5A== X-CSE-MsgGUID: iLQ2sjlpSFyFcszSVTt3Ag== X-IronPort-AV: E=Sophos;i="6.09,245,1716274800"; d="scan'208";a="30454182" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 29 Jul 2024 00:09:53 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 29 Jul 2024 00:09:22 -0700 Received: from che-lt-i67070.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 29 Jul 2024 00:09:20 -0700 From: Varshini Rajendran To: , , , , , CC: Subject: [PATCH v6 23/27] ARM: at91: Kconfig: add config flag for SAM9X7 SoC Date: Mon, 29 Jul 2024 12:39:16 +0530 Message-ID: <20240729070916.1991370-1-varshini.rajendran@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240729065603.1986074-1-varshini.rajendran@microchip.com> References: <20240729065603.1986074-1-varshini.rajendran@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add config flag for sam9x7 SoC. Signed-off-by: Varshini Rajendran Reviewed-by: Claudiu Beznea --- arch/arm/mach-at91/Kconfig | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index a8c022b4c053..344f5305f69a 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -141,11 +141,27 @@ config SOC_SAM9X60 help Select this if you are using Microchip's SAM9X60 SoC =20 +config SOC_SAM9X7 + bool "SAM9X7" + depends on ARCH_MULTI_V5 + select ATMEL_AIC5_IRQ + select ATMEL_PM if PM + select CPU_ARM926T + select HAVE_AT91_USB_CLK + select HAVE_AT91_GENERATED_CLK + select HAVE_AT91_SAM9X60_PLL + select MEMORY + select PINCTRL_AT91 + select SOC_SAM_V4_V5 + select SRAM if PM + help + Select this if you are using Microchip's SAM9X7 SoC + comment "Clocksource driver selection" =20 config ATMEL_CLOCKSOURCE_PIT bool "Periodic Interval Timer (PIT) support" - depends on SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5 + depends on SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAM9X7 || SOC_SAMA5 default SOC_AT91SAM9 || SOC_SAMA5 select ATMEL_PIT help @@ -155,7 +171,7 @@ config ATMEL_CLOCKSOURCE_PIT =20 config ATMEL_CLOCKSOURCE_TCB bool "Timer Counter Blocks (TCB) support" - default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5 + default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAM9X7 || SO= C_SAMA5 select ATMEL_TCB_CLKSRC help Select this to get a high precision clocksource based on a @@ -166,7 +182,7 @@ config ATMEL_CLOCKSOURCE_TCB =20 config MICROCHIP_CLOCKSOURCE_PIT64B bool "64-bit Periodic Interval Timer (PIT64B) support" - default SOC_SAM9X60 || SOC_SAMA7 + default SOC_SAM9X60 || SOC_SAM9X7 || SOC_SAMA7 select MICROCHIP_PIT64B help Select this to get a high resolution clockevent (SAM9X60) or --=20 2.25.1