From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4227F1419A9 for ; Tue, 23 Jul 2024 19:55:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764551; cv=none; b=iN+iw/Fr/k/UHktJehAZDGJ8qvsSe19rJT7kPy1oe9KcGhfL8vRzVMfDIubdpyU3TKWSah+xyciy2L6U9uvCN0lNICSIL/p0k8AJbWn7gTpQkmssfgEWU4FxRZlYihP6fDxmHNmPDyS21CY68tVkEqqC35+ek6SIKRfDWIEDTos= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764551; c=relaxed/simple; bh=kzKCdfzjM1jjlKnYDcHJftGos9pVQ/POSH6jdC8pjzU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=WPeEULDxMGRKOvtCK6fGc70UuHDJKiYHXOa/kMm3w72l4om4gDdspRRok/3eq8rox3lCDSuqIB+UZJJGRo30D9uT9AJjr9B2S0z/+xZt3Y7HAzKWvCdKTiXwN9T7uNj8MxgDySbbjVD4Mk2skjupNSSqp6DDArjFRIGV995LUn8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbs-0005iD-3Y; Tue, 23 Jul 2024 21:55:44 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 01/14] arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:25 +0200 Message-Id: <20240723195538.1133436-2-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add the vcc3v3-supply regulator and its link to the pcie controllers. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 6a998166003c9..07b4f095d766a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -12,6 +12,25 @@ / { model =3D "Qnap TS-433-4G NAS System 4-Bay"; compatible =3D "qnap,ts433", "rockchip,rk3568"; + + dc_12v: regulator-dc-12v { + compatible =3D "regulator-fixed"; + regulator-name =3D "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_pcie"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpios =3D <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&dc_12v>; + }; }; =20 &gmac0 { @@ -62,9 +81,11 @@ &pcie30phy { status =3D "okay"; }; =20 +/* Connected to a JMicron AHCI SATA controller */ &pcie3x1 { /* The downstream dts has: rockchip,bifurcation, XXX: find out what this = is about */ reset-gpios =3D <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_pcie>; status =3D "okay"; }; =20 --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 421FA13D62B for ; Tue, 23 Jul 2024 19:55:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764551; cv=none; b=tdSRAl14mrFam2jtgHHklUnycB4KyHWiBq5sDBK0fhegLt10l+6bWPPBFBw/ViVoVXeRrzxK9pa00nDse+kox32JN8xuORazjPavUHF/8pEO8YQU4mMtDJ076EB7k+cKXtDI7Sswaxdfy79tbW7sx8Ae+99Ygqk++SbhHvrGyq4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764551; c=relaxed/simple; bh=YVs+8aAqrE+NDiYPiMbXaVauajNFuoRuWlOsHReNkBQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=OMeAhnYtryIT2P9mMoK92hKvu8vr2wNs9Oy9fBvYhtp8wschpetjAS7DnrwGYmiqUuqF2uoki/1QLvSk6sftFZs+94fzk6oJeplbTFwf8yP/AJ+S1AhtQ4hWX2g2smoxBhKJZQTetoI8Cp9wz2fWESrs2zhb80NCjmidad7wM1o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbs-0005iD-Co; Tue, 23 Jul 2024 21:55:44 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 02/14] arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:26 +0200 Message-Id: <20240723195538.1133436-3-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The TS433 uses both pcie controllers for sata and the 2nd network interface. Set the needed data-lanes in the pcie3 phy and enable the second pcie controller, as well as remove the bifurcation comment. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 07b4f095d766a..9bf9c3b65ca31 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -78,17 +78,25 @@ rgmii_phy0: ethernet-phy@0 { }; =20 &pcie30phy { + data-lanes =3D <1 2>; status =3D "okay"; }; =20 /* Connected to a JMicron AHCI SATA controller */ &pcie3x1 { - /* The downstream dts has: rockchip,bifurcation, XXX: find out what this = is about */ reset-gpios =3D <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; vpcie3v3-supply =3D <&vcc3v3_pcie>; status =3D "okay"; }; =20 +/* Connected to the 2.5G NIC for the upper network jack */ +&pcie3x2 { + num-lanes =3D <1>; + reset-gpios =3D <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_pcie>; + status =3D "okay"; +}; + &sdhci { bus-width =3D <8>; max-frequency =3D <200000000>; --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CED2142624 for ; Tue, 23 Jul 2024 19:55:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764550; cv=none; b=igX0KIySEgWe/vZAXAPtuBYQcDHKk9kDWc0eZBp8cCKxVXqRosoG0wElrocISkHTzyKljZe+vDSTtXmTnUWRZLa2qtmn6Tvi9FE5MoS+1n/ODQPVPgZF8h3g+UpQXK+qOSyhxEpUl29xamqhiqnIE3K48uZ2U7Yc8+BYu/w8ZR4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764550; c=relaxed/simple; bh=OgH/MFn71YZJud8AydSKjAwdpyC0D4f2pGsG8wxHlF0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=oEOw3x/fb4hL+77Qo0ZUmB6qXnxOX1WYapM13SlYhhEAcAWJ8r1rgUlvv0rGDXBnqWjZXxHgTBXCUFH2px67l1u75ntgSRGwwHGpIlnCrX9bB7A/0crjnsJzY0NmT691fLF5wKx+aE46D1PWqVRQG5bxeOEoNNvp+TeArVsyj4Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbs-0005iD-MN; Tue, 23 Jul 2024 21:55:44 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 03/14] arm64: dts: rockchip: enable uart0 on Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:27 +0200 Message-Id: <20240723195538.1133436-4-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Uart0 is connected to an MCU on the board that handles system control like the fan-speed. So far no driver for it is available though. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 9bf9c3b65ca31..bc26f2e98c185 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -104,6 +104,14 @@ &sdhci { status =3D "okay"; }; =20 +/* + * Connected to an MCU, that provides access to more LEDs, + * buzzer, fan control and more. + */ +&uart0 { + status =3D "okay"; +}; + /* * Pins available on CN3 connector at TTL voltage level (3V3). * ,_ _. --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACC24142900 for ; Tue, 23 Jul 2024 19:55:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764553; cv=none; b=MgwL61Cyn8QX4ijBJXAKGiARqSLyZLYEtKpHym25jSPfTdds2NyxEmMf05Ymk6UyB8ty/ww5zSws7+v41WwU2emyTqpuM0JCqBIzDAACuWS9qImy58WNYoj4jqEyVNl69J2ZJ/58/NWkwfMn90i43wxxJRJ+B151brCifPj8PFg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764553; c=relaxed/simple; bh=siaa5Dl6YfAWE2fQw0Zx8GINVmj/HUSZMirEio531vU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=gYIMRN4Val1hSceryX0Sf5FoOundLFJMmWSzTzFdqhGq0fb//231lSiYJiWHYb2GHritJOQclh5dk9fMtwkpdmWVFOWPAJDNw4j+bzVA6SDql584CUPAIzROxymPAxM291AZe5yfNRv2nSxUqTsvIs+gyPPAhjsGKFEcD/xcGdU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbs-0005iD-Vv; Tue, 23 Jul 2024 21:55:45 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 04/14] arm64: dts: rockchip: enable usb ports on Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:28 +0200 Message-Id: <20240723195538.1133436-5-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Enable usb controllers and phys and add regulator infrastructure for the usb ports on the TS433. Of course there are no schematics available for the device, so the regulator information comes from the vendor-devicetree with unknown accuracy. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index bc26f2e98c185..da735c4764f4d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -31,6 +31,49 @@ vcc3v3_pcie: regulator-vcc3v3-pcie { gpios =3D <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; vin-supply =3D <&dc_12v>; }; + + vcc5v0_host: regulator-vcc5v0-host { + compatible =3D "regulator-fixed"; + enable-active-high; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_host_en>; + gpio =3D <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + regulator-name =3D "vcc5v0_host"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_usb>; + }; + + vcc5v0_otg: regulator-vcc5v0-otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_otg_en>; + regulator-name =3D "vcc5v0_otg"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_usb>; + }; + + vcc5v0_usb: regulator-vcc5v0-usb { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; +}; + +/* connected to usb_host0_xhci */ +&combphy0 { + status =3D "okay"; }; =20 &gmac0 { @@ -97,6 +140,18 @@ &pcie3x2 { status =3D "okay"; }; =20 +&pinctrl { + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + &sdhci { bus-width =3D <8>; max-frequency =3D <200000000>; @@ -121,3 +176,53 @@ &uart0 { &uart2 { status =3D "okay"; }; + +&usb2phy0 { + status =3D "okay"; +}; + +/* connected to usb_host0_xhci */ +&usb2phy0_otg { + phy-supply =3D <&vcc5v0_otg>; + status =3D "okay"; +}; + +&usb2phy1 { + status =3D "okay"; +}; + +/* connected to usb_host1_ehci/ohci */ +&usb2phy1_host { + phy-supply =3D <&vcc5v0_host>; + status =3D "okay"; +}; + +/* connected to usb_host0_ehci/ohci */ +&usb2phy1_otg { + phy-supply =3D <&vcc5v0_host>; + status =3D "okay"; +}; + +/* right port backside */ +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +/* front port */ +&usb_host0_xhci { + dr_mode =3D "host"; + status =3D "okay"; +}; + +/* left port backside */ +&usb_host1_ehci { + status =3D "okay"; +}; + +&usb_host1_ohci { + status =3D "okay"; +}; --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 719421428E3 for ; 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dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbt-0005iD-8f; Tue, 23 Jul 2024 21:55:45 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 05/14] arm64: dts: rockchip: add stdout path on Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:29 +0200 Message-Id: <20240723195538.1133436-6-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable As most Rockchip boards do, the TS433 also uses uart2 for its serial output. Set the correct chosen entry for it. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index da735c4764f4d..be1c2286c2d3f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -13,6 +13,10 @@ / { model =3D "Qnap TS-433-4G NAS System 4-Bay"; compatible =3D "qnap,ts433", "rockchip,rk3568"; =20 + chosen { + stdout-path =3D "serial2:115200n8"; + }; + dc_12v: regulator-dc-12v { compatible =3D "regulator-fixed"; regulator-name =3D "dc_12v"; --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 106701422CA for ; Tue, 23 Jul 2024 19:55:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764550; cv=none; b=iY0oxBmizIP8CC61wiynp3IcNX7/KOHNNBHklAB9wTsc7IAOO98yKH+FiGCZ8uysDCZncRFlwG54VgKabJiKy6Mo511EHRkIUJkns4buCOiiZ/qwcTmrvMX4LymYt+3+oW0MetTP3hNtPkjoKxbDhu1uan8lUcy6mdZZ9+QDyII= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764550; c=relaxed/simple; bh=wkf2vLgrGwoh0d3uJV3GsJvNlH8sZgt+B7kJvWyxcts=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=qb1uTTnwwq6CST3awzFGJxMuZ4mLes9rY7YDTMaxn6R9kJGhvfXAMOmnqMdn8ZzP+9wZGPt6BqP2NlcJB8+knFbox7nAaGGsNydv2Rp31MlVTG4MD58PmkU4Oe7IJBqSuzRvzg7EUG+MX6BruxykrG4S4miLltIVGcq32mHhS84= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbt-0005iD-Hk; Tue, 23 Jul 2024 21:55:45 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:30 +0200 Message-Id: <20240723195538.1133436-7-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The TS433 has 4 bays. The last two are accessed via a pci-connected sata controller, while the first two are accessed via the rk3568's sata controllers. Enable these two now. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index be1c2286c2d3f..40af4dd0e4158 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -80,6 +80,16 @@ &combphy0 { status =3D "okay"; }; =20 +/* connected to sata1 */ +&combphy1 { + status =3D "okay"; +}; + +/* connected to sata2 */ +&combphy2 { + status =3D "okay"; +}; + &gmac0 { assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_= 2TOP>; @@ -156,6 +166,14 @@ vcc5v0_otg_en: vcc5v0-otg-en { }; }; =20 +&sata1 { + status =3D "okay"; +}; + +&sata2 { + status =3D "okay"; +}; + &sdhci { bus-width =3D <8>; max-frequency =3D <200000000>; --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 106261422C2 for ; Tue, 23 Jul 2024 19:55:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764550; cv=none; b=QDSM9T1aPFk1kONsbgZ7ThOoV2+HCDkc0xkXx+VA26TA3KclBdB6uoekV1IROKJf+EDSbKl9jMSX0qT8BzRE/WZ6ERK3y64Z51swuZKIT5PxUfYaDcpsBzYkOnVdIFA30tuUSDt1gKEVT0HEqxBiAB22sD6oIzGeqXpjCCUoirQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764550; c=relaxed/simple; bh=S3ho6SUmTBF2bE3IDyNrQVkY8d9GBQFzhD6s7sACLbk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=hcb8/GxOQccuBjIBDzsUaKIG9c9L6CsJ+M5H8fVgT6mqznaUtav8BQ3C4mjvq7ZMmtOfLFeo9wTjtMljXr74syuVpGGku3SPKVCNUETjq4Qg8SmJDAd4kAyswPYbLBktNqqc8P+OXJrfcmsuOMKRs1+oC666JbpVDpRgvJWtaFE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbt-0005iD-RD; Tue, 23 Jul 2024 21:55:45 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 07/14] arm64: dts: rockchip: add board-aliases for Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:31 +0200 Message-Id: <20240723195538.1133436-8-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add the aliases for the internal network interface as well as the emmc on the board and make sure the dedicated RTC is always the first one. The TS433 actually has two rtc devices. One coming from the rk809 pmic without added functionality and also a dedicated RTC from Mycrocrystal that is battery backed to keep the time. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 40af4dd0e4158..8be36250aa13d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -13,6 +13,12 @@ / { model =3D "Qnap TS-433-4G NAS System 4-Bay"; compatible =3D "qnap,ts433", "rockchip,rk3568"; =20 + aliases { + ethernet0 =3D &gmac0; + mmc0 =3D &sdhci; + rtc0 =3D &rtc_rv8263; + }; + chosen { stdout-path =3D "serial2:115200n8"; }; @@ -120,7 +126,7 @@ pmic@20 { &i2c1 { status =3D "okay"; =20 - rtc@51 { + rtc_rv8263: rtc@51 { compatible =3D "microcrystal,rv8263"; reg =3D <0x51>; wakeup-source; --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7089E14265F for ; Tue, 23 Jul 2024 19:55:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764552; cv=none; b=huoqGNNY2c8IawooL8mBA49g9PZB8Qm2oQE8oXdWrOUPM98qfH55hRgntIWRuvOfTJaSYxY7+TC6KxTLgmI/M00MQS9ehwvEz3o4aUmpqTKGFkamGADAy4IWc2+J1Mc7atD2jxXVs3/3q1zwLw0oNpH9ZP/FvR8X5MoJzvQmBSg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764552; c=relaxed/simple; bh=blULZrk13edLjmvHGMo0BEZQI3JntETqqMg35CNfIOY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=c4VL9w3KHqzeEMqpS+9BZ+rLRZeaKKtnYqpH35+fSZQOGc6cTUluB8JbKUgvl/vBpfY1UE/Aa2Ku9+N+7VPYicVX6v/w8ylCPIhYW4pi3yIxQKvtF3pziGOSRJ01D36XhcYjIEDyE/R3lOBYJk0DUykYpQsVu2xJgqrK2TBMQRY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbu-0005iD-48; Tue, 23 Jul 2024 21:55:46 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 08/14] arm64: dts: rockchip: add hdd leds to Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:32 +0200 Message-Id: <20240723195538.1133436-9-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add the 4 gpio-controlled LEDs to the Qnap-TS433. They are meant for individual disk activitivy, but I haven't found a way for how to connect them to their individual sata slot yet. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 8be36250aa13d..abeb00add42a0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -6,6 +6,7 @@ =20 /dts-v1/; =20 +#include #include #include "rk3568.dtsi" =20 @@ -23,6 +24,46 @@ chosen { stdout-path =3D "serial2:115200n8"; }; =20 + leds { + compatible =3D "gpio-leds"; + + led-0 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd1_led_pin>; + }; + + led-1 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd2_led_pin>; + }; + + led-2 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd3_led_pin>; + }; + + led-3 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd4_led_pin>; + }; + }; + dc_12v: regulator-dc-12v { compatible =3D "regulator-fixed"; regulator-name =3D "dc_12v"; @@ -161,6 +202,24 @@ &pcie3x2 { }; =20 &pinctrl { + leds { + hdd1_led_pin: hdd1-led-pin { + rockchip,pins =3D <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd2_led_pin: hdd2-led-pin { + rockchip,pins =3D <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd3_led_pin: hdd3-led-pin { + rockchip,pins =3D <1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd4_led_pin: hdd4_led-pin { + rockchip,pins =3D <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF9D2146D42 for ; Tue, 23 Jul 2024 19:55:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764554; cv=none; b=Wj5Ul2T1vpepgZwu2qj3B4LhIK7G6Jgu8/ar6lfa9TiwljdIeAnLcP+s/vtgf611Th+vrZVDkrLm0YKcvMYnSheHlGz98FlwoXDNJYRmEMI9q7yWJ31pY2pYWViQeXa5EyRv+4gkTVO+4XsGk62OQNwaw987YxrczZ/6EBSXU/U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764554; c=relaxed/simple; bh=5c+JZjmPrUNaahc4ardFvhoc1DkgD/htOa8a6ZliThY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=rTboGDkCMBrypjaLS5sR3olBQyIK25iZgRAehq1IBaxQW6Bj0+u4b2mB4xjhZOgp9hXAFF3dUZjy3GqTu0U3GtjYotMw6UV/jE6DOY524UC2uJe6wsOS7JArJZVt5yS7bF5vHtUX4oHn5Fj6az0MXacyixg27woC2+ikHEDZFrw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbu-0005iD-Dg; Tue, 23 Jul 2024 21:55:46 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 09/14] arm64: dts: rockchip: enable the tsadc on the Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:33 +0200 Message-Id: <20240723195538.1133436-10-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Enable the tsadc node to allow for temperature measurements of the soc. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index abeb00add42a0..34fc31ea9a39a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -246,6 +246,12 @@ &sdhci { status =3D "okay"; }; =20 +&tsadc { + rockchip,hw-tshut-mode =3D <1>; + rockchip,hw-tshut-polarity =3D <0>; + status =3D "okay"; +}; + /* * Connected to an MCU, that provides access to more LEDs, * buzzer, fan control and more. --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35FE01442ED for ; Tue, 23 Jul 2024 19:56:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764604; cv=none; b=dh8oZfW3FwsAvO5sRh8ZpMTWj5emfn6jWVgrrR2VejVWhhUHRczgzAEZjlhrcR/ORhbUVyyVRRG2Hb3JWMzjUhb30xiOw5xsQ00AARPWNBunhL9DJxwh4PowtwK/1QJ9682OF590Rw07phGbw7RyORJj0BSWLPizXs8UXIgm/cM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764604; c=relaxed/simple; bh=CK5oqUywZaoe3khyZudk2BNNWMAzJiA5zSYb5ZOZLv4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=nYHHUR+7B0IkzBlVEZsvxGOTzQczQ80LL1SIKJPe04peQ9oVX3yszKWUvWxO+jUVi5NWY//k7zUMpDujDn7vYM/VsKY0ik+uiO0uQQyaEzI/DYZQ9gMhdU69e8XyhHysAQ08A5HlK4yHSONpUEiBXRZpSfKwqCkrNSfSSbJlr64= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbu-0005iD-NE; Tue, 23 Jul 2024 21:55:46 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 10/14] arm64: dts: rockchip: add gpio-keys to Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:34 +0200 Message-Id: <20240723195538.1133436-11-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The TS433 has 3 buttons, power and copy in the front as well as a reset pinhole button on the back. The power-button is connected to the embedded controller while the other two buttons are just gpio connected. Add the gpio-keys definition for the two buttons we can handle right now. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 34fc31ea9a39a..9f964b6f411c9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -6,6 +6,7 @@ =20 /dts-v1/; =20 +#include #include #include #include "rk3568.dtsi" @@ -24,6 +25,24 @@ chosen { stdout-path =3D "serial2:115200n8"; }; =20 + keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <©_button_pin>, <&reset_button_pin>; + pinctrl-names =3D "default"; + + key-copy { + label =3D "copy"; + gpios =3D <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + key-reset { + label =3D "reset"; + gpios =3D <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; + leds { compatible =3D "gpio-leds"; =20 @@ -202,6 +221,16 @@ &pcie3x2 { }; =20 &pinctrl { + keys { + copy_button_pin: copy-button-pin { + rockchip,pins =3D <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + reset_button_pin: reset-button-pin { + rockchip,pins =3D <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + leds { hdd1_led_pin: hdd1-led-pin { rockchip,pins =3D <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7049D1422C2 for ; Tue, 23 Jul 2024 19:56:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764590; cv=none; b=dldW9c3mLK6C9/3iEOzdqBPZEwu+W6hlFJSzZlLn48mcpc0lnOi07dD5cAzks4Zrm6zPAvDqJUUTpnl2HA/uHKBVBZ0pdacf836UD6oropkPfjioH64N/nvs22WkHzw6QYnw5g0Tngrpzznw5B/p+WGlvYtPl9Z9YooyhQ+R5Po= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764590; c=relaxed/simple; bh=ZbBdeRJxuk7YbO/bXBzO3YnepfTaBAf2cbZ75sW7jcs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=lers1YbI0tAEEqlfZkPV4z+zoTbdsSxutZGKf2oqCESVSBTi26ZvrgLgI4qkS6bDaBuBQ6XDrdx+FffjThK7KDJtfCOXefTU0Gy8VrhIDYQ0GGNJNUz32GPeu3bZNM1aG3kD37lDwS2pYovKJzdLG2L9Nek1jg634Z3zohguFgU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbv-0005iD-0R; Tue, 23 Jul 2024 21:55:47 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 11/14] arm64: dts: rockchip: define cpu-supply on the Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:35 +0200 Message-Id: <20240723195538.1133436-12-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The TS433 seems to use a silergy,syr827 regulator for the cpu supply. At least that is the compatible used in the vendor devicetree, though it could very well also be another fan53555 clone. Define the needed regulator node and hook up the cpu-supply to the cpu cores. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 9f964b6f411c9..4bccefc0537ed 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -130,6 +130,16 @@ vcc5v0_otg: regulator-vcc5v0-otg { vin-supply =3D <&vcc5v0_usb>; }; =20 + vcc5v0_sys: regulator-vcc5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; + vcc5v0_usb: regulator-vcc5v0-usb { compatible =3D "regulator-fixed"; regulator-name =3D "vcc5v0_usb"; @@ -156,6 +166,22 @@ &combphy2 { status =3D "okay"; }; =20 +&cpu0 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_cpu>; +}; + &gmac0 { assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_= 2TOP>; @@ -175,12 +201,27 @@ &gmac0_rgmii_clk }; =20 &i2c0 { + status =3D "okay"; + pmic@20 { compatible =3D "rockchip,rk809"; reg =3D <0x20>; interrupt-parent =3D <&gpio0>; interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; }; + + vdd_cpu: regulator@40 { + compatible =3D "silergy,syr827"; + reg =3D <0x40>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1390000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + }; }; =20 &i2c1 { --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50F971442ED for ; Tue, 23 Jul 2024 19:56:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764608; cv=none; b=kn77nOhJ4V3ZVkGu5pEEgVvjl2gVpfvW6LVTVWZemDi9csoVJwufC+srvMQ1aFenJe91Cu/pb11XWMHqU2vPyoAXcUQsfD7pJgCSf4loF6Cz4S8m8IkhbYhMoQ+q/TfqSbGtvMc4cIpHycUIwh3Ne7smw7BLNoFN2nOoL0FS46U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764608; c=relaxed/simple; bh=bltEZ6DDbdVLwyHMCVehD+bjTwDY3kgHx2B26EfmWOo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=e547EmabeTPreYHT1POsHe1hzPDTbm7om3+x29TqmdJA2wwLXVSDW0KV3jQmWpZF9FyfoyrajOg8HBbRBLHU7PB2CIaHG9fi5xOKeBp7JlTk1Lll112AWjGeEfh6xCDhxzgP3oMZQXKwU7yRKd/06rfVsgW7+otFuhMI6iW7uiM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbv-0005iD-9Y; Tue, 23 Jul 2024 21:55:47 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 12/14] arm64: dts: rockchip: add missing pmic information on Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:36 +0200 Message-Id: <20240723195538.1133436-13-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Fill in the missing pieces for RK809 pmic used on the TS433. The regulator setup comes from the vendor-devicetree, so without proper schematics its accuracy is somewhat unclear, but it looks really similar to all the other rk3568 boards, so follows the reference design it seems. The one caveat is related to vcc3v3_sd. This regulator needs to stay on. When turned off because of no users, access to both PCIe controllers will stall. Maybe this rail does supply the 100MHz refclk generation or so. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 227 +++++++++++++++++- 1 file changed, 226 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 4bccefc0537ed..b807da6e85015 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -102,6 +102,16 @@ vcc3v3_pcie: regulator-vcc3v3-pcie { vin-supply =3D <&dc_12v>; }; =20 + vcc3v3_sys: regulator-vcc3v3-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&dc_12v>; + }; + vcc5v0_host: regulator-vcc5v0-host { compatible =3D "regulator-fixed"; enable-active-high; @@ -207,7 +217,216 @@ pmic@20 { compatible =3D "rockchip,rk809"; reg =3D <0x20>; interrupt-parent =3D <&gpio0>; - interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; + interrupts =3D ; + #clock-cells =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>; + system-power-controller; + vcc1-supply =3D <&vcc3v3_sys>; + vcc2-supply =3D <&vcc3v3_sys>; + vcc3-supply =3D <&vcc3v3_sys>; + vcc4-supply =3D <&vcc3v3_sys>; + vcc5-supply =3D <&vcc3v3_sys>; + vcc6-supply =3D <&vcc3v3_sys>; + vcc7-supply =3D <&vcc3v3_sys>; + vcc8-supply =3D <&vcc3v3_sys>; + vcc9-supply =3D <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name =3D "vdd_gpu"; + regulator-always-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name =3D "vdd_npu"; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name =3D "vdda0v9_image"; + regulator-always-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name =3D "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name =3D "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name =3D "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name =3D "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name =3D "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name =3D "vcca1v8_image"; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name =3D "vcc3v3_sd"; + /* + * turning this off, breaks access to both + * PCIe controllers, refclk generator perhaps + */ + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; }; =20 vdd_cpu: regulator@40 { @@ -290,6 +509,12 @@ hdd4_led_pin: hdd4_led-pin { }; }; =20 + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins =3D <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF981143C65 for ; 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dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbv-0005iD-Iq; Tue, 23 Jul 2024 21:55:47 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 13/14] arm64: dts: rockchip: enable gpu on Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:37 +0200 Message-Id: <20240723195538.1133436-14-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The TS433 doesn't provide display output, but the gpu nevertheless can be used for compute tasks for example. So there is no reason not to enable it. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index b807da6e85015..9a0cb69c3cfa0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -210,6 +210,11 @@ &gmac0_rgmii_clk status =3D "okay"; }; =20 +&gpu { + mali-supply =3D <&vdd_gpu>; + status =3D "okay"; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.39.2 From nobody Tue Dec 16 17:56:23 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 363C1143872 for ; Tue, 23 Jul 2024 19:56:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764596; cv=none; b=YQm36r+8pjotxI52DXcz1Uyv0Y93Uce09nIpUGd4Ymwg52Vgm4tVIKgKRLbb6eGSthtkP7lTVVF2bhmbTtowEQT/yUKTywr//7x8TVTtopjfsSOeX/W62DGuC2KWIuVSMSVKDN1VN7Xo7Q0YI9Amf3BRGHF9c5w/j0CwlrjX6Mk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721764596; c=relaxed/simple; bh=8WDJzS9rh2ltn4bUgPc1mUlJDlkJyS0u0mV1zeMHqRU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=Ww9Z6IWKIvtpLnKyMxyfcd4YXm6wYrF9PEmI93s1F/MjA5qYI2KwDpQzmhGfombtrfh0AJAu7ChYoJdo3WrkguudA5nxv5+VHDsSb9k/el6Z6iJP0AB/DAOQgS/TTd2AUtvH3hjk2OjiOc0LBLj8WwoSBfQ1q7ZJbJS2rTasxvw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sWLbv-0005iD-S2; Tue, 23 Jul 2024 21:55:47 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 14/14] arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433 Date: Tue, 23 Jul 2024 21:55:38 +0200 Message-Id: <20240723195538.1133436-15-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240723195538.1133436-1-heiko@sntech.de> References: <20240723195538.1133436-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Add the two supplies for the pmu-io-domains that are defined in the vendor devicetree for the TS433. Tested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 9a0cb69c3cfa0..6c4269b3d9597 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -531,6 +531,11 @@ vcc5v0_otg_en: vcc5v0-otg-en { }; }; =20 +&pmu_io_domains { + vccio4-supply =3D <&vcc_1v8>; + vccio6-supply =3D <&vcc_1v8>; +}; + &sata1 { status =3D "okay"; }; --=20 2.39.2