From nobody Wed Dec 17 01:09:06 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87C53224FD; Mon, 22 Jul 2024 21:07:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721682425; cv=none; b=fx1uee7KiXrRUa0kS8/a9PCKuBBpmarfPTX/whfwQ/dXdzT1yfGOrDpMKiNbutHd/jC191GQZMvuKzWcFp3jSzsgc9QVsI+p0kvl0q5m714b77jrfMEY2LzjyzIoLCpXqiTdktXcnkz+tDyIxzMnF7xFCDwuYnwZ4gwrqA/3mjA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721682425; c=relaxed/simple; bh=jzjRmAv0FQC+DoGcPDLeFGLEdXtORRGXZvIMK7w3hGY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=te5HH3/PfqUV/9YgxyG3NF9VyKFEVBf3MeAd4KflCME5tZmobS0EMkgR7klyZ4i2P98aCZD6phn8Y+UBlz7cJ6ualKGLT6m7KrkGm1OqPxxl9Merdqmih/Khl9gVZMqzyTz4APTyGnCmyDFMpmaRTXpdEMBdHSnAhqjnje8dK+U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=fuJ38xeS; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="fuJ38xeS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721682422; x=1753218422; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jzjRmAv0FQC+DoGcPDLeFGLEdXtORRGXZvIMK7w3hGY=; b=fuJ38xeSP1zif86VFSe3q9/uebPEfr5ywTi6v7I6yXl8aCylGlYjLd7x q8mppA4B0wp/s4ARJzGSoVDxWx6em2xAgB+9CHhsgEhqRlg5jREOP+rze q6hdEl5MH4abc3GooIFskogE39tA6CqI5ux9Qevm/Q2c+++xzQfcWUJkB JDGbFAKMVP3v1QxpDulQnxV8Dtqb/9IiHl6p20sL6e1WKlVA/dQf0pDVr ytHO8u1sDQprYJvJH/3Cz2y1yKNEv8tASYqoTnY48VfFVhRdPLAfll0Oa 1oImnmYdCkAAtvpIxOxusCScCiNisy5t93y5W+VvrnCh6qjZQC1S4CO60 A==; X-CSE-ConnectionGUID: srxX5Ud4Rg2W0oAm1/GS8A== X-CSE-MsgGUID: mKAL4dQLQbqM+A9kDgkegQ== X-IronPort-AV: E=McAfee;i="6700,10204,11141"; a="30428294" X-IronPort-AV: E=Sophos;i="6.09,229,1716274800"; d="scan'208";a="30428294" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 14:07:00 -0700 X-CSE-ConnectionGUID: +sqI0r3xT7aWlDU75JtWiQ== X-CSE-MsgGUID: 3F7AwXZ2T6eMmuT0vcHHCg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,229,1716274800"; d="scan'208";a="51653273" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 14:07:00 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org, linux-perf-users@vger.kernel.org Cc: Tvrtko Ursulin , dri-devel@lists.freedesktop.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, Lucas De Marchi Subject: [PATCH 1/7] perf/core: Add pmu get/put Date: Mon, 22 Jul 2024 14:06:42 -0700 Message-ID: <20240722210648.80892-2-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722210648.80892-1-lucas.demarchi@intel.com> References: <20240722210648.80892-1-lucas.demarchi@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If a pmu is unregistered while there's an active event, perf will still access the pmu via event->pmu, even after the event is destroyed. This makes it difficult for drivers like i915 that take a reference on the device when the event is created and put it when it's destroyed. Currently the following use-after-free happens just after destroying the event: BUG: KASAN: use-after-free in exclusive_event_destroy+0xd8/0xf0 Read of size 4 at addr ffff88816e2bb63c by task perf/7748 Whenever and event is created, get a pmu reference to use in event->pmu and just before calling module_put(), drop the reference.. Signed-off-by: Lucas De Marchi --- include/linux/perf_event.h | 3 +++ kernel/events/core.c | 32 ++++++++++++++++++++++++++++---- 2 files changed, 31 insertions(+), 4 deletions(-) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index a5304ae8c654..7048a505e93c 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -540,6 +540,9 @@ struct pmu { * Check period value for PERF_EVENT_IOC_PERIOD ioctl. */ int (*check_period) (struct perf_event *event, u64 value); /* optional */ + + struct pmu *(*get) (struct pmu *pmu); /* optional: get a reference */ + void (*put) (struct pmu *pmu); /* optional: put a reference */ }; =20 enum perf_addr_filter_action_t { diff --git a/kernel/events/core.c b/kernel/events/core.c index 1b6f5dc7ed32..cc7541b644b0 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -5208,6 +5208,8 @@ static void perf_addr_filters_splice(struct perf_even= t *event, =20 static void _free_event(struct perf_event *event) { + struct module *module; + irq_work_sync(&event->pending_irq); =20 unaccount_event(event); @@ -5259,7 +5261,13 @@ static void _free_event(struct perf_event *event) put_ctx(event->ctx); =20 exclusive_event_destroy(event); - module_put(event->pmu->module); + + module =3D event->pmu->module; + event->pmu->put(event->pmu); + /* can't touch pmu anymore */ + event->pmu =3D NULL; + + module_put(module); =20 call_rcu(&event->rcu_head, free_event_rcu); } @@ -11331,6 +11339,11 @@ static int perf_pmu_nop_int(struct pmu *pmu) return 0; } =20 +static struct pmu *perf_pmu_nop_pmu(struct pmu *pmu) +{ + return pmu; +} + static int perf_event_nop_int(struct perf_event *event, u64 value) { return 0; @@ -11617,6 +11630,12 @@ int perf_pmu_register(struct pmu *pmu, const char = *name, int type) if (!pmu->event_idx) pmu->event_idx =3D perf_event_idx_default; =20 + if (!pmu->get) + pmu->get =3D perf_pmu_nop_pmu; + + if (!pmu->put) + pmu->put =3D perf_pmu_nop_void; + list_add_rcu(&pmu->entry, &pmus); atomic_set(&pmu->exclusive_cnt, 0); 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22 Jul 2024 14:07:01 -0700 X-CSE-ConnectionGUID: DkVx8NGRRuOCzUS/0sNtzQ== X-CSE-MsgGUID: gWSi5Rj6T3m97o+tGcOgvA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,229,1716274800"; d="scan'208";a="51653288" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 14:07:00 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org, linux-perf-users@vger.kernel.org Cc: Tvrtko Ursulin , dri-devel@lists.freedesktop.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, Lucas De Marchi , stable@vger.kernel.org Subject: [PATCH 2/7] drm/i915/pmu: Fix crash due to use-after-free Date: Mon, 22 Jul 2024 14:06:43 -0700 Message-ID: <20240722210648.80892-3-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722210648.80892-1-lucas.demarchi@intel.com> References: <20240722210648.80892-1-lucas.demarchi@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" When an i915 PMU counter is enabled and the driver is then unbound, the PMU will be unregistered via perf_pmu_unregister(), however the event will still be alive. i915 currently tries to deal with this situation by: a) Marking the pmu as "closed" and shortcut the calls from perf b) Taking a reference from i915, that is put back when the event is destroyed. c) Setting event_init to NULL to avoid any further event (a) is ugly, but may be left as is since it protects not trying to access the HW that is now gone. Unless a pmu driver can call perf_pmu_unregister() and not receive any more calls, it's a necessary ugliness. (b) doesn't really work: when the event is destroyed and the i915 ref is put it may free the i915 object, that contains the pmu, not only the event. After event->destroy() callback, perf still expects the pmu object to be alive. Instead of pigging back on the event->destroy() to take and put the device reference, implement the new get()/put() on the pmu object for that purpose. (c) is not entirely correct as from the perf POV it's not an optional call: perf would just dereference the NULL pointer. However this also protects other entrypoints in i915_pmu. A new event creation from perf after the pmu has been unregistered should not be possible anyway: perf_init_event() bails out when not finding the pmu. This may be cleaned up later. Cc: # 5.11+ Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_pmu.c | 34 +++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pm= u.c index 21eb0c5b320d..cb5f6471ec6e 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -514,15 +514,6 @@ static enum hrtimer_restart i915_sample(struct hrtimer= *hrtimer) return HRTIMER_RESTART; } =20 -static void i915_pmu_event_destroy(struct perf_event *event) -{ - struct i915_pmu *pmu =3D event_to_pmu(event); - struct drm_i915_private *i915 =3D pmu_to_i915(pmu); - - drm_WARN_ON(&i915->drm, event->parent); - - drm_dev_put(&i915->drm); -} =20 static int engine_event_status(struct intel_engine_cs *engine, @@ -628,11 +619,6 @@ static int i915_pmu_event_init(struct perf_event *even= t) if (ret) return ret; =20 - if (!event->parent) { - drm_dev_get(&i915->drm); - event->destroy =3D i915_pmu_event_destroy; - } - return 0; } =20 @@ -872,6 +858,24 @@ static int i915_pmu_event_event_idx(struct perf_event = *event) return 0; } =20 +static struct pmu *i915_pmu_get(struct pmu *base) +{ + struct i915_pmu *pmu =3D container_of(base, struct i915_pmu, base); + struct drm_i915_private *i915 =3D pmu_to_i915(pmu); + + drm_dev_get(&i915->drm); + + return base; +} + +static void i915_pmu_put(struct pmu *base) +{ + struct i915_pmu *pmu =3D container_of(base, struct i915_pmu, base); + struct drm_i915_private *i915 =3D pmu_to_i915(pmu); + + drm_dev_put(&i915->drm); +} + struct i915_str_attribute { struct device_attribute attr; const char *str; @@ -1299,6 +1303,8 @@ void i915_pmu_register(struct drm_i915_private *i915) pmu->base.stop =3D i915_pmu_event_stop; pmu->base.read =3D i915_pmu_event_read; pmu->base.event_idx =3D i915_pmu_event_event_idx; + pmu->base.get =3D i915_pmu_get; + pmu->base.put =3D i915_pmu_put; =20 ret =3D perf_pmu_register(&pmu->base, pmu->name, -1); if (ret) --=20 2.43.0 From nobody Wed Dec 17 01:09:06 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C51B383B1; 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charset="utf-8" i915 pointer is not needed in this function and all the others simply calculate the i915_pmu container based on the event->pmu. Follow the same logic as in other functions. Signed-off-by: Lucas De Marchi Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_pmu.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pm= u.c index cb5f6471ec6e..3a8bd11b87e7 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -820,15 +820,14 @@ static void i915_pmu_event_start(struct perf_event *e= vent, int flags) =20 static void i915_pmu_event_stop(struct perf_event *event, int flags) { - struct drm_i915_private *i915 =3D - container_of(event->pmu, typeof(*i915), pmu.base); - struct i915_pmu *pmu =3D &i915->pmu; + struct i915_pmu *pmu =3D event_to_pmu(event); =20 if (pmu->closed) goto out; =20 if (flags & PERF_EF_UPDATE) i915_pmu_event_read(event); + i915_pmu_disable(event); =20 out: --=20 2.43.0 From nobody Wed Dec 17 01:09:06 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46C103CF74; Mon, 22 Jul 2024 21:07:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721682426; cv=none; b=LGxxq2z96fj5fSBLsoGD/w22o+9BMoAHd21MD2GgkIqZeuuB4FYG/V1dE8srEPsRFLFZyqHOGn414Lj/DCamFB1PuZTOs9mwiPpmV2mcqNREdy+BBbq2iEO/eHCRLAURflOTmXWFCxoqeTIMO5yYsUP+tie6ydCr7CEg5Xrwmx8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721682426; c=relaxed/simple; bh=nCWirGS4RNaVcvVR02+jAYuMtNUcmS9KoGdmjQU7cuo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XI6PWDx9/gbWoJUKqX+kpGnWhDuPNTbLsLV1MWuZB0iZ+jyDkQ9OlWlCKMiOXtzdL0mRoKghdcaeI//4e3JaaT79hWptpAs03d+fa6VTX4Yk/Fv5ZklKDCRhj0bP8dQQjgZ1NopKlAw817unlC4z0rjEnhlXBFp0gi1TQw4SBiM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JE/8Y2Ta; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JE/8Y2Ta" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721682425; x=1753218425; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nCWirGS4RNaVcvVR02+jAYuMtNUcmS9KoGdmjQU7cuo=; b=JE/8Y2TaX55RbQr67XWHERmYv3aC9GhitZGGr1n6IsDTIzgR7WUZx1ij TswTYr+8R8zJQ8+yW8VtFLXySOgqEyUyUpSugPaSc3+8UqX5WghkUiEEX fW0UYGbW1ocANdYhj/bh3UtqJv9E43V/SwAek7/xDOz09kSAFbs43eDLy dQQJfeMqAoPqWLj3xSF+lZDgdIOqfe6eYw8ymm6ueehmyx+d1B7ayBO9t zhxaMcPZJ7Zi1I3WFeNRX+xl4hysZyKVn4kOKzT08+eX9XqKXDg1gqUbg LAI9+CYZiSndB6CR/B15Ms2bxuvbepEC39uKdSBrBDUAh1arSJjsPUxQn w==; X-CSE-ConnectionGUID: DlVdG2wjSjGeEk6Wi5mdMw== X-CSE-MsgGUID: 738kvOXWQPqUcm7Zkn+ryw== X-IronPort-AV: E=McAfee;i="6700,10204,11141"; a="30428307" X-IronPort-AV: E=Sophos;i="6.09,229,1716274800"; d="scan'208";a="30428307" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 14:07:02 -0700 X-CSE-ConnectionGUID: krU/uHwVR3O9O5JSh/ylmA== X-CSE-MsgGUID: DMCosN1SRa24cuA9dxzvYQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,229,1716274800"; d="scan'208";a="51653296" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 14:07:01 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org, linux-perf-users@vger.kernel.org Cc: Tvrtko Ursulin , dri-devel@lists.freedesktop.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, Lucas De Marchi Subject: [PATCH 4/7] drm/i915/pmu: Drop is_igp() Date: Mon, 22 Jul 2024 14:06:45 -0700 Message-ID: <20240722210648.80892-5-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722210648.80892-1-lucas.demarchi@intel.com> References: <20240722210648.80892-1-lucas.demarchi@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There's no reason to hardcode checking for integrated graphics on a specific pci slot. That information is already available per platform an can be checked with IS_DGFX(). Signed-off-by: Lucas De Marchi Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_pmu.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pm= u.c index 3a8bd11b87e7..b5d14dd318e4 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -1235,17 +1235,6 @@ static void i915_pmu_unregister_cpuhp_state(struct i= 915_pmu *pmu) cpuhp_state_remove_instance(cpuhp_slot, &pmu->cpuhp.node); } =20 -static bool is_igp(struct drm_i915_private *i915) -{ - struct pci_dev *pdev =3D to_pci_dev(i915->drm.dev); - - /* IGP is 0000:00:02.0 */ - return pci_domain_nr(pdev->bus) =3D=3D 0 && - pdev->bus->number =3D=3D 0 && - PCI_SLOT(pdev->devfn) =3D=3D 2 && - PCI_FUNC(pdev->devfn) =3D=3D 0; -} - void i915_pmu_register(struct drm_i915_private *i915) { struct i915_pmu *pmu =3D &i915->pmu; @@ -1269,7 +1258,7 @@ void i915_pmu_register(struct drm_i915_private *i915) pmu->cpuhp.cpu =3D -1; init_rc6(pmu); =20 - if (!is_igp(i915)) { + if (IS_DGFX(i915)) { pmu->name =3D kasprintf(GFP_KERNEL, "i915_%s", dev_name(i915->drm.dev)); @@ -1323,7 +1312,7 @@ void i915_pmu_register(struct drm_i915_private *i915) pmu->base.event_init =3D NULL; free_event_attributes(pmu); err_name: - if (!is_igp(i915)) + if (IS_DGFX(i915)) kfree(pmu->name); err: drm_notice(&i915->drm, "Failed to register PMU!\n"); @@ -1351,7 +1340,7 @@ void i915_pmu_unregister(struct drm_i915_private *i91= 5) perf_pmu_unregister(&pmu->base); pmu->base.event_init =3D NULL; kfree(pmu->base.attr_groups); - if (!is_igp(i915)) + if (IS_DGFX(i915)) kfree(pmu->name); free_event_attributes(pmu); } --=20 2.43.0 From nobody Wed Dec 17 01:09:06 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77C9F3EA69; Mon, 22 Jul 2024 21:07:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="30428315" X-IronPort-AV: E=Sophos;i="6.09,229,1716274800"; d="scan'208";a="30428315" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 14:07:02 -0700 X-CSE-ConnectionGUID: oco+0Mr7Qq21jwMdRCTvSg== X-CSE-MsgGUID: YFa/qX3XQcKBR01IvlORGg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,229,1716274800"; d="scan'208";a="51653301" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 14:07:02 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org, linux-perf-users@vger.kernel.org Cc: Tvrtko Ursulin , dri-devel@lists.freedesktop.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, Lucas De Marchi Subject: [PATCH 5/7] drm/i915/pmu: Let resource survive unbind Date: Mon, 22 Jul 2024 14:06:46 -0700 Message-ID: <20240722210648.80892-6-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722210648.80892-1-lucas.demarchi@intel.com> References: <20240722210648.80892-1-lucas.demarchi@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" There's no need to free the resources during unbind. Since perf events may still access them due to open events, it's safer to free them when dropping the last i915 reference. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_pmu.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pm= u.c index b5d14dd318e4..8708f905f4f4 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -5,6 +5,7 @@ */ =20 #include +#include =20 #include "gt/intel_engine.h" #include "gt/intel_engine_pm.h" @@ -1152,6 +1153,17 @@ static void free_event_attributes(struct i915_pmu *p= mu) pmu->pmu_attr =3D NULL; } =20 +static void free_pmu(struct drm_device *dev, void *res) +{ + struct i915_pmu *pmu =3D res; + struct drm_i915_private *i915 =3D pmu_to_i915(pmu); + + free_event_attributes(pmu); + kfree(pmu->base.attr_groups); + if (IS_DGFX(i915)) + kfree(pmu->name); +} + static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node) { struct i915_pmu *pmu =3D hlist_entry_safe(node, typeof(*pmu), cpuhp.node); @@ -1302,6 +1314,9 @@ void i915_pmu_register(struct drm_i915_private *i915) if (ret) goto err_unreg; =20 + if (drmm_add_action_or_reset(&i915->drm, free_pmu, pmu)) + goto err_unreg; + return; =20 err_unreg: @@ -1336,11 +1351,7 @@ void i915_pmu_unregister(struct drm_i915_private *i9= 15) hrtimer_cancel(&pmu->timer); =20 i915_pmu_unregister_cpuhp_state(pmu); - perf_pmu_unregister(&pmu->base); + pmu->base.event_init =3D NULL; - kfree(pmu->base.attr_groups); - if (IS_DGFX(i915)) - kfree(pmu->name); - free_event_attributes(pmu); } --=20 2.43.0 From nobody Wed Dec 17 01:09:06 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77CD83F9C5; Mon, 22 Jul 2024 21:07:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721682427; cv=none; b=TMFyzXGhq/rVr/VFCEO7S6TIZg/RepGY+ejVIwHQEfMoWMULyymOMyjFGHJ75MxJYVWJHEV9Oj4vblLvRg3pzQ57O+ptIUzKBf7EHcSW83iOHLirX3S9u42sdxJYnp3E4TZPpusabKk/eKdUefYL/HtzZbCplf6BI985KSzPz84= ARC-Message-Signature: i=1; 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d="scan'208";a="51653307" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2024 14:07:02 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org, linux-perf-users@vger.kernel.org Cc: Tvrtko Ursulin , dri-devel@lists.freedesktop.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, Lucas De Marchi Subject: [PATCH 6/7] drm/i915/pmu: Lazy unregister Date: Mon, 22 Jul 2024 14:06:47 -0700 Message-ID: <20240722210648.80892-7-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722210648.80892-1-lucas.demarchi@intel.com> References: <20240722210648.80892-1-lucas.demarchi@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Instead of calling perf_pmu_unregister() when unbinding, defer that to the destruction of i915 object. Since perf itself holds a reference in the event, this only happens when all events are gone, which guarantees i915 is not unregistering the pmu with live events. Previously, running the following sequence would crash the system after ~2 tries: 1) bind device to i915 2) wait events to show up on sysfs 3) start perf stat -I 1000 -e i915/rcs0-busy/ 4) unbind driver 5) kill perf Most of the time this crashes in perf_pmu_disable() while accessing the percpu pmu_disable_count. This happens because perf_pmu_unregister() destroys it with free_percpu(pmu->pmu_disable_count). With a lazy unbind, the pmu is only unregistered after (5) as opposed to after (4). The downside is that if a new bind operation is attempted for the same device/driver without killing the perf process, i915 will fail to register the pmu (but still load successfully). This seems better than completely crashing the system. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_pmu.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pm= u.c index 8708f905f4f4..df53a8fe53ec 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -1158,18 +1158,21 @@ static void free_pmu(struct drm_device *dev, void *= res) struct i915_pmu *pmu =3D res; struct drm_i915_private *i915 =3D pmu_to_i915(pmu); =20 + perf_pmu_unregister(&pmu->base); free_event_attributes(pmu); kfree(pmu->base.attr_groups); if (IS_DGFX(i915)) kfree(pmu->name); + + /* + * Make sure all currently running (but shortcut on pmu->closed) are + * gone before proceeding with free'ing the pmu object embedded in i915. + */ + synchronize_rcu(); } =20 static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node) { - struct i915_pmu *pmu =3D hlist_entry_safe(node, typeof(*pmu), cpuhp.node); - - GEM_BUG_ON(!pmu->base.event_init); - /* Select the first online CPU as a designated reader. */ if (cpumask_empty(&i915_pmu_cpumask)) cpumask_set_cpu(cpu, &i915_pmu_cpumask); @@ -1182,8 +1185,6 @@ static int i915_pmu_cpu_offline(unsigned int cpu, str= uct hlist_node *node) struct i915_pmu *pmu =3D hlist_entry_safe(node, typeof(*pmu), cpuhp.node); unsigned int target =3D i915_pmu_target_cpu; =20 - GEM_BUG_ON(!pmu->base.event_init); - /* * Unregistering an instance generates a CPU offline event which we must * ignore to avoid incorrectly modifying the shared i915_pmu_cpumask. @@ -1337,21 +1338,14 @@ void i915_pmu_unregister(struct drm_i915_private *i= 915) { struct i915_pmu *pmu =3D &i915->pmu; =20 - if (!pmu->base.event_init) - return; - /* - * "Disconnect" the PMU callbacks - since all are atomic synchronize_rcu - * ensures all currently executing ones will have exited before we - * proceed with unregistration. + * "Disconnect" the PMU callbacks - unregistering the pmu will be done + * later when all currently open events are gone */ pmu->closed =3D true; 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22 Jul 2024 14:07:03 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org, linux-perf-users@vger.kernel.org Cc: Tvrtko Ursulin , dri-devel@lists.freedesktop.org, Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org, Lucas De Marchi Subject: [PATCH 7/7] drm/i915/pmu: Do not set event_init to NULL Date: Mon, 22 Jul 2024 14:06:48 -0700 Message-ID: <20240722210648.80892-8-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240722210648.80892-1-lucas.demarchi@intel.com> References: <20240722210648.80892-1-lucas.demarchi@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" event_init is not an optional function pointer from perf events. Now that pmu unregister happens only when freeing i915, setting it to NULL only protects other functions in i915. Replace that by checking pmu->closed. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_pmu.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pm= u.c index df53a8fe53ec..c5738035bc2f 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -303,7 +303,7 @@ void i915_pmu_gt_parked(struct intel_gt *gt) { struct i915_pmu *pmu =3D >->i915->pmu; =20 - if (!pmu->base.event_init) + if (pmu->closed) return; =20 spin_lock_irq(&pmu->lock); @@ -325,7 +325,7 @@ void i915_pmu_gt_unparked(struct intel_gt *gt) { struct i915_pmu *pmu =3D >->i915->pmu; =20 - if (!pmu->base.event_init) + if (pmu->closed) return; =20 spin_lock_irq(&pmu->lock); @@ -1325,12 +1325,12 @@ void i915_pmu_register(struct drm_i915_private *i91= 5) err_groups: kfree(pmu->base.attr_groups); err_attr: - pmu->base.event_init =3D NULL; free_event_attributes(pmu); err_name: if (IS_DGFX(i915)) kfree(pmu->name); err: + pmu->closed =3D true; drm_notice(&i915->drm, "Failed to register PMU!\n"); } =20 @@ -1346,6 +1346,4 @@ void i915_pmu_unregister(struct drm_i915_private *i91= 5) =20 hrtimer_cancel(&pmu->timer); i915_pmu_unregister_cpuhp_state(pmu); - - pmu->base.event_init =3D NULL; } --=20 2.43.0