From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36C1016A93F for ; Sun, 21 Jul 2024 17:37:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583458; cv=none; b=g2YR3IjFUMUyYZJWy9sFStIWs/xdl0ZxEFSXjULVtIq6/VISZ7e01lGOv0vZVCgM+DjF6wdw49QSMlhl6W0kepm64uOUL5hwbMIJRdo1w4yt07F83AO3bplpdG9B0KWjALh1uysZdxAsl9X+7j9oJYHjmMsdN2saTYOQh0uxZRw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583458; c=relaxed/simple; bh=hMSyXDkQmSWdq22l5z289yz2Q5mGIwsWjsSxxg3aZoQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=XNpGGoP7QsCV3un5lpOMEgFM7HTeFZQ49dqV1EHxN6d/s3bMCrF5c7+2/BqVgtXp10t92bQZN/SU6SUd7t+/CW2gltdEKWAuSk4PriEvoI+go7tTowZESgBbYcW1+z1Lp/K5LCXCP/1fRB6pugsaucSWVAMfupNxoBgvHxUhM+w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaUz-00075D-HE; Sun, 21 Jul 2024 19:37:29 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/14] arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:10 +0200 Message-Id: <20240721173723.919961-2-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the vcc3v3-supply regulator and its link to the pcie controllers. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 6a998166003c9..889838b4079ae 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -12,6 +12,25 @@ / { model =3D "Qnap TS-433-4G NAS System 4-Bay"; compatible =3D "qnap,ts433", "rockchip,rk3568"; + + dc_12v: regulator-dc-12v { + compatible =3D "regulator-fixed"; + regulator-name =3D "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_pcie"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpios =3D <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&dc_12v>; + }; }; =20 &gmac0 { @@ -65,6 +84,7 @@ &pcie30phy { &pcie3x1 { /* The downstream dts has: rockchip,bifurcation, XXX: find out what this = is about */ reset-gpios =3D <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_pcie>; status =3D "okay"; }; =20 --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70AFD1684AD for ; Sun, 21 Jul 2024 17:37:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583457; cv=none; b=Hf95XgpUaK5T3vBNO7jvTOp7AkGdYVSmETrkQCj8w2np2/QaIHzPn70g181UUfV+hCOncRAozdCS7i2eAnrywJwjNXzeSBi+0Ao/96XulMVklAYkAGTb6S03TXLkwHpL8+roCXj6iCFKQwFNNi6bKLEov4Jp+7DBYVNBJV3aDlU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583457; c=relaxed/simple; bh=/Pr1VvO4TiEqywd+xj5UOg5mdJyTkmGos5iYdgrijwY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=nyBP3G5O5rRJFcaRB7Ew23AcHQg2T4UpCDzWCreUTTTm/5T6s4HB13rVgiG7X6tZl+fhQ8PH4eAD2DOyqjUmqfuqY19byb11K83DNM6iIpReYZKK29Gs0Tq8pH+yzPfGut15ZD7C5WgwQ3bFz2+Px4XxSZLvlyU9mKYUhJml3OE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaUz-00075D-Qj; Sun, 21 Jul 2024 19:37:29 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/14] arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:11 +0200 Message-Id: <20240721173723.919961-3-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TS433 uses both pcie controllers for sata and the 2nd network interface. Set the needed data-lanes in the pcie3 phy and enable the second pcie controller, as well as remove the bifurcation comment. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 889838b4079ae..0636a08986572 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -78,16 +78,23 @@ rgmii_phy0: ethernet-phy@0 { }; =20 &pcie30phy { + data-lanes =3D <1 2>; status =3D "okay"; }; =20 &pcie3x1 { - /* The downstream dts has: rockchip,bifurcation, XXX: find out what this = is about */ reset-gpios =3D <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; vpcie3v3-supply =3D <&vcc3v3_pcie>; status =3D "okay"; }; =20 +&pcie3x2 { + num-lanes =3D <1>; + reset-gpios =3D <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_pcie>; + status =3D "okay"; +}; + &sdhci { bus-width =3D <8>; max-frequency =3D <200000000>; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC6BE168498 for ; Sun, 21 Jul 2024 17:37:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583457; cv=none; b=CRIFaOvZPl0uFipzQyPO+ZoLIS1N0gEWFItyjH7RXTe1Lk/gi3q5w0zQtnsWTDp8AsCu7u6HbQW7eRoCBZkU8cUCdBBc8nbXQEC2b7eReA4oeDwyIUUleJa9pcmzlJcFMPe2oYv1FC4xezy1nrdcKNA2eDmHK9N+c53gsIUQ9gY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583457; c=relaxed/simple; bh=wkINWhHBxJoks9GEekUEFai0to46rsNWQPJ4fRqirYA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=czWjLO1tJcLcU5JasG5btirhs8ERN1KBry/QW9H9OBHnjrKzzQp13ShpuSYESgnM7tI3vyG+/AawVQbnJIHYh2vVbHf/azZV97zIjxe/j72kEv0lsHlN42MNl2Aip1w1fRgSSh5wF5+RqhV0rNCbAcmExLHXaAMC9RQOBL9NjJ4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV0-00075D-3s; Sun, 21 Jul 2024 19:37:30 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/14] arm64: dts: rockchip: enable uart0 on Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:12 +0200 Message-Id: <20240721173723.919961-4-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Uart0 is connected to an MCU on the board that handles system control like the fan-speed. So far no driver for it is available though. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 0636a08986572..f3ce3cc4598db 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -102,6 +102,10 @@ &sdhci { status =3D "okay"; }; =20 +&uart0 { + status =3D "okay"; +}; + /* * Pins available on CN3 connector at TTL voltage level (3V3). * ,_ _. --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FAC116A940 for ; Sun, 21 Jul 2024 17:37:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583459; cv=none; b=bup4ob8d49IEUy2POquBGYEg92ThFKkxneGGOGZbnUsPnnbMaMMbY+A9fNTE8I/Y2qLz33h8tOYeLV+tRiOwSGWkjs3LVYaCR9fituT2+RJm0Z5gcrbXP9Hf8OVqllJZu8UpUSgDquxoc2WPFDYq+A5wApdaX8m+wA4NlwIiVdY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583459; c=relaxed/simple; bh=kkLbfVuLYs5yXNPqZVZgl4VzVvH4mKaZXdACFwCo9D0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=mYQ33mmAd93ZerWeBSJoJZYchFIQpIAX46ZKAOfmBOjvph0IxBWryho1aXS3Hn8j5suW4W4AcGkjC4Sj1ksYFlBlZe4PldUmcKCemR4X/Gl8SxwRwZdGQhiJp4wEyehABwPjEVr+0OMnf71yQmiaeDuj74EghJ7H9a2ziJHHP94= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV0-00075D-DB; Sun, 21 Jul 2024 19:37:30 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/14] arm64: dts: rockchip: enable usb ports on Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:13 +0200 Message-Id: <20240721173723.919961-5-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable usb controllers and phys and add regulator infrastructure for the usb ports on the TS433. Of course there are no schematics available for the device, so the regulator information comes from the vendor-devicetree with unknown accuracy. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index f3ce3cc4598db..3fa1670e596cb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -31,6 +31,49 @@ vcc3v3_pcie: regulator-vcc3v3-pcie { gpios =3D <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; vin-supply =3D <&dc_12v>; }; + + vcc5v0_host: regulator-vcc5v0-host { + compatible =3D "regulator-fixed"; + enable-active-high; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_host_en>; + gpio =3D <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + regulator-name =3D "vcc5v0_host"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_usb>; + }; + + vcc5v0_otg: regulator-vcc5v0-otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_otg_en>; + regulator-name =3D "vcc5v0_otg"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_usb>; + }; + + vcc5v0_usb: regulator-vcc5v0-usb { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; +}; + +/* connected to usb_host0_xhci */ +&combphy0 { + status =3D "okay"; }; =20 &gmac0 { @@ -95,6 +138,18 @@ &pcie3x2 { status =3D "okay"; }; =20 +&pinctrl { + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + &sdhci { bus-width =3D <8>; max-frequency =3D <200000000>; @@ -115,3 +170,53 @@ &uart0 { &uart2 { status =3D "okay"; }; + +&usb2phy0 { + status =3D "okay"; +}; + +/* connected to usb_host0_xhci */ +&usb2phy0_otg { + phy-supply =3D <&vcc5v0_otg>; + status =3D "okay"; +}; + +&usb2phy1 { + status =3D "okay"; +}; + +/* connected to usb_host1_ehci/ohci */ +&usb2phy1_host { + phy-supply =3D <&vcc5v0_host>; + status =3D "okay"; +}; + +/* connected to usb_host0_ehci/ohci */ +&usb2phy1_otg { + phy-supply =3D <&vcc5v0_host>; + status =3D "okay"; +}; + +/* right port backside */ +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +/* front port */ +&usb_host0_xhci { + dr_mode =3D "host"; + status =3D "okay"; +}; + +/* left port backside */ +&usb_host1_ehci { + status =3D "okay"; +}; + +&usb_host1_ohci { + status =3D "okay"; +}; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A8D6166314 for ; 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dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV0-00075D-Mh; Sun, 21 Jul 2024 19:37:30 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/14] arm64: dts: rockchip: add stdout path on Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:14 +0200 Message-Id: <20240721173723.919961-6-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As most Rockchip boards do, the TS433 also uses uart2 for its serial output. Set the correct chosen entry for it. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 3fa1670e596cb..4fbbdb735eb58 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -13,6 +13,10 @@ / { model =3D "Qnap TS-433-4G NAS System 4-Bay"; compatible =3D "qnap,ts433", "rockchip,rk3568"; =20 + chosen: chosen { + stdout-path =3D "serial2:115200n8"; + }; + dc_12v: regulator-dc-12v { compatible =3D "regulator-fixed"; regulator-name =3D "dc_12v"; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A92C166317 for ; Sun, 21 Jul 2024 17:37:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583456; cv=none; b=jxOAEFSdRwqEAlARp8gl6Iv6o+v0XdcaSM7+N1WWZTYzlExo4hTkM7WjOokeVCI1s+ayII0YSMNc7fCC7Bh4C931mVJjJdiGrNHK4tSk1luJEJCjUnRCa/amvVlyNE/r03W19ESOqlEL9lsHYZzJUdv2yyr8CjF05RfCSMwxjdc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583456; c=relaxed/simple; bh=k2xwrQmpLI0Hzih9FDsmGvU/ZBxT4sS3QPudM+IxFkU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UA7aiycd7uT6xv0YlH46f8E8UuFLv6FZb+cXVQv5y6VvHaNzdF+/vXLM8uzFR21nOa3JWWuX1cdA9ZXCXt3TACBpBx3OLoKwlIKNmdvg8Ay9sCJFZrJX9MEKpWIM4zKd293Zac6LWU0bot7RWAy+qjQah2kxxBpZTCOYBF+MAp4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV0-00075D-W0; Sun, 21 Jul 2024 19:37:31 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/14] arm64: dts: rockchip: enable sata1+2 on Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:15 +0200 Message-Id: <20240721173723.919961-7-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TS433 has 4 bays. The last two are accessed via a pci-connected sata controller, while the first two are accessed via the rk3568's sata controllers. Enable these two now. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 4fbbdb735eb58..69bed01cbe4ed 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -80,6 +80,16 @@ &combphy0 { status =3D "okay"; }; =20 +/* connected to sata1 */ +&combphy1 { + status =3D "okay"; +}; + +/* connected to sata2 */ +&combphy2 { + status =3D "okay"; +}; + &gmac0 { assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_= 2TOP>; @@ -154,6 +164,14 @@ vcc5v0_otg_en: vcc5v0-otg-en { }; }; =20 +&sata1 { + status =3D "okay"; +}; + +&sata2 { + status =3D "okay"; +}; + &sdhci { bus-width =3D <8>; max-frequency =3D <200000000>; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D006F167D95 for ; Sun, 21 Jul 2024 17:37:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583455; cv=none; b=gc3NucF2BA+3YqIZn2gBeGt/BkRVtjNRhPkX18U1qCtLfvU+xfx0rwQXCJfHJCzwz5QaKg+tYI/6YHM4oC2oEeV44RmvaYOlQqboyr5yOUMYO96cHrnCbypq3TOTkEzacqAkX0QW6y2D5assj6pWVTl9QQ2lrAY8dsJAfDsB+8g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583455; c=relaxed/simple; bh=xYT2p87AowoYlGAhmU5UlLUPWo69ZpdLDP2trW1FxOk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=I05P15hcsOeAt4xYbJl8A3LEl+4/3ZFMNDdF+r4KLbLJ4ubHm3DSmcuJSvwgPsWvz7ncGFxS51kCf8i/zT5pk606y8ZDNuZaK+dfiRKKQgpTByWGB7C6kgdKcR0SKJSnGqul2SgYYhUR4LMWGkHbhtoxDgYrWpZsi8raitb+2JA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV1-00075D-96; Sun, 21 Jul 2024 19:37:31 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/14] arm64: dts: rockchip: add board-aliases for Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:16 +0200 Message-Id: <20240721173723.919961-8-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the aliases for the internal network interface as well as the emmc on the board. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 69bed01cbe4ed..c05433ca7dda4 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -13,6 +13,11 @@ / { model =3D "Qnap TS-433-4G NAS System 4-Bay"; compatible =3D "qnap,ts433", "rockchip,rk3568"; =20 + aliases { + ethernet0 =3D &gmac0; + mmc0 =3D &sdhci; + }; + chosen: chosen { stdout-path =3D "serial2:115200n8"; }; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D00C5167DB7 for ; Sun, 21 Jul 2024 17:37:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583456; cv=none; b=cHhRokV6bmPdBAh0HChve3g6YNZddbhznxd2hHgQimSpKUr6iWfysDDUxOvwXda4BIqmY53vxAOfzIxVndq+DFPMymjhetMFdw9MJFTOje+vFiTv1F9mCYRZdRov5ArRDCJyK+pR5WEMwqEuGHhikQr/Z+fplTUR9z5uLmFecek= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583456; c=relaxed/simple; bh=8nshw+VonucN8pE6DwNpoD32btdzY5apzYXVStXpqXU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=uz3CDQ5ENQRr+aRsVkkzMUFVYzmxlb8qxAxLJs48x4129FZUE9AWRe0mhxf1BGgSqNXge6I7OHSHmkE8K+rHsoMfpGmr8GLySMYzPq9fKydCNj1QHzIgUSGopl58FRSjs9BYr70bnpmHa4Gy8uqhukbzdY4reNngc6oQOqShVXo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV1-00075D-IZ; Sun, 21 Jul 2024 19:37:31 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/14] arm64: dts: rockchip: add hdd leds to Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:17 +0200 Message-Id: <20240721173723.919961-9-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the 4 gpio-controlled LEDs to the Qnap-TS433. They are meant for individual disk activitivy, but I haven't found a way for how to connect them to their individual sata slot yet. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index c05433ca7dda4..d36467c2baf02 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -6,6 +6,7 @@ =20 /dts-v1/; =20 +#include #include #include "rk3568.dtsi" =20 @@ -22,6 +23,46 @@ chosen: chosen { stdout-path =3D "serial2:115200n8"; }; =20 + leds { + compatible =3D "gpio-leds"; + + led_hdd1: led-0 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd1_led_pin>; + }; + + led_hdd2: led-1 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd2_led_pin>; + }; + + led_hdd3: led-2 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd3_led_pin>; + }; + + led_hdd4: led-3 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd4_led_pin>; + }; + }; + dc_12v: regulator-dc-12v { compatible =3D "regulator-fixed"; regulator-name =3D "dc_12v"; @@ -158,6 +199,24 @@ &pcie3x2 { }; =20 &pinctrl { + leds { + hdd1_led_pin: hdd1-led-pin { + rockchip,pins =3D <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd2_led_pin: hdd2-led-pin { + rockchip,pins =3D <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd3_led_pin: hdd3-led-pin { + rockchip,pins =3D <1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd4_led_pin: hdd4_led-pin { + rockchip,pins =3D <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0600A16C680 for ; Sun, 21 Jul 2024 17:37:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583459; cv=none; b=Q20K70lN+Id+5WqR9P/GlQMtWOUA9ZdRVEvJDnCQ5YM6BVyJbtffBZOEOoBzhK4Dt1jKhN+ZnKaR9l6XNepEPTfpwV/MouWDKs7B6RYZA49SkEmPE+PEpJd1CsuLfjA2JSClyU8ugG+eSB0Hxf/HhX1o2UoRVnnADFIhXBtCvMg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583459; c=relaxed/simple; bh=lhFpPEQHjtznLKRbtE+WR30/61KVROsOMeLxocnt+1w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BUqEFVyEV5cY8SvKxyaf1K2s9PdUjvghtCbEaFqeeV37IbGBMxYAnWDNwdJt0V32Zsrq1ka3bknqcNaiQb3m9D6KB4yRfqvl7vnTd9X76gK6qYgMDmucrSXQqXv8/d63ZSC9J43+qC+xfx1cMjdAy6U5gqrlnNtR+USTQCnW7mQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV1-00075D-SV; Sun, 21 Jul 2024 19:37:31 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/14] arm64: dts: rockchip: enable the tsadc on the Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:18 +0200 Message-Id: <20240721173723.919961-10-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable the tsadc node to allow for temperature measurements of the soc. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index d36467c2baf02..02fa46beb6371 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -243,6 +243,12 @@ &sdhci { status =3D "okay"; }; =20 +&tsadc { + rockchip,hw-tshut-mode =3D <1>; + rockchip,hw-tshut-polarity =3D <0>; + status =3D "okay"; +}; + &uart0 { status =3D "okay"; }; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D20216A92B for ; Sun, 21 Jul 2024 17:39:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583580; cv=none; b=Yvjm4qwzj6KJOg60l1HDI7qOKknPjhFkdyBKhEsDXA49YprCzPUkkWDDd0l1wef2Rati/dAay2taHMsuf0MGXqPxDgxIh46BtPbYmHXvq7S+xkaFvzOjfG20TdYGy6r5azEGayv0m3jIF2/VE5B7QZ0Xqh90Knp34JHqjfupwCU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583580; c=relaxed/simple; bh=O5KmD2kpWcjeFcMpfPtnaiPNhkY15Tf0hEL8woi49b4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=sVdjj9RROm1lyjwBGOFBq6b2r7bnPl8gY7sDlnHVV+/tlkHfJSzcPS5Y8eceFUAVBYE9MFscL/mocwsTXETNBdhj62BCgKouJgzDzbPBBEU2L/GFxx9tr+qCcqJbyZKRttvj8B1upCM+HhZHmzRAnUM5gnEzLfvhP+s9KmSHwU4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV2-00075D-5S; Sun, 21 Jul 2024 19:37:32 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/14] arm64: dts: rockchip: add gpio-keys to Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:19 +0200 Message-Id: <20240721173723.919961-11-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TS433 has 3 buttons, power and copy in the front as well as a reset pinhole button on the back. The power-button is connected to the embedded controller while the other two buttons are just gpio connected. Add the gpio-keys definition for the two buttons we can handle right now. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 02fa46beb6371..c593a9c2313a3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -6,6 +6,7 @@ =20 /dts-v1/; =20 +#include #include #include #include "rk3568.dtsi" @@ -23,6 +24,24 @@ chosen: chosen { stdout-path =3D "serial2:115200n8"; }; =20 + keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <©_button_pin>, <&reset_button_pin>; + pinctrl-names =3D "default"; + + key-copy { + label =3D "copy"; + gpios =3D <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + key-reset { + label =3D "reset"; + gpios =3D <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; + leds { compatible =3D "gpio-leds"; =20 @@ -199,6 +218,16 @@ &pcie3x2 { }; =20 &pinctrl { + keys { + copy_button_pin: copy-button-pin { + rockchip,pins =3D <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + reset_button_pin: reset-button-pin { + rockchip,pins =3D <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + leds { hdd1_led_pin: hdd1-led-pin { rockchip,pins =3D <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9FF56167D95 for ; Sun, 21 Jul 2024 17:39:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583575; cv=none; b=G/TsV1bVC0mDk5aYbqiDfck33N3h4l2yF+gQ/5mnz9vlYO8EwY+PqEqWJ5DxuvtkZ8DPvv/3L9uhyMKhe4hj9ICIDe7XWGWfEQpGQoQV4Q7K9Thy2G9TOEK8DkBhRlUI/B9YaIn26HZ95iUfmxUvCGx9ECwiGa0fK9mlVPIbJO4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583575; c=relaxed/simple; bh=bCTa2YNf1mcCOWfCDcR54M5+FgmABgKVhX214fjs7jE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=XZCN+WEej+xMEPG4g26TcVKWYPyVf2cLrbiqHqgMrPlSFJz34vYiaqz0+VSMHHHztWTa8MwthELfuGjfSMWsIlOk1fDrrvW0xIactX2urUDTsm/0SGh9TEZUJgDG+wB3rrbpoV1TRBOo4gLMjGN67E9nbTzZzaN6CV3yd1Ht1Ms= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV2-00075D-F0; Sun, 21 Jul 2024 19:37:32 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/14] arm64: dts: rockchip: define cpu-supply on the Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:20 +0200 Message-Id: <20240721173723.919961-12-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TS433 seems to use a silergy,syr827 regulator for the cpu supply. At least that is the compatible used in the vendor devicetree, though it could very well also be another fan53555 clone. Define the needed regulator node and hook up the cpu-supply to the cpu cores. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index c593a9c2313a3..a576d45ccc3e0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -129,6 +129,16 @@ vcc5v0_otg: regulator-vcc5v0-otg { vin-supply =3D <&vcc5v0_usb>; }; =20 + vcc5v0_sys: vcc5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; + vcc5v0_usb: regulator-vcc5v0-usb { compatible =3D "regulator-fixed"; regulator-name =3D "vcc5v0_usb"; @@ -155,6 +165,22 @@ &combphy2 { status =3D "okay"; }; =20 +&cpu0 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_cpu>; +}; + &gmac0 { assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_= 2TOP>; @@ -174,12 +200,27 @@ &gmac0_rgmii_clk }; =20 &i2c0 { + status =3D "okay"; + pmic@20 { compatible =3D "rockchip,rk809"; reg =3D <0x20>; interrupt-parent =3D <&gpio0>; interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; }; + + vdd_cpu: regulator@40 { + compatible =3D "silergy,syr827"; + reg =3D <0x40>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1390000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + }; }; =20 &i2c1 { --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8905416A92B for ; Sun, 21 Jul 2024 17:39:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583587; cv=none; b=j6kQGV5msVXQJ8/g3kPfRpcpOXbTgfBB5aMHY1NktY7s7QYwj9PvLRy58mReKTDCNmcXCSulTyd6dwOlqR+tXM7BOYs39Y1HfgnmkP3FtqLsimd7MsMaZtnIcnlm4iht+KQEus1fdhlH7rscuwMaA6yg6n2bLX7z42ZPpQTmORg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583587; c=relaxed/simple; bh=rGEunQTL5xfOLn/67zuCT6MRR27QxPGMXTnZs/rOzcY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eJh43exvbcWQCSa/c5nKv3S2MW43/F7Rqh6lIqlb/moSAr5xO0LNWOdzILW8onTEvwz7i2Rg7ZxTc+eq4HO/uYx2AP5zrhCV5+ni8jor4Dnm9KeO2XaIbe2mhXjh8Fd8LZyy+cAdOVo+YwwOAK9IeCffW2l/0B+/zXnl4X+Fmjs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV2-00075D-OF; Sun, 21 Jul 2024 19:37:32 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 12/14] arm64: dts: rockchip: add missing pmic information on Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:21 +0200 Message-Id: <20240721173723.919961-13-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fill in the missing pieces for RK809 pmic used on the TS433. The regulator setup comes from the vendor-devicetree, so without proper schematics its accuracy is somewhat unclear, but it looks really similar to all the other rk3568 boards, so follows the reference design it seems. The one caveat is related to vcc3v3_sd. This regulator needs to stay on. When turned off because of no users, access to both PCIe controllers will stall. Maybe this rail does supply the 100MHz refclk generation or so. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 229 +++++++++++++++++- 1 file changed, 227 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index a576d45ccc3e0..779e1b8a35ca5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -101,6 +101,16 @@ vcc3v3_pcie: regulator-vcc3v3-pcie { vin-supply =3D <&dc_12v>; }; =20 + vcc3v3_sys: vcc3v3-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&dc_12v>; + }; + vcc5v0_host: regulator-vcc5v0-host { compatible =3D "regulator-fixed"; enable-active-high; @@ -202,11 +212,220 @@ &gmac0_rgmii_clk &i2c0 { status =3D "okay"; =20 - pmic@20 { + rk809: pmic@20 { compatible =3D "rockchip,rk809"; reg =3D <0x20>; interrupt-parent =3D <&gpio0>; - interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; + interrupts =3D ; + #clock-cells =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>; + system-power-controller; + vcc1-supply =3D <&vcc3v3_sys>; + vcc2-supply =3D <&vcc3v3_sys>; + vcc3-supply =3D <&vcc3v3_sys>; + vcc4-supply =3D <&vcc3v3_sys>; + vcc5-supply =3D <&vcc3v3_sys>; + vcc6-supply =3D <&vcc3v3_sys>; + vcc7-supply =3D <&vcc3v3_sys>; + vcc8-supply =3D <&vcc3v3_sys>; + vcc9-supply =3D <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name =3D "vdd_gpu"; + regulator-always-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name =3D "vdd_npu"; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name =3D "vdda0v9_image"; + regulator-always-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name =3D "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name =3D "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name =3D "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name =3D "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name =3D "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name =3D "vcca1v8_image"; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name =3D "vcc3v3_sd"; + /* + * turning this off, breaks access to both + * PCIe controllers, refclk generator perhaps + */ + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; }; =20 vdd_cpu: regulator@40 { @@ -287,6 +506,12 @@ hdd4_led_pin: hdd4_led-pin { }; }; =20 + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins =3D <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 178E516A92B for ; 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dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV3-00075D-1w; Sun, 21 Jul 2024 19:37:33 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 13/14] arm64: dts: rockchip: enable gpu on Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:22 +0200 Message-Id: <20240721173723.919961-14-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TS433 doesn't provide display output, but the gpu nevertheless can be used for compute tasks for example. So there is no reason not to enable it. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 779e1b8a35ca5..913d28cee8e9e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -209,6 +209,11 @@ &gmac0_rgmii_clk status =3D "okay"; }; =20 +&gpu { + mali-supply =3D <&vdd_gpu>; + status =3D "okay"; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.39.2 From nobody Tue Dec 16 17:55:19 2025 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DDB516A92B for ; Sun, 21 Jul 2024 17:39:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583592; cv=none; b=on7b+oUK5EWLhw/cNli8m9aICcjdX++7iY4dII/Osk67r92u6JlZqsRzeSFR3GJMJ4F9HB3lC8XUrGBad9nG6M+j1wV8mKeOMgkV3/6J4MzNad/7GfDXbd4Jk9Q9NUi4dvKAiEt57Hw+cKhzN0lhKRH9+pN3iJ1fSmScClXVaH8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721583592; c=relaxed/simple; bh=1GAu6fEt+bsasuQ15PRVAVglsoINnZo00xZ6FGY1mPc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MYUAu9eg4tXFth/MMbu4XEaXfEgSTyPVIU58WVB/RR8yke+F/e35rpF8mgyqqGcpRlJINM9EtROfC2JRpoy6PFkT2NwTEMJei6hn+RCzpWiosWtOZRY12NmfHiYL8whaz2f8caPAAgg5fiKa9jiaes6CJsFN7YvmSiFJtZ4TjMc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Received: from i5e860cd3.versanet.de ([94.134.12.211] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sVaV3-00075D-Bo; Sun, 21 Jul 2024 19:37:33 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: ukleinek@debian.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 14/14] arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433 Date: Sun, 21 Jul 2024 19:37:23 +0200 Message-Id: <20240721173723.919961-15-heiko@sntech.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240721173723.919961-1-heiko@sntech.de> References: <20240721173723.919961-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the two supplies for the pmu-io-domains that are defined in the vendor devicetree for the TS433. Signed-off-by: Heiko Stuebner Tested-by: Uwe Kleine-K=C3=B6nig --- arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 913d28cee8e9e..4213c351faf5d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -528,6 +528,11 @@ vcc5v0_otg_en: vcc5v0-otg-en { }; }; =20 +&pmu_io_domains { + vccio4-supply =3D <&vcc_1v8>; + vccio6-supply =3D <&vcc_1v8>; +}; + &sata1 { status =3D "okay"; }; --=20 2.39.2