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Fri, 19 Jul 2024 12:51:28 -0500 From: Lizhi Hou To: , CC: Lizhi Hou , , , , Subject: [PATCH V1 10/10] accel/amdxdna: Add firmware debug buffer support Date: Fri, 19 Jul 2024 10:51:28 -0700 Message-ID: <20240719175128.2257677-11-lizhi.hou@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240719175128.2257677-1-lizhi.hou@amd.com> References: <20240719175128.2257677-1-lizhi.hou@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: None (SATLEXMB05.amd.com: lizhi.hou@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D3:EE_|CY8PR12MB8068:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e99ce86-3852-48b6-8e14-08dca81b6b82 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jul 2024 17:51:29.9506 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9e99ce86-3852-48b6-8e14-08dca81b6b82 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D3.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8068 Content-Type: text/plain; charset="utf-8" User application may allocate a debug buffer and attach it to an NPU context through the driver. Then the NPU firmware prints its debug information to this buffer for debugging. Co-developed-by: Min Ma Signed-off-by: Min Ma Signed-off-by: Lizhi Hou --- drivers/accel/amdxdna/aie2_ctx.c | 45 +++++++++++++++- drivers/accel/amdxdna/amdxdna_ctx.c | 1 + drivers/accel/amdxdna/amdxdna_ctx.h | 1 + drivers/accel/amdxdna/amdxdna_gem.c | 81 +++++++++++++++++++++++++++++ drivers/accel/amdxdna/amdxdna_gem.h | 4 ++ 5 files changed, 131 insertions(+), 1 deletion(-) diff --git a/drivers/accel/amdxdna/aie2_ctx.c b/drivers/accel/amdxdna/aie2_= ctx.c index a392cc2b9237..310a9b63024f 100644 --- a/drivers/accel/amdxdna/aie2_ctx.c +++ b/drivers/accel/amdxdna/aie2_ctx.c @@ -708,6 +708,48 @@ static int aie2_hwctx_cu_config(struct amdxdna_hwctx *= hwctx, void *buf, u32 size return ret; } =20 +static int aie2_hwctx_attach_debug_bo(struct amdxdna_hwctx *hwctx, u32 bo_= hdl) +{ + struct amdxdna_client *client =3D hwctx->client; + struct amdxdna_dev *xdna =3D client->xdna; + struct amdxdna_gem_obj *abo; + int ret; + + abo =3D amdxdna_gem_get_obj(client, bo_hdl, AMDXDNA_BO_DEV); + if (!abo) { + XDNA_ERR(xdna, "Get bo %d failed", bo_hdl); + ret =3D -EINVAL; + goto err_out; + } + + ret =3D amdxdna_gem_set_assigned_hwctx(client, bo_hdl, hwctx->id); + if (ret) { + XDNA_ERR(xdna, "Failed to attach debug BO %d to %s: %d", bo_hdl, hwctx->= name, ret); + goto put_obj; + } + XDNA_DBG(xdna, "Attached debug BO %d to %s", bo_hdl, hwctx->name); + +put_obj: + amdxdna_gem_put_obj(abo); +err_out: + return ret; +} + +static int aie2_hwctx_detach_debug_bo(struct amdxdna_hwctx *hwctx, u32 bo_= hdl) +{ + struct amdxdna_client *client =3D hwctx->client; + struct amdxdna_dev *xdna =3D client->xdna; + + if (amdxdna_gem_get_assigned_hwctx(client, bo_hdl) !=3D hwctx->id) { + XDNA_ERR(xdna, "Debug BO %d isn't attached to %s", bo_hdl, hwctx->name); + return -EINVAL; + } + + amdxdna_gem_clear_assigned_hwctx(client, bo_hdl); + XDNA_DBG(xdna, "Detached debug BO %d from %s", bo_hdl, hwctx->name); + return 0; +} + int aie2_hwctx_config(struct amdxdna_hwctx *hwctx, u32 type, u64 value, vo= id *buf, u32 size) { struct amdxdna_dev *xdna =3D hwctx->client->xdna; @@ -717,8 +759,9 @@ int aie2_hwctx_config(struct amdxdna_hwctx *hwctx, u32 = type, u64 value, void *bu case DRM_AMDXDNA_HWCTX_CONFIG_CU: return aie2_hwctx_cu_config(hwctx, buf, size); case DRM_AMDXDNA_HWCTX_ASSIGN_DBG_BUF: + return aie2_hwctx_attach_debug_bo(hwctx, (u32)value); case DRM_AMDXDNA_HWCTX_REMOVE_DBG_BUF: - return -EOPNOTSUPP; + return aie2_hwctx_detach_debug_bo(hwctx, (u32)value); default: XDNA_DBG(xdna, "Not supported type %d", type); return -EOPNOTSUPP; diff --git a/drivers/accel/amdxdna/amdxdna_ctx.c b/drivers/accel/amdxdna/am= dxdna_ctx.c index bafca7f0415f..174bad2efc33 100644 --- a/drivers/accel/amdxdna/amdxdna_ctx.c +++ b/drivers/accel/amdxdna/amdxdna_ctx.c @@ -143,6 +143,7 @@ int amdxdna_drm_create_hwctx_ioctl(struct drm_device *d= ev, void *data, struct dr hwctx->num_tiles =3D args->num_tiles; hwctx->mem_size =3D args->mem_size; hwctx->max_opc =3D args->max_opc; + hwctx->log_buf_bo =3D args->log_buf_bo; mutex_lock(&client->hwctx_lock); ret =3D idr_alloc_cyclic(&client->hwctx_idr, hwctx, 0, MAX_HWCTX_ID, GFP_= KERNEL); if (ret < 0) { diff --git a/drivers/accel/amdxdna/amdxdna_ctx.h b/drivers/accel/amdxdna/am= dxdna_ctx.h index 1a42964a2f87..895450d9923c 100644 --- a/drivers/accel/amdxdna/amdxdna_ctx.h +++ b/drivers/accel/amdxdna/amdxdna_ctx.h @@ -80,6 +80,7 @@ struct amdxdna_hwctx { u32 *col_list; u32 start_col; u32 num_col; + u32 log_buf_bo; #define HWCTX_STAT_INIT 0 #define HWCTX_STAT_READY 1 #define HWCTX_STAT_STOP 2 diff --git a/drivers/accel/amdxdna/amdxdna_gem.c b/drivers/accel/amdxdna/am= dxdna_gem.c index 77224adbc77f..a12e885f0628 100644 --- a/drivers/accel/amdxdna/amdxdna_gem.c +++ b/drivers/accel/amdxdna/amdxdna_gem.c @@ -584,10 +584,12 @@ int amdxdna_drm_get_bo_info_ioctl(struct drm_device *= dev, void *data, struct drm int amdxdna_drm_sync_bo_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) { + struct amdxdna_client *client =3D filp->driver_priv; struct amdxdna_dev *xdna =3D to_xdna_dev(dev); struct amdxdna_drm_sync_bo *args =3D data; struct amdxdna_gem_obj *abo; struct drm_gem_object *gobj; + u32 hwctx_hdl; int ret; =20 gobj =3D drm_gem_object_lookup(filp, args->handle); @@ -610,6 +612,28 @@ int amdxdna_drm_sync_bo_ioctl(struct drm_device *dev, =20 amdxdna_gem_unpin(abo); =20 + if (abo->assigned_hwctx !=3D AMDXDNA_INVALID_CTX_HANDLE && + args->direction =3D=3D SYNC_DIRECT_FROM_DEVICE) { + u64 seq; + + hwctx_hdl =3D amdxdna_gem_get_assigned_hwctx(client, args->handle); + if (hwctx_hdl =3D=3D AMDXDNA_INVALID_CTX_HANDLE || + args->direction !=3D SYNC_DIRECT_FROM_DEVICE) { + XDNA_ERR(xdna, "Sync failed, dir %d", args->direction); + ret =3D -EINVAL; + goto put_obj; + } + + ret =3D amdxdna_cmd_submit(client, AMDXDNA_INVALID_BO_HANDLE, + &args->handle, 1, hwctx_hdl, &seq); + if (ret) { + XDNA_ERR(xdna, "Submit command failed"); + goto put_obj; + } + + ret =3D amdxdna_cmd_wait(client, hwctx_hdl, seq, 3000 /* ms */); + } + XDNA_DBG(xdna, "Sync bo %d offset 0x%llx, size 0x%llx\n", args->handle, args->offset, args->size); =20 @@ -617,3 +641,60 @@ int amdxdna_drm_sync_bo_ioctl(struct drm_device *dev, drm_gem_object_put(gobj); return ret; } + +u32 amdxdna_gem_get_assigned_hwctx(struct amdxdna_client *client, u32 bo_h= dl) +{ + struct amdxdna_gem_obj *abo =3D amdxdna_gem_get_obj(client, bo_hdl, AMDXD= NA_BO_INVALID); + u32 ctxid; + + if (!abo) { + XDNA_DBG(client->xdna, "Get bo %d failed", bo_hdl); + return AMDXDNA_INVALID_CTX_HANDLE; + } + + mutex_lock(&abo->lock); + ctxid =3D abo->assigned_hwctx; + if (!idr_find(&client->hwctx_idr, ctxid)) + ctxid =3D AMDXDNA_INVALID_CTX_HANDLE; + mutex_unlock(&abo->lock); + + amdxdna_gem_put_obj(abo); + return ctxid; +} + +int amdxdna_gem_set_assigned_hwctx(struct amdxdna_client *client, u32 bo_h= dl, u32 ctxid) +{ + struct amdxdna_gem_obj *abo =3D amdxdna_gem_get_obj(client, bo_hdl, AMDXD= NA_BO_INVALID); + int ret =3D 0; + + if (!abo) { + XDNA_DBG(client->xdna, "Get bo %d failed", bo_hdl); + return -EINVAL; + } + + mutex_lock(&abo->lock); + if (!idr_find(&client->hwctx_idr, abo->assigned_hwctx)) + abo->assigned_hwctx =3D ctxid; + else if (ctxid !=3D abo->assigned_hwctx) + ret =3D -EBUSY; + mutex_unlock(&abo->lock); + + amdxdna_gem_put_obj(abo); + return ret; +} + +void amdxdna_gem_clear_assigned_hwctx(struct amdxdna_client *client, u32 b= o_hdl) +{ + struct amdxdna_gem_obj *abo =3D amdxdna_gem_get_obj(client, bo_hdl, AMDXD= NA_BO_INVALID); + + if (!abo) { + XDNA_DBG(client->xdna, "Get bo %d failed", bo_hdl); + return; + } + + mutex_lock(&abo->lock); + abo->assigned_hwctx =3D AMDXDNA_INVALID_CTX_HANDLE; + mutex_unlock(&abo->lock); + + amdxdna_gem_put_obj(abo); +} diff --git a/drivers/accel/amdxdna/amdxdna_gem.h b/drivers/accel/amdxdna/am= dxdna_gem.h index fe5d1142c904..a1ec1415e74b 100644 --- a/drivers/accel/amdxdna/amdxdna_gem.h +++ b/drivers/accel/amdxdna/amdxdna_gem.h @@ -62,6 +62,10 @@ int amdxdna_gem_pin_nolock(struct amdxdna_gem_obj *abo); int amdxdna_gem_pin(struct amdxdna_gem_obj *abo); void amdxdna_gem_unpin(struct amdxdna_gem_obj *abo); =20 +u32 amdxdna_gem_get_assigned_hwctx(struct amdxdna_client *client, u32 bo_h= dl); +int amdxdna_gem_set_assigned_hwctx(struct amdxdna_client *client, u32 bo_h= dl, u32 ctx_hdl); +void amdxdna_gem_clear_assigned_hwctx(struct amdxdna_client *client, u32 b= o_hdl); + int amdxdna_drm_create_bo_ioctl(struct drm_device *dev, void *data, struct= drm_file *filp); int amdxdna_drm_get_bo_info_ioctl(struct drm_device *dev, void *data, stru= ct drm_file *filp); int amdxdna_drm_sync_bo_ioctl(struct drm_device *dev, void *data, struct d= rm_file *filp); --=20 2.34.1