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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240717-dispcc-sm8550-fixes-v1-5-efb4d927dc9a@linaro.org> References: <20240717-dispcc-sm8550-fixes-v1-0-efb4d927dc9a@linaro.org> In-Reply-To: <20240717-dispcc-sm8550-fixes-v1-0-efb4d927dc9a@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Neil Armstrong , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1142; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=1xdmr1yatgGg/bSxXkpujHT9fyMfuqG+m6Dv29abaf8=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmluJ6h1cZUnl50Dm7I1C3867Vej1LNiWb3mBu2 q+lHSFxC/+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZpbiegAKCRCLPIo+Aiko 1UoJB/0b12ohLWBi4o4BbSP9xHbKo/nYH6Url2w1BoBMCljh1WR/J3TNxS0kX5W60E/LoW2CYAW TJAOz+akYCx0YT69J1HwWuay1oTIpNavKyDwIk2q7/Y5wqOZXZErO+RoTsYnh1fsZjjxla8HbBM t8eLqP2mHssqsStIV/t6hwz7KjxscnrW4bbcKEzmNV3O4oENnzurNVI0iWoAfISSJuBeCcmFpG1 QxZci3883BsezPXWf62Puyh3wPqozyT7WOMAYkm5mP+dNbfBS6prcafzCd4R/kbHhja+dQWHReh BCDhQEJHcnPx8E5uJrKEJG8uqkblR6R3cw9e4Rn8kjIjsOiM X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Follow the recommendations and park disp_cc_mdss_esc[01]_clk_src to the XO instead of disabling the clocks by using the clk_rcg2_shared_ops. Fixes: 90114ca11476 ("clk: qcom: add SM8550 DISPCC driver") Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong --- drivers/clk/qcom/dispcc-sm8550.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/dispcc-sm8550.c b/drivers/clk/qcom/dispcc-sm8= 550.c index 49dff9b81fa1..a476be3403ba 100644 --- a/drivers/clk/qcom/dispcc-sm8550.c +++ b/drivers/clk/qcom/dispcc-sm8550.c @@ -562,7 +562,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src =3D { .parent_data =3D disp_cc_parent_data_5, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_5), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 @@ -577,7 +577,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src =3D { .parent_data =3D disp_cc_parent_data_5, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_5), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 --=20 2.39.2