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Jones" To: platform-driver-x86@vger.kernel.org Cc: corentin.chary@gmail.com, hdegoede@redhat.com, ilpo.jarvinen@linux.intel.com, mario.limonciello@amd.com, linux-kernel@vger.kernel.org, "Luke D. Jones" Subject: [PATCH 4/5] platform/x86: asus-bios: add core count control Date: Tue, 16 Jul 2024 17:16:11 +1200 Message-ID: <20240716051612.64842-5-luke@ljones.dev> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240716051612.64842-1-luke@ljones.dev> References: <20240716051612.64842-1-luke@ljones.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Implement Intel core enablement under the asus-bioscfg module using the fw_attributes class. This allows users to enable or disable preformance or efficiency cores depending on their requirements. After change a reboot is required. Signed-off-by: Luke D. Jones --- drivers/platform/x86/asus-bioscfg.c | 206 +++++++++++++++++++++ drivers/platform/x86/asus-bioscfg.h | 29 +++ include/linux/platform_data/x86/asus-wmi.h | 4 + 3 files changed, 239 insertions(+) diff --git a/drivers/platform/x86/asus-bioscfg.c b/drivers/platform/x86/asu= s-bioscfg.c index 57efe50e0d19..6d39e45591e8 100644 --- a/drivers/platform/x86/asus-bioscfg.c +++ b/drivers/platform/x86/asus-bioscfg.c @@ -41,6 +41,18 @@ MODULE_ALIAS("wmi:"ASUS_NB_WMI_EVENT_GUID); #define ASUS_MINI_LED_2024_STRONG 0x01 #define ASUS_MINI_LED_2024_OFF 0x02 =20 +enum cpu_core_type { + CPU_CORE_PERF =3D 0, + CPU_CORE_POWER, +}; + +enum cpu_core_value { + CPU_CORE_DEFAULT =3D 0, + CPU_CORE_MIN, + CPU_CORE_MAX, + CPU_CORE_CURRENT, +}; + /* Default limits for tunables available on ASUS ROG laptops */ #define PPT_CPU_LIMIT_MIN 5 #define PPT_CPU_LIMIT_MAX 150 @@ -75,6 +87,10 @@ struct rog_tunables { u32 nv_temp_default; u32 nv_temp_max; u32 nv_temp_target; + + u32 min_perf_cores; + u32 max_perf_cores; + u32 max_power_cores; }; =20 static const struct class *fw_attr_class; @@ -540,6 +556,191 @@ static ssize_t apu_mem_possible_values_show(struct ko= bject *kobj, } ATTR_GROUP_ENUM_CUSTOM(apu_mem, "apu_mem", "Set the available system memor= y for the APU to use"); =20 +static int asus_bios_set_max_cores(void) +{ + u32 cores; + int err; + + asus_bios.rog_tunables->min_perf_cores =3D 4; + asus_bios.rog_tunables->max_perf_cores =3D 4; + asus_bios.rog_tunables->max_power_cores =3D 8; + + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_CORES_MAX, &cores); + if (err) + return err; + + cores &=3D ~ASUS_WMI_DSTS_PRESENCE_BIT; + asus_bios.rog_tunables->max_power_cores =3D (cores & 0xff00) >> 8; + asus_bios.rog_tunables->max_perf_cores =3D cores & 0xff; + + return 0; +} + +static ssize_t cores_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf, + enum cpu_core_type core_type, + enum cpu_core_value core_value) +{ + u32 cores; + int err; + + switch (core_value) { + case CPU_CORE_DEFAULT: + case CPU_CORE_MAX: + if (core_type =3D=3D CPU_CORE_PERF) + return sysfs_emit(buf, "%d\n", asus_bios.rog_tunables->max_perf_cores); + else + return sysfs_emit(buf, "%d\n", asus_bios.rog_tunables->max_power_cores); + case CPU_CORE_MIN: + if (core_type =3D=3D CPU_CORE_PERF) + return sysfs_emit(buf, "%d\n", asus_bios.rog_tunables->min_perf_cores); + else + return sysfs_emit(buf, "%d\n", 0); + default: + break; + } + + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_CORES, &cores); + if (err) + return err; + + cores &=3D ~ASUS_WMI_DSTS_PRESENCE_BIT; + if (core_type =3D=3D CPU_CORE_PERF) + cores &=3D 0xff; + else + cores =3D (cores & 0xff00) >> 8; + return sysfs_emit(buf, "%d\n", cores); +} + +static ssize_t cores_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, const char *buf, + enum cpu_core_type core_type) +{ + int result, err; + u32 cores, currentv, min, max; + + result =3D kstrtou32(buf, 10, &cores); + if (result) + return result; + + if (core_type =3D=3D CPU_CORE_PERF) { + min =3D asus_bios.rog_tunables->min_perf_cores; + max =3D asus_bios.rog_tunables->max_perf_cores; + } else { + min =3D 0; + max =3D asus_bios.rog_tunables->max_power_cores; + } + if (cores < min || cores > max) + return -EINVAL; + + err =3D asus_wmi_get_devstate_dsts(ASUS_WMI_DEVID_CORES, ¤tv); + if (err) + return err; + + if (core_type =3D=3D CPU_CORE_PERF) + cores |=3D (currentv & 0xff00); + else + cores |=3D currentv & 0xff; + + if (cores =3D=3D currentv) + return 0; + + err =3D asus_wmi_set_devstate(ASUS_WMI_DEVID_CORES, cores, &result); + if (err) { + pr_warn("Failed to set perfromance core count: %d\n", err); + return err; + } + + if (result > 1) { + pr_warn("Failed to set performance core count (result): 0x%x\n", result); + return -EIO; + } + + pr_info("CPU core count changed, reboot required\n"); + sysfs_notify(kobj, NULL, attr->attr.name); + asus_set_reboot_and_signal_event(); + + return 0; +} + +static ssize_t cores_performance_min_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_MIN); +} + +static ssize_t cores_performance_max_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_MAX); +} + +static ssize_t cores_performance_default_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_DEFAULT); +} + +static ssize_t cores_performance_current_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_CURRENT); +} + +static ssize_t cores_performance_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + int err; + + err =3D cores_current_value_store(kobj, attr, buf, CPU_CORE_PERF); + if (err) + return err; + + return count; +} +ATTR_GROUP_CORES_RW(cores_performance, "cores_performance", ASUS_WMI_DEVID= _CORES, + "Set the max available performance cores"); + +static ssize_t cores_efficiency_min_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_MIN); +} + +static ssize_t cores_efficiency_max_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_MAX); +} + +static ssize_t cores_efficiency_default_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_DEFAULT= ); +} + +static ssize_t cores_efficiency_current_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_CURRENT= ); +} + +static ssize_t cores_efficiency_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + int err; + + err =3D cores_current_value_store(kobj, attr, buf, CPU_CORE_POWER); + if (err) + return err; + + return count; +} +ATTR_GROUP_CORES_RW(cores_efficiency, "cores_efficiency", ASUS_WMI_DEVID_C= ORES, + "Set the max available efficiency cores"); + /* Simple attribute creation */ ATTR_GROUP_ENUM_INT_RW(thermal_policy, "thermal_policy", ASUS_WMI_DEVID_TH= ROTTLE_THERMAL_POLICY, 0, 3, "0;1;2", "Set the thermal profile: 0=3Dnormal, 1=3Dperformance, 2= =3Dquiet"); @@ -636,6 +837,11 @@ static int asus_fw_attr_add(void) if (asus_wmi_is_present(ASUS_WMI_DEVID_EGPU_CONNECTED)) sysfs_create_group(&asus_bioscfg.fw_attr_kset->kobj, &egpu_connected_att= r_group); =20 + if (asus_wmi_is_present(ASUS_WMI_DEVID_CORES_MAX) && !asus_bios_set_max_c= ores()) { + sysfs_create_group(&asus_bios.fw_attr_kset->kobj, &cores_performance_att= r_group); + sysfs_create_group(&asus_bios.fw_attr_kset->kobj, &cores_efficiency_attr= _group); + } + if (asus_wmi_is_present(ASUS_WMI_DEVID_THROTTLE_THERMAL_POLICY)) sysfs_create_group(&asus_bioscfg.fw_attr_kset->kobj, &thermal_policy_att= r_group); if (asus_wmi_is_present(ASUS_WMI_DEVID_PPT_PL1_SPL)) diff --git a/drivers/platform/x86/asus-bioscfg.h b/drivers/platform/x86/asu= s-bioscfg.h index 2da55a91ff0b..bae1976eda3f 100644 --- a/drivers/platform/x86/asus-bioscfg.h +++ b/drivers/platform/x86/asus-bioscfg.h @@ -244,6 +244,35 @@ static const struct attribute_group _attrname##_attr_g= roup =3D { \ .attrs =3D _attrname##_attrs \ } =20 +/* CPU core attributes need a little different in setup */ +#define ATTR_GROUP_CORES_RW(_attrname, _fsname, _dispname) \ +__ATTR_SHOW_FMT(scalar_increment, _attrname, "%d\n", 1); \ +__ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ +static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ +static struct kobj_attribute attr_##_attrname##_default_value =3D \ + __ASUS_ATTR_RO(_attrname, default_value); \ +static struct kobj_attribute attr_##_attrname##_min_value =3D \ + __ASUS_ATTR_RO(_attrname, min_value); \ +static struct kobj_attribute attr_##_attrname##_max_value =3D \ + __ASUS_ATTR_RO(_attrname, max_value); \ +static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, int_type_show); \ +static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_default_value.attr, \ + &attr_##_attrname##_min_value.attr, \ + &attr_##_attrname##_max_value.attr, \ + &attr_##_attrname##_scalar_increment.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ +}; \ +static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, \ + .attrs =3D _attrname##_attrs \ +} + /* ROG PPT attributes need a little different in setup */ #define ATTR_GROUP_PPT_RW(_attrname, _fsname, _wmi, _default, \ _min, _max, _incstep, _dispname) \ diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index e3d511918416..d8f713ed3ea3 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -128,6 +128,10 @@ /* dgpu on/off */ #define ASUS_WMI_DEVID_DGPU 0x00090020 =20 +/* Intel E-core and P-core configuration in a format 0x0[E]0[P] */ +#define ASUS_WMI_DEVID_CORES 0x001200D2 + /* Maximum Intel E-core and P-core availability */ +#define ASUS_WMI_DEVID_CORES_MAX 0x001200D3 #define ASUS_WMI_DEVID_DGPU_BASE_TGP 0x00120099 #define ASUS_WMI_DEVID_DGPU_SET_TGP 0x00120098 #define ASUS_WMI_DEVID_APU_MEM 0x000600C1 --=20 2.45.2