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Tue, 16 Jul 2024 10:15:15 -0400 (EDT) From: Jiaxun Yang Date: Tue, 16 Jul 2024 22:15:00 +0800 Subject: [PATCH v3 3/3] LoongArch: SMP: Implement parallel CPU bring up Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240716-loongarch-hotplug-v3-3-af59b3bb35c8@flygoat.com> References: <20240716-loongarch-hotplug-v3-0-af59b3bb35c8@flygoat.com> In-Reply-To: <20240716-loongarch-hotplug-v3-0-af59b3bb35c8@flygoat.com> To: Thomas Gleixner , Peter Zijlstra , Huacai Chen , WANG Xuerui Cc: linux-kernel@vger.kernel.org, loongarch@lists.linux.dev, Jiaxun Yang X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6105; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=GGxWrxkIuiB6pNabPRprOT7hoV6uxOIbhuzgpQUjGtc=; b=owGbwMvMwCXmXMhTe71c8zDjabUkhrRpDRk75waXxr62qvOMvncqIf7Fu6Zj+fLuy00ue/ZfP Pw2feHDjlIWBjEuBlkxRZYQAaW+DY0XF1x/kPUHZg4rE8gQBi5OAZiI7y2G/0U12xXKv6kf7MgQ KLi3fqJtbZ8v2xRd33ctx984/NHJSGdkeOZx/Mby+XuebL36LPm4yZX1Gl8vGn7/erwh6q3Uac6 kW6wA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Implement parallel CPU bring up for LoongArch to reduce boot time consumption on bring up CPUs. On my Loongson-3A5000 ~120ms boot time improvement is observed. tp, sp register values are passed by MBUF now to avoid racing cpuboot_data global struct. cpu_running completion is handled by HOTPLUG_CORE_SYNC_FULL. Signed-off-by: Jiaxun Yang --- v3: Remove unecessary indirection (tglx) --- arch/loongarch/Kconfig | 1 + arch/loongarch/include/asm/smp.h | 6 ----- arch/loongarch/kernel/asm-offsets.c | 10 --------- arch/loongarch/kernel/head.S | 7 +++--- arch/loongarch/kernel/smp.c | 44 ++++++++-------------------------= ---- 5 files changed, 14 insertions(+), 54 deletions(-) diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index ddc042895d01..656435c1dbd5 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -162,6 +162,7 @@ config LOONGARCH select HAVE_SYSCALL_TRACEPOINTS select HAVE_TIF_NOHZ select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP + select HOTPLUG_PARALLEL if SMP select IRQ_FORCED_THREADING select IRQ_LOONGARCH_CPU select LOCK_MM_AND_FIND_VMA diff --git a/arch/loongarch/include/asm/smp.h b/arch/loongarch/include/asm/= smp.h index 50db503f44e3..f6953cb16492 100644 --- a/arch/loongarch/include/asm/smp.h +++ b/arch/loongarch/include/asm/smp.h @@ -75,12 +75,6 @@ extern int __cpu_logical_map[NR_CPUS]; #define SMP_CALL_FUNCTION BIT(ACTION_CALL_FUNCTION) #define SMP_IRQ_WORK BIT(ACTION_IRQ_WORK) =20 -struct secondary_data { - unsigned long stack; - unsigned long thread_info; -}; -extern struct secondary_data cpuboot_data; - extern asmlinkage void smpboot_entry(void); extern asmlinkage void start_secondary(void); =20 diff --git a/arch/loongarch/kernel/asm-offsets.c b/arch/loongarch/kernel/as= m-offsets.c index bee9f7a3108f..598498f47a4c 100644 --- a/arch/loongarch/kernel/asm-offsets.c +++ b/arch/loongarch/kernel/asm-offsets.c @@ -257,16 +257,6 @@ static void __used output_signal_defines(void) BLANK(); } =20 -#ifdef CONFIG_SMP -static void __used output_smpboot_defines(void) -{ - COMMENT("Linux smp cpu boot offsets."); - OFFSET(CPU_BOOT_STACK, secondary_data, stack); - OFFSET(CPU_BOOT_TINFO, secondary_data, thread_info); - BLANK(); -} -#endif - #ifdef CONFIG_HIBERNATION static void __used output_pbe_defines(void) { diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S index fdb831dc64df..8dd8fb450f46 100644 --- a/arch/loongarch/kernel/head.S +++ b/arch/loongarch/kernel/head.S @@ -136,9 +136,10 @@ SYM_CODE_START(smpboot_entry) li.w t0, 0x00 # FPE=3D0, SXE=3D0, ASXE=3D0, BTE=3D0 csrwr t0, LOONGARCH_CSR_EUEN =20 - la.pcrel t0, cpuboot_data - ld.d sp, t0, CPU_BOOT_STACK - ld.d tp, t0, CPU_BOOT_TINFO + li.w t0, LOONGARCH_IOCSR_MBUF1 + iocsrrd.d sp, t0 + li.w t0, LOONGARCH_IOCSR_MBUF2 + iocsrrd.d tp, t0 =20 bl start_secondary ASM_BUG() diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c index ca405ab86aae..967bdc66217f 100644 --- a/arch/loongarch/kernel/smp.c +++ b/arch/loongarch/kernel/smp.c @@ -48,10 +48,6 @@ EXPORT_SYMBOL(cpu_sibling_map); /* Representing the core map of multi-core chips of each logical CPU */ cpumask_t cpu_core_map[NR_CPUS] __read_mostly; EXPORT_SYMBOL(cpu_core_map); - -static DECLARE_COMPLETION(cpu_starting); -static DECLARE_COMPLETION(cpu_running); - /* * A logcal cpu mask containing only one VPE per core to * reduce the number of IPIs on large MT systems. @@ -65,7 +61,6 @@ static cpumask_t cpu_sibling_setup_map; /* representing cpus for which core maps can be computed */ static cpumask_t cpu_core_setup_map; =20 -struct secondary_data cpuboot_data; static DEFINE_PER_CPU(int, cpu_state); =20 static const char *ipi_types[NR_IPI] __tracepoint_string =3D { @@ -338,19 +333,23 @@ void __init loongson_prepare_cpus(unsigned int max_cp= us) /* * Setup the PC, SP, and TP of a secondary processor and start it running! */ -void loongson_boot_secondary(int cpu, struct task_struct *idle) +int arch_cpuhp_kick_ap_alive(unsigned int cpu, struct task_struct *tidle) { - unsigned long entry; + unsigned long entry, stack, thread_info; =20 pr_info("Booting CPU#%d...\n", cpu); =20 entry =3D __pa_symbol((unsigned long)&smpboot_entry); - cpuboot_data.stack =3D (unsigned long)__KSTK_TOS(idle); - cpuboot_data.thread_info =3D (unsigned long)task_thread_info(idle); + stack =3D (unsigned long)__KSTK_TOS(tidle); + thread_info =3D (unsigned long)task_thread_info(tidle); =20 + csr_mail_send(thread_info, cpu_logical_map(cpu), 2); + csr_mail_send(stack, cpu_logical_map(cpu), 1); csr_mail_send(entry, cpu_logical_map(cpu), 0); =20 loongson_send_ipi_single(cpu, ACTION_BOOT_CPU); + + return 0; } =20 /* @@ -525,23 +524,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus) #endif } =20 -int __cpu_up(unsigned int cpu, struct task_struct *tidle) -{ - loongson_boot_secondary(cpu, tidle); - - /* Wait for CPU to start and be ready to sync counters */ - if (!wait_for_completion_timeout(&cpu_starting, - msecs_to_jiffies(5000))) { - pr_crit("CPU%u: failed to start\n", cpu); - return -EIO; - } - - /* Wait for CPU to finish startup & mark itself online before return */ - wait_for_completion(&cpu_running); - - return 0; -} - /* * First C code run on the secondary CPUs after being started up by * the master. @@ -561,22 +543,14 @@ asmlinkage void start_secondary(void) set_cpu_sibling_map(cpu); set_cpu_core_map(cpu); =20 + cpuhp_ap_sync_alive(); notify_cpu_starting(cpu); =20 - /* Notify boot CPU that we're starting */ - complete(&cpu_starting); - /* The CPU is running, now mark it online */ set_cpu_online(cpu, true); =20 calculate_cpu_foreign_map(); =20 - /* - * Notify boot CPU that we're up & online and it can safely return - * from __cpu_up() - */ - complete(&cpu_running); - /* * irq will be enabled in loongson_smp_finish(), enabling it too * early is dangerous. --=20 2.45.2