From nobody Thu Dec 18 15:32:20 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 06F011862AD; Mon, 15 Jul 2024 08:40:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721032805; cv=none; b=gVhtQqSBnEypXwSufAlSP2tzWg7Ke2Z4kkVgSOtaTZU9cy+1YCMoxHa9J8Bhk3ao9iYZtYa16bCNUla+p1ecm9+76x2cZB8GzouMYBqMonuoUff5yc5zPWAhSJ3fVZl/SNWAJcxtS20zeaRPkfCWp2KgeGSfg9aYWYpW8SgjZMY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721032805; c=relaxed/simple; bh=+QDo3YxT0dkrtSvbwMsjzqNkyzaQgPIjz/eP+s5D7ms=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AVbfR2HOGGTwTU13r+X68salblwJ2ugEI37nTxoxOYaCk7PCwZsmE7HU0ik+ybkKcrrW8Hf9YTB7/nfN1cbnRCfzQjznppf/aItL77Ep/7Rv10a39OOq4j8UaTivWS85//0qQh+jMpQmyQNU0B5SOfxQ3MXEmwrGAWaABMXhfT0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oDAYPE0m; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oDAYPE0m" Received: by smtp.kernel.org (Postfix) with ESMTPS id ABA6FC4AF0A; Mon, 15 Jul 2024 08:40:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721032804; bh=+QDo3YxT0dkrtSvbwMsjzqNkyzaQgPIjz/eP+s5D7ms=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=oDAYPE0mGgVm98cPtQU2tWWzZb865UWcCmYsST9Q9E7DaWXAKM5u4eBYVtHAxWC7p 0Acdzuj4Rmd8aO5D8OiRi0dBhtJinq+HUaqb4koacFGoPTSWqd9eYewmJfnqd0yTe+ xpwnGb0gszOzNZZeJGyciBYg5n6vadgjtvLZW/e8htPDzWmgJkMuQntAuiT7Hzl3DL Wh/B3kl4ro9vjptj/sbVSgp+SPt2/BnRjl0TC2oyAuoSlBK0ei32YUwYqZfogBk+W0 96SW84fsObIpJvZMYAsXDNVQe9XWXoPaMI4DPaP6ZhZSRSxNUhwzemUMMejfKrHWxb 6a3wMU3FeIl4w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A20D5C3DA59; Mon, 15 Jul 2024 08:40:04 +0000 (UTC) From: Nikita Shubin via B4 Relay Date: Mon, 15 Jul 2024 11:38:33 +0300 Subject: [PATCH v11 29/38] ARM: dts: add Cirrus EP93XX SoC .dtsi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240715-ep93xx-v11-29-4e924efda795@maquefel.me> References: <20240715-ep93xx-v11-0-4e924efda795@maquefel.me> In-Reply-To: <20240715-ep93xx-v11-0-4e924efda795@maquefel.me> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Sverdlin , Nikita Shubin Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13-dev-e3e53 X-Developer-Signature: v=1; a=ed25519-sha256; t=1721032799; l=12048; i=nikita.shubin@maquefel.me; s=20230718; h=from:subject:message-id; bh=I+hKQEG3Gbgs42kqFIu1CKMiW24MjJIjQDdolFMCOMc=; b=Rc2ieIZg0PZgf4sag0LEcpewIhEnWzphYYyiFk6URtC2aCpQTRS94qzEPlWKMoEdAtwBk2EAzqSZ lZ1Yv9NCDjqS6IIyWQSWxojkosWZUwvVoKGNE4vaQ1rJ+xa+EL2l X-Developer-Key: i=nikita.shubin@maquefel.me; a=ed25519; pk=vqf5YIUJ7BJv3EJFaNNxWZgGuMgDH6rwufTLflwU9ac= X-Endpoint-Received: by B4 Relay for nikita.shubin@maquefel.me/20230718 with auth_id=65 X-Original-From: Nikita Shubin Reply-To: nikita.shubin@maquefel.me From: Nikita Shubin Add support for Cirrus Logic EP93XX SoC's family. Co-developed-by: Alexander Sverdlin Signed-off-by: Alexander Sverdlin Signed-off-by: Nikita Shubin --- arch/arm/boot/dts/cirrus/ep93xx.dtsi | 444 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 444 insertions(+) diff --git a/arch/arm/boot/dts/cirrus/ep93xx.dtsi b/arch/arm/boot/dts/cirru= s/ep93xx.dtsi new file mode 100644 index 000000000000..0dd1eee346ca --- /dev/null +++ b/arch/arm/boot/dts/cirrus/ep93xx.dtsi @@ -0,0 +1,444 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for Cirrus Logic systems EP93XX SoC + */ +#include +#include +#include +#include +/ { + soc: soc { + compatible =3D "simple-bus"; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + + syscon: syscon@80930000 { + compatible =3D "cirrus,ep9301-syscon", "syscon"; + reg =3D <0x80930000 0x1000>; + + #clock-cells =3D <1>; + clocks =3D <&xtali>; + + spi_default_pins: pins-spi { + function =3D "spi"; + groups =3D "ssp"; + }; + + ac97_default_pins: pins-ac97 { + function =3D "ac97"; + groups =3D "ac97"; + }; + + i2s_on_ssp_pins: pins-i2sonssp { + function =3D "i2s"; + groups =3D "i2s_on_ssp"; + }; + + i2s_on_ac97_pins: pins-i2sonac97 { + function =3D "i2s"; + groups =3D "i2s_on_ac97"; + }; + + gpio1_default_pins: pins-gpio1 { + function =3D "gpio"; + groups =3D "gpio1agrp"; + }; + + pwm1_default_pins: pins-pwm1 { + function =3D "pwm"; + groups =3D "pwm1"; + }; + + gpio2_default_pins: pins-gpio2 { + function =3D "gpio"; + groups =3D "gpio2agrp"; + }; + + gpio3_default_pins: pins-gpio3 { + function =3D "gpio"; + groups =3D "gpio3agrp"; + }; + + keypad_default_pins: pins-keypad { + function =3D "keypad"; + groups =3D "keypadgrp"; + }; + + gpio4_default_pins: pins-gpio4 { + function =3D "gpio"; + groups =3D "gpio4agrp"; + }; + + gpio6_default_pins: pins-gpio6 { + function =3D "gpio"; + groups =3D "gpio6agrp"; + }; + + gpio7_default_pins: pins-gpio7 { + function =3D "gpio"; + groups =3D "gpio7agrp"; + }; + + ide_default_pins: pins-ide { + function =3D "pata"; + groups =3D "idegrp"; + }; + + lcd_on_dram0_pins: pins-rasteronsdram0 { + function =3D "lcd"; + groups =3D "rasteronsdram0grp"; + }; + + lcd_on_dram3_pins: pins-rasteronsdram3 { + function =3D "lcd"; + groups =3D "rasteronsdram3grp"; + }; + }; + + adc: adc@80900000 { + compatible =3D "cirrus,ep9301-adc"; + reg =3D <0x80900000 0x28>; + clocks =3D <&syscon EP93XX_CLK_ADC>; + interrupt-parent =3D <&vic0>; + interrupts =3D <30>; + status =3D "disabled"; + }; + + /* + * The EP93XX expansion bus is a set of up to 7 each up to 16MB + * windows in the 256MB space from 0x50000000 to 0x5fffffff. + * But since we don't require to setup it in any way, we can + * represent it as a simple-bus. + */ + ebi: bus@80080000 { + compatible =3D "simple-bus"; + reg =3D <0x80080000 0x20>; + native-endian; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + }; + + dma0: dma-controller@80000000 { + compatible =3D "cirrus,ep9301-dma-m2p"; + reg =3D <0x80000000 0x0040>, + <0x80000040 0x0040>, + <0x80000080 0x0040>, + <0x800000c0 0x0040>, + <0x80000240 0x0040>, + <0x80000200 0x0040>, + <0x800002c0 0x0040>, + <0x80000280 0x0040>, + <0x80000340 0x0040>, + <0x80000300 0x0040>; + clocks =3D <&syscon EP93XX_CLK_M2P0>, + <&syscon EP93XX_CLK_M2P1>, + <&syscon EP93XX_CLK_M2P2>, + <&syscon EP93XX_CLK_M2P3>, + <&syscon EP93XX_CLK_M2P4>, + <&syscon EP93XX_CLK_M2P5>, + <&syscon EP93XX_CLK_M2P6>, + <&syscon EP93XX_CLK_M2P7>, + <&syscon EP93XX_CLK_M2P8>, + <&syscon EP93XX_CLK_M2P9>; + clock-names =3D "m2p0", "m2p1", + "m2p2", "m2p3", + "m2p4", "m2p5", + "m2p6", "m2p7", + "m2p8", "m2p9"; + interrupt-parent =3D <&vic0>; + interrupts =3D <7>, <8>, <9>, <10>, <11>, + <12>, <13>, <14>, <15>, <16>; + #dma-cells =3D <2>; + }; + + dma1: dma-controller@80000100 { + compatible =3D "cirrus,ep9301-dma-m2m"; + reg =3D <0x80000100 0x0040>, + <0x80000140 0x0040>; + clocks =3D <&syscon EP93XX_CLK_M2M0>, + <&syscon EP93XX_CLK_M2M1>; + clock-names =3D "m2m0", "m2m1"; + interrupt-parent =3D <&vic0>; + interrupts =3D <17>, <18>; + #dma-cells =3D <2>; + }; + + eth0: ethernet@80010000 { + compatible =3D "cirrus,ep9301-eth"; + reg =3D <0x80010000 0x10000>; + interrupt-parent =3D <&vic1>; + interrupts =3D <7>; + mdio0: mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + + gpio0: gpio@80840000 { + compatible =3D "cirrus,ep9301-gpio"; + reg =3D <0x80840000 0x04>, + <0x80840010 0x04>, + <0x80840090 0x1c>; + reg-names =3D "data", "dir", "intr"; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&vic1>; + interrupts =3D <27>; + }; + + gpio1: gpio@80840004 { + compatible =3D "cirrus,ep9301-gpio"; + reg =3D <0x80840004 0x04>, + <0x80840014 0x04>, + <0x808400ac 0x1c>; + reg-names =3D "data", "dir", "intr"; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&vic1>; + interrupts =3D <27>; + }; + + gpio2: gpio@80840008 { + compatible =3D "cirrus,ep9301-gpio"; + reg =3D <0x80840008 0x04>, + <0x80840018 0x04>; + reg-names =3D "data", "dir"; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpio2_default_pins>; + }; + + gpio3: gpio@8084000c { + compatible =3D "cirrus,ep9301-gpio"; + reg =3D <0x8084000c 0x04>, + <0x8084001c 0x04>; + reg-names =3D "data", "dir"; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpio3_default_pins>; + }; + + gpio4: gpio@80840020 { + compatible =3D "cirrus,ep9301-gpio"; + reg =3D <0x80840020 0x04>, + <0x80840024 0x04>; + reg-names =3D "data", "dir"; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpio4_default_pins>; + }; + + gpio5: gpio@80840030 { + compatible =3D "cirrus,ep9301-gpio"; + reg =3D <0x80840030 0x04>, + <0x80840034 0x04>, + <0x8084004c 0x1c>; + reg-names =3D "data", "dir", "intr"; + gpio-controller; + #gpio-cells =3D <2>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts-extended =3D <&vic0 19>, <&vic0 20>, + <&vic0 21>, <&vic0 22>, + <&vic1 15>, <&vic1 16>, + <&vic1 17>, <&vic1 18>; + }; + + gpio6: gpio@80840038 { + compatible =3D "cirrus,ep9301-gpio"; + reg =3D <0x80840038 0x04>, + <0x8084003c 0x04>; + reg-names =3D "data", "dir"; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpio6_default_pins>; + }; + + gpio7: gpio@80840040 { + compatible =3D "cirrus,ep9301-gpio"; + reg =3D <0x80840040 0x04>, + <0x80840044 0x04>; + reg-names =3D "data", "dir"; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpio7_default_pins>; + }; + + i2s: i2s@80820000 { + compatible =3D "cirrus,ep9301-i2s"; + reg =3D <0x80820000 0x100>; + #sound-dai-cells =3D <0>; + interrupt-parent =3D <&vic1>; + interrupts =3D <28>; + clocks =3D <&syscon EP93XX_CLK_I2S_MCLK>, + <&syscon EP93XX_CLK_I2S_SCLK>, + <&syscon EP93XX_CLK_I2S_LRCLK>; + clock-names =3D "mclk", "sclk", "lrclk"; + dmas =3D <&dma0 0 1>, <&dma0 0 2>; + dma-names =3D "tx", "rx"; + status =3D "disabled"; + }; + + ide: ide@800a0000 { + compatible =3D "cirrus,ep9312-pata"; + reg =3D <0x800a0000 0x38>; + interrupt-parent =3D <&vic1>; + interrupts =3D <8>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&ide_default_pins>; + status =3D "disabled"; + }; + + vic0: interrupt-controller@800b0000 { + compatible =3D "arm,pl192-vic"; + reg =3D <0x800b0000 0x1000>; + interrupt-controller; + #interrupt-cells =3D <1>; + valid-mask =3D <0x7ffffffc>; + valid-wakeup-mask =3D <0x0>; + }; + + vic1: interrupt-controller@800c0000 { + compatible =3D "arm,pl192-vic"; + reg =3D <0x800c0000 0x1000>; + interrupt-controller; + #interrupt-cells =3D <1>; + valid-mask =3D <0x1fffffff>; + valid-wakeup-mask =3D <0x0>; + }; + + keypad: keypad@800f0000 { + compatible =3D "cirrus,ep9307-keypad"; + reg =3D <0x800f0000 0x0c>; + interrupt-parent =3D <&vic0>; + interrupts =3D <29>; + clocks =3D <&syscon EP93XX_CLK_KEYPAD>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&keypad_default_pins>; + linux,keymap =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pwm0: pwm@80910000 { + compatible =3D "cirrus,ep9301-pwm"; + reg =3D <0x80910000 0x10>; + clocks =3D <&syscon EP93XX_CLK_PWM>; + #pwm-cells =3D <3>; + status =3D "disabled"; + }; + + pwm1: pwm@80910020 { + compatible =3D "cirrus,ep9301-pwm"; + reg =3D <0x80910020 0x10>; + clocks =3D <&syscon EP93XX_CLK_PWM>; + #pwm-cells =3D <3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm1_default_pins>; + status =3D "disabled"; + }; + + rtc0: rtc@80920000 { + compatible =3D "cirrus,ep9301-rtc"; + reg =3D <0x80920000 0x100>; + }; + + spi0: spi@808a0000 { + compatible =3D "cirrus,ep9301-spi"; + reg =3D <0x808a0000 0x18>; + #address-cells =3D <1>; + #size-cells =3D <0>; + interrupt-parent =3D <&vic1>; + interrupts =3D <21>; + clocks =3D <&syscon EP93XX_CLK_SPI>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi_default_pins>; + status =3D "disabled"; + }; + + timer: timer@80810000 { + compatible =3D "cirrus,ep9301-timer"; + reg =3D <0x80810000 0x100>; + interrupt-parent =3D <&vic1>; + interrupts =3D <19>; + }; + + uart0: serial@808c0000 { + compatible =3D "arm,pl011", "arm,primecell"; + reg =3D <0x808c0000 0x1000>; + arm,primecell-periphid =3D <0x00041010>; + clocks =3D <&syscon EP93XX_CLK_UART1>, <&syscon EP93XX_CLK_UART>; + clock-names =3D "uartclk", "apb_pclk"; + interrupt-parent =3D <&vic1>; + interrupts =3D <20>; + status =3D "disabled"; + }; + + uart1: uart@808d0000 { + compatible =3D "arm,primecell"; + reg =3D <0x808d0000 0x1000>; + arm,primecell-periphid =3D <0x00041010>; + clocks =3D <&syscon EP93XX_CLK_UART2>, <&syscon EP93XX_CLK_UART>; + clock-names =3D "apb:uart2", "apb_pclk"; + interrupt-parent =3D <&vic1>; + interrupts =3D <22>; + status =3D "disabled"; + }; + + uart2: uart@808b0000 { + compatible =3D "arm,primecell"; + reg =3D <0x808b0000 0x1000>; + arm,primecell-periphid =3D <0x00041010>; + clocks =3D <&syscon EP93XX_CLK_UART3>, <&syscon EP93XX_CLK_UART>; + clock-names =3D "apb:uart3", "apb_pclk"; + interrupt-parent =3D <&vic1>; + interrupts =3D <23>; + status =3D "disabled"; + }; + + usb0: usb@80020000 { + compatible =3D "generic-ohci"; + reg =3D <0x80020000 0x10000>; + interrupt-parent =3D <&vic1>; + interrupts =3D <24>; + clocks =3D <&syscon EP93XX_CLK_USB>; + status =3D "disabled"; + }; + + watchdog0: watchdog@80940000 { + compatible =3D "cirrus,ep9301-wdt"; + reg =3D <0x80940000 0x08>; + }; + }; + + xtali: oscillator { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <14745600>; + clock-output-names =3D "xtali"; + }; +}; --=20 2.43.2