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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240711-th1520-clk-v3-5-6ff17bb318fb@tenstorrent.com> References: <20240711-th1520-clk-v3-0-6ff17bb318fb@tenstorrent.com> In-Reply-To: <20240711-th1520-clk-v3-0-6ff17bb318fb@tenstorrent.com> To: Jisheng Zhang , Guo Ren , Fu Wei , Yangtao Li , Thomas Bonnefille , Emil Renner Berthing , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Drew Fustini X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1720716985; l=2932; i=dfustini@tenstorrent.com; s=20230430; h=from:subject:message-id; bh=tRjLHNA3SUuyjwpgTudoab8pZI9wG5YkzGm3OgGpM00=; b=/J1Le/i2Ub7P3mFRDRhdpUD8z6RNIFe8SaZHadbyBrIr8iwcVW+MMA9ZwLU7NYkZQFxaufvA3 4rYWM5YCrJ5AjZXjifm3Pum7SMOQhZ0ySfNAxPh953GcvtVzQG1jmgo X-Developer-Key: i=dfustini@tenstorrent.com; a=ed25519; pk=p3GKE9XFmjhwAayAHG4U108yag7V8xQVd4zJLdW0g7g= Change the clock property in the TH1520 mmc controller nodes to a clock provided by AP_SYS clock controller. Remove sdhci fixed clock reference from BeagleV Ahead and LPI4a dts. Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/d= ocs Signed-off-by: Drew Fustini --- arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 4 ---- arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi | 4 ---- arch/riscv/boot/dts/thead/th1520.dtsi | 13 +++---------- 3 files changed, 3 insertions(+), 18 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/risc= v/boot/dts/thead/th1520-beaglev-ahead.dts index 164afd18b56c..55f1ed0cb433 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -48,10 +48,6 @@ &apb_clk { clock-frequency =3D <62500000>; }; =20 -&sdhci_clk { - clock-frequency =3D <198000000>; -}; - &dmac0 { status =3D "okay"; }; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/= riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi index 1b7ede570994..762eceb415f8 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi @@ -29,10 +29,6 @@ &apb_clk { clock-frequency =3D <62500000>; }; =20 -&sdhci_clk { - clock-frequency =3D <198000000>; -}; - &dmac0 { status =3D "okay"; }; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/th= ead/th1520.dtsi index 66df04ceb3e4..ce3a0847aa9c 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -141,13 +141,6 @@ apb_clk: apb-clk-clock { #clock-cells =3D <0>; }; =20 - sdhci_clk: sdhci-clock { - compatible =3D "fixed-clock"; - clock-frequency =3D <198000000>; - clock-output-names =3D "sdhci_clk"; - #clock-cells =3D <0>; - }; - soc { compatible =3D "simple-bus"; interrupt-parent =3D <&plic>; @@ -200,7 +193,7 @@ emmc: mmc@ffe7080000 { compatible =3D "thead,th1520-dwcmshc"; reg =3D <0xff 0xe7080000 0x0 0x10000>; interrupts =3D <62 IRQ_TYPE_LEVEL_HIGH>; - clocks =3D <&sdhci_clk>; + clocks =3D <&clk CLK_EMMC_SDIO>; clock-names =3D "core"; status =3D "disabled"; }; @@ -209,7 +202,7 @@ sdio0: mmc@ffe7090000 { compatible =3D "thead,th1520-dwcmshc"; reg =3D <0xff 0xe7090000 0x0 0x10000>; interrupts =3D <64 IRQ_TYPE_LEVEL_HIGH>; - clocks =3D <&sdhci_clk>; + clocks =3D <&clk CLK_EMMC_SDIO>; clock-names =3D "core"; status =3D "disabled"; }; @@ -218,7 +211,7 @@ sdio1: mmc@ffe70a0000 { compatible =3D "thead,th1520-dwcmshc"; reg =3D <0xff 0xe70a0000 0x0 0x10000>; interrupts =3D <71 IRQ_TYPE_LEVEL_HIGH>; - clocks =3D <&sdhci_clk>; + clocks =3D <&clk CLK_EMMC_SDIO>; clock-names =3D "core"; status =3D "disabled"; }; --=20 2.34.1