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Also correct spelling error ("drive-strengh" -> "drive-strength"). Signed-off-by: Rayyan Ansari --- .../dts/qcom/qcom-apq8064-asus-nexus7-flo.dts | 4 - .../boot/dts/qcom/qcom-apq8064-cm-qs600.dts | 25 +- .../boot/dts/qcom/qcom-apq8064-ifc6410.dts | 25 +- arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi | 362 +++++++----------- .../qcom-apq8064-sony-xperia-lagan-yuga.dts | 10 +- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 34 +- 6 files changed, 172 insertions(+), 288 deletions(-) diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts b/arch= /arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts index d460743fbb94..947183992850 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-asus-nexus7-flo.dts @@ -125,8 +125,6 @@ &gsbi1 { &gsbi1_i2c { status =3D "okay"; clock-frequency =3D <200000>; - pinctrl-0 =3D <&i2c1_pins>; - pinctrl-names =3D "default"; =20 eeprom@52 { compatible =3D "atmel,24c128"; @@ -148,8 +146,6 @@ &gsbi3 { =20 &gsbi3_i2c { clock-frequency =3D <200000>; - pinctrl-0 =3D <&i2c3_pins>; - pinctrl-names =3D "default"; status =3D "okay"; =20 trackpad@10 { diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-cm-qs600.dts b/arch/arm/bo= ot/dts/qcom/qcom-apq8064-cm-qs600.dts index 671d58cc2741..178c55c1efeb 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-cm-qs600.dts @@ -188,24 +188,17 @@ &sdcc4 { }; =20 &tlmm_pinmux { - card_detect: card_detect { - mux { - pins =3D "gpio26"; - function =3D "gpio"; - bias-disable; - }; + card_detect: card-detect-state { + pins =3D "gpio26"; + function =3D "gpio"; + bias-disable; }; =20 - pcie_pins: pcie_pinmux { - mux { - pins =3D "gpio27"; - function =3D "gpio"; - }; - conf { - pins =3D "gpio27"; - drive-strength =3D <12>; - bias-disable; - }; + pcie_pins: pcie-state { + pins =3D "gpio27"; + function =3D "gpio"; + drive-strength =3D <12>; + bias-disable; }; }; =20 diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts b/arch/arm/boo= t/dts/qcom/qcom-apq8064-ifc6410.dts index ed86b24119c9..b3ff8010b149 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-ifc6410.dts @@ -321,24 +321,17 @@ &sdcc4 { }; =20 &tlmm_pinmux { - card_detect: card_detect { - mux { - pins =3D "gpio26"; - function =3D "gpio"; - bias-disable; - }; + card_detect: card-detect-state { + pins =3D "gpio26"; + function =3D "gpio"; + bias-disable; }; =20 - pcie_pins: pcie_pinmux { - mux { - pins =3D "gpio27"; - function =3D "gpio"; - }; - conf { - pins =3D "gpio27"; - drive-strength =3D <12>; - bias-disable; - }; + pcie_pins: pcie-state { + pins =3D "gpio27"; + function =3D "gpio"; + drive-strength =3D <12>; + bias-disable; }; }; =20 diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi b/arch/arm/boot/= dts/qcom/qcom-apq8064-pins.dtsi index 7c545c50847b..e53de709e9d1 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-pins.dtsi @@ -1,318 +1,218 @@ // SPDX-License-Identifier: GPL-2.0 =20 &tlmm_pinmux { - sdc4_gpios: sdc4-gpios { - pios { - pins =3D "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"; - function =3D "sdc4"; - }; - }; - - sdcc1_pins: sdcc1-pin-active { - clk { + sdcc1_default_state: sdcc1-default-state { + clk-pins { pins =3D "sdc1_clk"; - drive-strengh =3D <16>; + drive-strength =3D <16>; bias-disable; }; =20 - cmd { + cmd-pins { pins =3D "sdc1_cmd"; - drive-strengh =3D <10>; + drive-strength =3D <10>; bias-pull-up; }; =20 - data { + data-pins { pins =3D "sdc1_data"; - drive-strengh =3D <10>; + drive-strength =3D <10>; bias-pull-up; }; }; =20 - sdcc3_pins: sdcc3-pin-active { - clk { + sdcc3_default_state: sdcc3-default-state { + clk-pins { pins =3D "sdc3_clk"; - drive-strengh =3D <8>; + drive-strength =3D <8>; bias-disable; }; =20 - cmd { + cmd-pins { pins =3D "sdc3_cmd"; - drive-strengh =3D <8>; + drive-strength =3D <8>; bias-pull-up; }; =20 - data { + data-pins { pins =3D "sdc3_data"; - drive-strengh =3D <8>; + drive-strength =3D <8>; bias-pull-up; }; }; =20 - ps_hold: ps_hold { - mux { - pins =3D "gpio78"; - function =3D "ps_hold"; - }; + sdc4_default_state: sdc4-default-state { + pins =3D "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"; + function =3D "sdc4"; }; =20 - i2c1_pins: i2c1 { - mux { - pins =3D "gpio20", "gpio21"; - function =3D "gsbi1"; - }; + gsbi1_uart_2pins: gsbi1-uart-2pins-state { + pins =3D "gpio18", "gpio19"; + function =3D "gsbi1"; + }; =20 - pinconf { - pins =3D "gpio20", "gpio21"; - drive-strength =3D <16>; - bias-disable; - }; + gsbi1_uart_4pins: gsbi1-uart-4pins-state { + pins =3D "gpio18", "gpio19", "gpio20", "gpio21"; + function =3D "gsbi1"; }; =20 - i2c1_pins_sleep: i2c1_pins_sleep { - mux { - pins =3D "gpio20", "gpio21"; - function =3D "gpio"; - }; - pinconf { - pins =3D "gpio20", "gpio21"; + gsbi4_uart_pin_a: gsbi4-uart-pin-active-state { + rx-pins { + pins =3D "gpio11"; + function =3D "gsbi4"; drive-strength =3D <2>; bias-disable; }; - }; =20 - gsbi1_uart_2pins: gsbi1_uart_2pins { - mux { - pins =3D "gpio18", "gpio19"; - function =3D "gsbi1"; + tx-pins { + pins =3D "gpio10"; + function =3D "gsbi4"; + drive-strength =3D <4>; + bias-disable; }; }; =20 - gsbi1_uart_4pins: gsbi1_uart_4pins { - mux { - pins =3D "gpio18", "gpio19", "gpio20", "gpio21"; - function =3D "gsbi1"; - }; + gsbi6_uart_2pins: gsbi6-uart-2pins-state { + pins =3D "gpio14", "gpio15"; + function =3D "gsbi6"; }; =20 - i2c2_pins: i2c2 { - mux { - pins =3D "gpio24", "gpio25"; - function =3D "gsbi2"; - }; - - pinconf { - pins =3D "gpio24", "gpio25"; - drive-strength =3D <16>; - bias-disable; - }; + gsbi6_uart_4pins: gsbi6-uart-4pins-state { + pins =3D "gpio14", "gpio15", "gpio16", "gpio17"; + function =3D "gsbi6"; }; =20 - i2c2_pins_sleep: i2c2_pins_sleep { - mux { - pins =3D "gpio24", "gpio25"; - function =3D "gpio"; - }; - - pinconf { - pins =3D "gpio24", "gpio25"; - drive-strength =3D <2>; - bias-disable; - }; + gsbi7_uart_2pins: gsbi7-uart-2pins-state { + pins =3D "gpio82", "gpio83"; + function =3D "gsbi7"; }; =20 - i2c3_pins: i2c3 { - mux { - pins =3D "gpio8", "gpio9"; - function =3D "gsbi3"; - }; - - pinconf { - pins =3D "gpio8", "gpio9"; - drive-strength =3D <16>; - bias-disable; - }; + gsbi7_uart_4pins: gsbi7_uart_4pins-state { + pins =3D "gpio82", "gpio83", "gpio84", "gpio85"; + function =3D "gsbi7"; }; =20 - i2c3_pins_sleep: i2c3_pins_sleep { - mux { - pins =3D "gpio8", "gpio9"; - function =3D "gpio"; - }; - pinconf { - pins =3D "gpio8", "gpio9"; - drive-strength =3D <2>; - bias-disable; - }; + i2c1_default_state: i2c1-default-state { + pins =3D "gpio20", "gpio21"; + function =3D "gsbi1"; + drive-strength =3D <16>; + bias-disable; }; =20 - i2c4_pins: i2c4 { - mux { - pins =3D "gpio12", "gpio13"; - function =3D "gsbi4"; - }; - - pinconf { - pins =3D "gpio12", "gpio13"; - drive-strength =3D <16>; - bias-disable; - }; + i2c1_sleep_state: i2c1-sleep-state { + pins =3D "gpio20", "gpio21"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; }; =20 - i2c4_pins_sleep: i2c4_pins_sleep { - mux { - pins =3D "gpio12", "gpio13"; - function =3D "gpio"; - }; - pinconf { - pins =3D "gpio12", "gpio13"; - drive-strength =3D <2>; - bias-disable; - }; + i2c2_default_state: i2c2-default-state { + pins =3D "gpio24", "gpio25"; + function =3D "gsbi2"; + drive-strength =3D <16>; + bias-disable; }; =20 - spi5_default: spi5_default { - pinmux { - pins =3D "gpio51", "gpio52", "gpio54"; - function =3D "gsbi5"; - }; - - pinmux_cs { - function =3D "gpio"; - pins =3D "gpio53"; - }; - - pinconf { - pins =3D "gpio51", "gpio52", "gpio54"; - drive-strength =3D <16>; - bias-disable; - }; - - pinconf_cs { - pins =3D "gpio53"; - drive-strength =3D <16>; - bias-disable; - output-high; - }; + i2c2_sleep_state: i2c2-sleep-state { + pins =3D "gpio24", "gpio25"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; }; =20 - spi5_sleep: spi5_sleep { - pinmux { - function =3D "gpio"; - pins =3D "gpio51", "gpio52", "gpio53", "gpio54"; - }; - - pinconf { - pins =3D "gpio51", "gpio52", "gpio53", "gpio54"; - drive-strength =3D <2>; - bias-pull-down; - }; + i2c3_default_state: i2c3-default-state { + pins =3D "gpio8", "gpio9"; + function =3D "gsbi3"; + drive-strength =3D <16>; + bias-disable; }; =20 - i2c6_pins: i2c6 { - mux { - pins =3D "gpio16", "gpio17"; - function =3D "gsbi6"; - }; - - pinconf { - pins =3D "gpio16", "gpio17"; - drive-strength =3D <16>; - bias-disable; - }; + i2c3_sleep_state: i2c3-sleep-state { + pins =3D "gpio8", "gpio9"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; }; =20 - i2c6_pins_sleep: i2c6_pins_sleep { - mux { - pins =3D "gpio16", "gpio17"; - function =3D "gpio"; - }; - pinconf { - pins =3D "gpio16", "gpio17"; - drive-strength =3D <2>; - bias-disable; - }; + i2c4_default_state: i2c4-default-state { + pins =3D "gpio12", "gpio13"; + function =3D "gsbi4"; + drive-strength =3D <16>; + bias-disable; }; =20 - gsbi4_uart_pin_a: gsbi4-uart-pin-active-state { - rx-pins { - pins =3D "gpio11"; - function =3D "gsbi4"; - drive-strength =3D <2>; - bias-disable; - }; - - tx-pins { - pins =3D "gpio10"; - function =3D "gsbi4"; - drive-strength =3D <4>; - bias-disable; - }; + i2c4_sleep_state: i2c4-sleep-state { + pins =3D "gpio12", "gpio13"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; }; =20 - gsbi6_uart_2pins: gsbi6_uart_2pins { - mux { - pins =3D "gpio14", "gpio15"; - function =3D "gsbi6"; - }; + i2c6_default_state: i2c6-default-state { + pins =3D "gpio16", "gpio17"; + function =3D "gsbi6"; + drive-strength =3D <16>; + bias-disable; }; =20 - gsbi6_uart_4pins: gsbi6_uart_4pins { - mux { - pins =3D "gpio14", "gpio15", "gpio16", "gpio17"; - function =3D "gsbi6"; - }; + i2c6_sleep_state: i2c6-sleep-state { + pins =3D "gpio16", "gpio17"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; }; =20 - gsbi7_uart_2pins: gsbi7_uart_2pins { - mux { - pins =3D "gpio82", "gpio83"; - function =3D "gsbi7"; - }; + i2c7_default_state: i2c7-default-state { + pins =3D "gpio84", "gpio85"; + function =3D "gsbi7"; + drive-strength =3D <16>; + bias-disable; }; =20 - gsbi7_uart_4pins: gsbi7_uart_4pins { - mux { - pins =3D "gpio82", "gpio83", "gpio84", "gpio85"; - function =3D "gsbi7"; - }; + i2c7_sleep_state: i2c7-sleep-state { + pins =3D "gpio84", "gpio85"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; }; =20 - i2c7_pins: i2c7 { - mux { - pins =3D "gpio84", "gpio85"; - function =3D "gsbi7"; + spi5_default_state: spi5-default-state { + spi5-pins { + pins =3D "gpio51", "gpio52", "gpio54"; + function =3D "gsbi5"; + drive-strength =3D <16>; + bias-disable; }; =20 - pinconf { - pins =3D "gpio84", "gpio85"; + spi5-cs-pins { + pins =3D "gpio53"; + function =3D "gpio"; drive-strength =3D <16>; bias-disable; + output-high; }; }; =20 - i2c7_pins_sleep: i2c7_pins_sleep { - mux { - pins =3D "gpio84", "gpio85"; + spi5_sleep_state: spi5-sleep-state { + spi5-pins { + pins =3D "gpio51", "gpio52", "gpio53", "gpio54"; function =3D "gpio"; - }; - pinconf { - pins =3D "gpio84", "gpio85"; drive-strength =3D <2>; - bias-disable; + bias-pull-down; }; }; =20 - riva_fm_pin_a: riva-fm-active { + riva_fm_pin_a: riva-fm-active-state { pins =3D "gpio14", "gpio15"; function =3D "riva_fm"; }; =20 - riva_bt_pin_a: riva-bt-active { + riva_bt_pin_a: riva-bt-active-state { pins =3D "gpio16", "gpio17"; function =3D "riva_bt"; }; =20 - riva_wlan_pin_a: riva-wlan-active { + riva_wlan_pin_a: riva-wlan-active-state { pins =3D "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"; function =3D "riva_wlan"; =20 @@ -320,22 +220,24 @@ riva_wlan_pin_a: riva-wlan-active { bias-pull-down; }; =20 - hdmi_pinctrl: hdmi-pinctrl { - mux { - pins =3D "gpio70", "gpio71", "gpio72"; - function =3D "hdmi"; - }; - - pinconf_ddc { + hdmi_pinctrl: hdmi-pinctrl-state { + ddc-pins { pins =3D "gpio70", "gpio71"; + function =3D "hdmi"; bias-pull-up; drive-strength =3D <2>; }; =20 - pinconf_hpd { + hpd-pins { pins =3D "gpio72"; + function =3D "hdmi"; bias-pull-down; drive-strength =3D <16>; }; }; + + ps_hold_default_state: ps-hold-default-state { + pins =3D "gpio78"; + function =3D "ps_hold"; + }; }; diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064-sony-xperia-lagan-yuga.dts= b/arch/arm/boot/dts/qcom/qcom-apq8064-sony-xperia-lagan-yuga.dts index 2412aa3e3e8d..7752f07973f9 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064-sony-xperia-lagan-yuga.dts +++ b/arch/arm/boot/dts/qcom/qcom-apq8064-sony-xperia-lagan-yuga.dts @@ -373,21 +373,21 @@ &sdcc3 { cd-gpios =3D <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; =20 pinctrl-names =3D "default"; - pinctrl-0 =3D <&sdcc3_pins>, <&sdcc3_cd_pin_a>; + pinctrl-0 =3D <&sdcc3_default_state>, <&sdcc3_cd_pin_a>; =20 status =3D "okay"; }; =20 &tlmm_pinmux { - gsbi5_uart_pin_a: gsbi5-uart-pin-active { - rx { + gsbi5_uart_pin_a: gsbi5-uart-pin-active-state { + rx-pins { pins =3D "gpio52"; function =3D "gsbi5"; drive-strength =3D <2>; bias-pull-up; }; =20 - tx { + tx-pins { pins =3D "gpio51"; function =3D "gsbi5"; drive-strength =3D <4>; @@ -396,7 +396,7 @@ tx { }; =20 =20 - sdcc3_cd_pin_a: sdcc3-cd-pin-active { + sdcc3_cd_pin_a: sdcc3-cd-pin-active-state { pins =3D "gpio26"; function =3D "gpio"; =20 diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/q= com/qcom-apq8064.dtsi index 769e151747c3..00f273ffea9c 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -302,7 +302,7 @@ tlmm_pinmux: pinctrl@800000 { interrupts =3D ; =20 pinctrl-names =3D "default"; - pinctrl-0 =3D <&ps_hold>; + pinctrl-0 =3D <&ps_hold_default_state>; }; =20 sfpb_wrapper_mutex: syscon@1200000 { @@ -435,8 +435,8 @@ gsbi1_serial: serial@12450000 { =20 gsbi1_i2c: i2c@12460000 { compatible =3D "qcom,i2c-qup-v1.1.1"; - pinctrl-0 =3D <&i2c1_pins>; - pinctrl-1 =3D <&i2c1_pins_sleep>; + pinctrl-0 =3D <&i2c1_default_state>; + pinctrl-1 =3D <&i2c1_sleep_state>; pinctrl-names =3D "default", "sleep"; reg =3D <0x12460000 0x1000>; interrupts =3D ; @@ -465,8 +465,8 @@ gsbi2: gsbi@12480000 { gsbi2_i2c: i2c@124a0000 { compatible =3D "qcom,i2c-qup-v1.1.1"; reg =3D <0x124a0000 0x1000>; - pinctrl-0 =3D <&i2c2_pins>; - pinctrl-1 =3D <&i2c2_pins_sleep>; + pinctrl-0 =3D <&i2c2_default_state>; + pinctrl-1 =3D <&i2c2_sleep_state>; pinctrl-names =3D "default", "sleep"; interrupts =3D ; clocks =3D <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>; @@ -489,8 +489,8 @@ gsbi3: gsbi@16200000 { ranges; gsbi3_i2c: i2c@16280000 { compatible =3D "qcom,i2c-qup-v1.1.1"; - pinctrl-0 =3D <&i2c3_pins>; - pinctrl-1 =3D <&i2c3_pins_sleep>; + pinctrl-0 =3D <&i2c3_default_state>; + pinctrl-1 =3D <&i2c3_sleep_state>; pinctrl-names =3D "default", "sleep"; reg =3D <0x16280000 0x1000>; interrupts =3D ; @@ -528,8 +528,8 @@ gsbi4_serial: serial@16340000 { =20 gsbi4_i2c: i2c@16380000 { compatible =3D "qcom,i2c-qup-v1.1.1"; - pinctrl-0 =3D <&i2c4_pins>; - pinctrl-1 =3D <&i2c4_pins_sleep>; + pinctrl-0 =3D <&i2c4_default_state>; + pinctrl-1 =3D <&i2c4_sleep_state>; pinctrl-names =3D "default", "sleep"; reg =3D <0x16380000 0x1000>; interrupts =3D ; @@ -565,8 +565,8 @@ gsbi5_spi: spi@1a280000 { compatible =3D "qcom,spi-qup-v1.1.1"; reg =3D <0x1a280000 0x1000>; interrupts =3D ; - pinctrl-0 =3D <&spi5_default>; - pinctrl-1 =3D <&spi5_sleep>; + pinctrl-0 =3D <&spi5_default_state>; + pinctrl-1 =3D <&spi5_sleep_state>; pinctrl-names =3D "default", "sleep"; clocks =3D <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>; clock-names =3D "core", "iface"; @@ -599,8 +599,8 @@ gsbi6_serial: serial@16540000 { =20 gsbi6_i2c: i2c@16580000 { compatible =3D "qcom,i2c-qup-v1.1.1"; - pinctrl-0 =3D <&i2c6_pins>; - pinctrl-1 =3D <&i2c6_pins_sleep>; + pinctrl-0 =3D <&i2c6_default_state>; + pinctrl-1 =3D <&i2c6_sleep_state>; pinctrl-names =3D "default", "sleep"; reg =3D <0x16580000 0x1000>; interrupts =3D ; @@ -635,8 +635,8 @@ gsbi7_serial: serial@16640000 { =20 gsbi7_i2c: i2c@16680000 { compatible =3D "qcom,i2c-qup-v1.1.1"; - pinctrl-0 =3D <&i2c7_pins>; - pinctrl-1 =3D <&i2c7_pins_sleep>; + pinctrl-0 =3D <&i2c7_default_state>; + pinctrl-1 =3D <&i2c7_sleep_state>; pinctrl-names =3D "default", "sleep"; reg =3D <0x16680000 0x1000>; interrupts =3D ; @@ -945,7 +945,7 @@ sdcc4: mmc@121c0000 { dmas =3D <&sdcc4bam 2>, <&sdcc4bam 1>; dma-names =3D "tx", "rx"; pinctrl-names =3D "default"; - pinctrl-0 =3D <&sdc4_gpios>; + pinctrl-0 =3D <&sdc4_default_state>; }; =20 sdcc4bam: dma-controller@121c2000 { @@ -962,7 +962,7 @@ sdcc1: mmc@12400000 { status =3D "disabled"; compatible =3D "arm,pl18x", "arm,primecell"; pinctrl-names =3D "default"; - pinctrl-0 =3D <&sdcc1_pins>; + pinctrl-0 =3D <&sdcc1_default_state>; arm,primecell-periphid =3D <0x00051180>; reg =3D <0x12400000 0x2000>; interrupts =3D ; --=20 2.45.2