From nobody Thu Sep 19 23:18:46 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E15DF1527A7 for ; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; cv=none; b=J0xW1bKPoDI+IeCnbT/sZ5VRk0ITaeLXKBfh6lq3tO0gouQzAU5IilatCE24atRAcfVXXkTn+AW28qiHWCiC9b4gEXikeo2DopylDVaeeFv+MJ7TOjCi4oCUQMaHZ4OOALvFVrKumF4IYEvUsVVr7Ae3YG78SgwjGz8DsKHXY74= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; c=relaxed/simple; bh=tfabwBvvONPi6G1imBOAg7bICWXSe8zF8QtpBuR5L0s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gVG5qoAIJmxhE+7KDSGTZGpSO9ah2VyCUljlCjELMLe9naq90glAIoKQrc/Jp/K+cBieBef7qIfaOyLimXw3lHwOg8VwRrwp9b/xq3KSCiowKzsWPit10py6KE+Uhy3KNuK/CxT3xh05tdSowlMYoof2MlR2k6KLMJnfRjlTqCI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fE8DpEo7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fE8DpEo7" Received: by smtp.kernel.org (Postfix) with ESMTPS id 91461C32786; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720601574; bh=tfabwBvvONPi6G1imBOAg7bICWXSe8zF8QtpBuR5L0s=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=fE8DpEo7oLB67fr9MBZkFR7jZWWurjdqEd2CnObxrdZLhQGrZmvDrNBa0w6lhpSlX XcD4l1+t3t0Rx8tFhk/YrsrXhG6jO+BhbaEd9sfy5j5qAwmPVw2TYrbp6zaF3xGc1H Wk6fKPlGcNp6+XfMe2P0wXAB7OJFberhsVZaOYZP6p8+SOq+XY96A1zjl8BpJEqDoW jsP1fK19Y6JGD7A2FOAXSzq9JIgRwgLRHXcUKjXH5S9uikH+DSw8dQ21G3lrEWJwKL QHrUOrwXJ6KYhYpIw3QfAi3LUvkuJLI4jePJK5uU5ovJkeD29AknHWms1pKcY/yXGY G7hrOke6BHopg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 805B0C3DA45; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 10 Jul 2024 16:52:51 +0800 Subject: [PATCH v3 1/5] drm/mediatek: Support "None" blending in OVL Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240710-alpha-blending-v3-1-289c187f9c6f@mediatek.com> References: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> In-Reply-To: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , CK Hu , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1720601573; l=1452; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=XPDvZ7xzyMMnOIwBspXj+lmld62ksCxAgrZn9GTIqIg=; b=HsOsrqhmRFl9fOXtcJXMLvv7rJjJpW6kf0KLPrSnRxb0hCnapq32yLAZm87y5QwTs/neDBkI/ RNVEsgjQwWGClW02cW487yVZf0rmheO51TuYbL+5AP8CYBueAfgYWIr X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung Reply-To: shawn.sung@mediatek.com From: Hsiao Chien Sung Support "None" alpha blending mode on MediaTek's chips. Reviewed-by: CK Hu Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/medi= atek/mtk_disp_ovl.c index 9d6d9fd8342e..add671c38613 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -434,6 +434,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned = int idx, unsigned int fmt =3D pending->format; unsigned int offset =3D (pending->y << 16) | pending->x; unsigned int src_size =3D (pending->height << 16) | pending->width; + unsigned int blend_mode =3D state->base.pixel_blend_mode; unsigned int ignore_pixel_alpha =3D 0; unsigned int con; bool is_afbc =3D pending->modifier !=3D DRM_FORMAT_MOD_LINEAR; @@ -463,7 +464,8 @@ void mtk_ovl_layer_config(struct device *dev, unsigned = int idx, * For RGB888 related formats, whether CONST_BLD is enabled or not won't * affect the result. Therefore we use !has_alpha as the condition. */ - if (state->base.fb && !state->base.fb->format->has_alpha) + if ((state->base.fb && !state->base.fb->format->has_alpha) || + blend_mode =3D=3D DRM_MODE_BLEND_PIXEL_NONE) ignore_pixel_alpha =3D OVL_CONST_BLEND; =20 if (pending->rotation & DRM_MODE_REFLECT_Y) { --=20 2.43.0 From nobody Thu Sep 19 23:18:46 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC41F176254 for ; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; cv=none; b=M21oZ5qlVcloIbqquozwldR0JAis2gRogDyZuDTenDAxi1RFAsuMt0kv9bEN4kkWfV7qFdKqm1pZOQyBmiX+XoPXLDsVG2H3UevQGgi+qlnVIle7TfyWLerHfYQd/ZHqmZS2PtKqXuTM2fmb91oOAgMbuiW8ddYEdbi60ifqcNY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; c=relaxed/simple; bh=/Qr7i785NyZoohBvA3+3RT0TBw/MYaFLTRvo1jxRrWk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RGHa7Vs1k6JQcfG/R7oo8CDr4p+rxjWUxYHCeJsSHfGrtCyVPf/ybKfS1cm9qwyhFP4+38VHwK1UYRnybO5K+3Q5VUhYwABvewTvkCvoGPfnpJkoynAyZSWIso4e1EQBRYgz7dP8fUo/H77y9OwFg1TiUiZFbxK5TGs8g2QdQR4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=T45LtMP5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="T45LtMP5" Received: by smtp.kernel.org (Postfix) with ESMTPS id A075FC4AF0A; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720601574; bh=/Qr7i785NyZoohBvA3+3RT0TBw/MYaFLTRvo1jxRrWk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=T45LtMP5wRsE5Ej0WKRR9LkjyAmoyKz5/rduzGT/jyLgqFG1r/2WXEG9uyJmp5BIz dYg02tMV8lN/bGok++PrQ8w3gjibm9fkWwal9o5L2B1j3Zpm9Uuar/IE2FotIkcOA/ Pd/Wmvx8A1JkgEteg3jrvBUNuNEmj9xu8p7Uuu/HbP9tc7PGNE85wg27KAWahpGtXf 1I4X0xmbBJtPqYw8pNSf+f8LbUWSEO6UeD1xrfaVBQ0kxScIPsLS4Ob7qVLvYmE6N2 U7+lyn7RcZYtThjjJ9PidlKz7/Vdz0yiGnegm27fG6AiXOZ/MsPv6epuXXcz5ZtP8L inORK0XAq18hg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B03AC3DA4A; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 10 Jul 2024 16:52:52 +0800 Subject: [PATCH v3 2/5] drm/mediatek: Support "None" blending in Mixer Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240710-alpha-blending-v3-2-289c187f9c6f@mediatek.com> References: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> In-Reply-To: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1720601573; l=1081; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=NVAbOi4mzHiTnH39+TnJjdV+FkeJtbkfCIlftGcvapk=; b=UlEWkcPuj+I5gioedwm26FdRkzB4Ci1DkJbei4KhGpz+0voJUedCYLzEwZnsCPWsQzWjc593Z vwS+slcoeYLB7huq8B+wvfVNiu/Qpklx8a+X1eZub8aYT66+0AXTyg/ X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung Reply-To: shawn.sung@mediatek.com From: Hsiao Chien Sung Support "None" alpha blending mode on MediaTek's chips. Signed-off-by: Hsiao Chien Sung Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_ethdr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediate= k/mtk_ethdr.c index 9dfd13d32dfa..80ccdad3741b 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 MediaTek Inc. */ =20 +#include #include #include #include @@ -175,7 +176,8 @@ void mtk_ethdr_layer_config(struct device *dev, unsigne= d int idx, alpha_con |=3D state->base.alpha & MIXER_ALPHA; } =20 - if (state->base.fb && !state->base.fb->format->has_alpha) { + if ((state->base.fb && !state->base.fb->format->has_alpha) || + state->base.pixel_blend_mode =3D=3D DRM_MODE_BLEND_PIXEL_NONE) { /* * Mixer doesn't support CONST_BLD mode, * use a trick to make the output equivalent --=20 2.43.0 From nobody Thu Sep 19 23:18:46 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC3D216DEDA for ; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; cv=none; b=fLJA3AXI4hD9a4OuBUq4v8qV5byAstCx3R/cbyqTbA51fL4d5bk3Rhw54CxK6L094pZLZwGDPdiM+4047+ybY7suZGriabOBE8Cpbc+ovYPyN8bn7+Q4wVzQVCTh7ZjXXVXJsDWU8kbAWuvKIlh2mWEby4fc9EjzzwgZ5krusm0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; c=relaxed/simple; bh=Z3rw5iK5CWgQLQ9VFjjvq460MP3tcbVilCNqTAWvdUE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=bxPliyjIh1s7GOru7IK628J6s/GUorM2aeN5l/HuLgASAiTiIfJXTRJHfPkHxf7FyavxeEcoMaGrrgCdpGtFkXotgLaw5EHD1/cJXk1+veR0ETx/7iImFulq7YZwHTvVLpKPoeSWrfLxVScT2z/Qb1h9spp+9JGbNvv2oxN/Ziw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OJoqW5Zk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OJoqW5Zk" Received: by smtp.kernel.org (Postfix) with ESMTPS id A4343C4AF07; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720601574; bh=Z3rw5iK5CWgQLQ9VFjjvq460MP3tcbVilCNqTAWvdUE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=OJoqW5ZkqkY/1xXOsqoo5pHqNNK/kCo444gzcoVYrCMsc4L+a0c/tuU/dbF5j6RJh LSg7OFOyCZeC2cwvs+sVDALkmfB6QF8Te5I5d/I4HH4wqP7vnQhwq8QV6wKEHSMLFy bIXQv9Ams2i7MVKMQFVPcZ+Kid242yUdoTFk6bcPNFiYvIhLeOaVm+tUVe/suZe9us VVE40jD6YhXCucLEqdl6g/zoiwlnKIuyrXmOO3yfoSdO5wciXpBiybg3C+vUpkT8iK K0dUY9FVV7WhLIJAKIl0T+UkvV4ndFIn8yZE9E6OHtUG8HhyLxNh08AbrlyOkAJeSr wavDxWktVqeSw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9579CC3DA49; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 10 Jul 2024 16:52:53 +0800 Subject: [PATCH v3 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240710-alpha-blending-v3-3-289c187f9c6f@mediatek.com> References: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> In-Reply-To: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , Hsiao Chien Sung , CK Hu X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1720601573; l=3842; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=HXrXvrv6JMwYLM8mVe79fCqiqkK/QRt/Mduzl1YEBDY=; b=9wFFqBRGVnomHDlyL8UPrd6VV2budicRjZQlJ16rnmmxFhuUksvCxa7RMrEV9MaNObV8uqK3/ B2xHIh+SlsHC1toAnM7M4Hiz7VfTs4OG5XaMQuuGX7n2ZLGizU6lLaW X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung Reply-To: shawn.sung@mediatek.com From: Hsiao Chien Sung Support "Pre-multiplied" alpha blending mode on in OVL. Before this patch, only the "coverage" mode is supported. Signed-off-by: Hsiao Chien Sung Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +++++++++++++++++++++++++----= --- 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/medi= atek/mtk_disp_ovl.c index add671c38613..89b439dcf3a6 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -56,8 +56,12 @@ #define GMC_THRESHOLD_HIGH ((1 << GMC_THRESHOLD_BITS) / 4) #define GMC_THRESHOLD_LOW ((1 << GMC_THRESHOLD_BITS) / 8) =20 +#define OVL_CON_CLRFMT_MAN BIT(23) #define OVL_CON_BYTE_SWAP BIT(24) -#define OVL_CON_MTX_YUV_TO_RGB (6 << 16) + +/* OVL_CON_RGB_SWAP works only if OVL_CON_CLRFMT_MAN is enabled */ +#define OVL_CON_RGB_SWAP BIT(25) + #define OVL_CON_CLRFMT_RGB (1 << 12) #define OVL_CON_CLRFMT_ARGB8888 (2 << 12) #define OVL_CON_CLRFMT_RGBA8888 (3 << 12) @@ -65,6 +69,11 @@ #define OVL_CON_CLRFMT_BGRA8888 (OVL_CON_CLRFMT_ARGB8888 | OVL_CON_BYTE_SW= AP) #define OVL_CON_CLRFMT_UYVY (4 << 12) #define OVL_CON_CLRFMT_YUYV (5 << 12) +#define OVL_CON_MTX_YUV_TO_RGB (6 << 16) +#define OVL_CON_CLRFMT_PARGB8888 ((3 << 12) | OVL_CON_CLRFMT_MAN) +#define OVL_CON_CLRFMT_PABGR8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_RGB_S= WAP) +#define OVL_CON_CLRFMT_PBGRA8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_BYTE_= SWAP) +#define OVL_CON_CLRFMT_PRGBA8888 (OVL_CON_CLRFMT_PABGR8888 | OVL_CON_BYTE_= SWAP) #define OVL_CON_CLRFMT_RGB565(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \ 0 : OVL_CON_CLRFMT_RGB) #define OVL_CON_CLRFMT_RGB888(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \ @@ -377,7 +386,8 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int= idx, DISP_REG_OVL_RDMA_CTRL(idx)); } =20 -static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int= fmt) +static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int= fmt, + unsigned int blend_mode) { /* The return value in switch "MEM_MODE_INPUT_FORMAT_XXX" * is defined in mediatek HW data sheet. @@ -398,22 +408,30 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_o= vl *ovl, unsigned int fmt) case DRM_FORMAT_RGBA8888: case DRM_FORMAT_RGBX1010102: case DRM_FORMAT_RGBA1010102: - return OVL_CON_CLRFMT_RGBA8888; + return blend_mode =3D=3D DRM_MODE_BLEND_COVERAGE ? + OVL_CON_CLRFMT_RGBA8888 : + OVL_CON_CLRFMT_PRGBA8888; case DRM_FORMAT_BGRX8888: case DRM_FORMAT_BGRA8888: case DRM_FORMAT_BGRX1010102: case DRM_FORMAT_BGRA1010102: - return OVL_CON_CLRFMT_BGRA8888; + return blend_mode =3D=3D DRM_MODE_BLEND_COVERAGE ? + OVL_CON_CLRFMT_BGRA8888 : + OVL_CON_CLRFMT_PBGRA8888; case DRM_FORMAT_XRGB8888: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_XRGB2101010: case DRM_FORMAT_ARGB2101010: - return OVL_CON_CLRFMT_ARGB8888; + return blend_mode =3D=3D DRM_MODE_BLEND_COVERAGE ? + OVL_CON_CLRFMT_ARGB8888 : + OVL_CON_CLRFMT_PARGB8888; case DRM_FORMAT_XBGR8888: case DRM_FORMAT_ABGR8888: case DRM_FORMAT_XBGR2101010: case DRM_FORMAT_ABGR2101010: - return OVL_CON_CLRFMT_ABGR8888; + return blend_mode =3D=3D DRM_MODE_BLEND_COVERAGE ? + OVL_CON_CLRFMT_ABGR8888 : + OVL_CON_CLRFMT_PABGR8888; case DRM_FORMAT_UYVY: return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB; case DRM_FORMAT_YUYV: @@ -453,7 +471,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned = int idx, return; } =20 - con =3D ovl_fmt_convert(ovl, fmt); + con =3D ovl_fmt_convert(ovl, fmt, blend_mode); if (state->base.fb) { con |=3D OVL_CON_AEN; con |=3D state->base.alpha & OVL_CON_ALPHA; --=20 2.43.0 From nobody Thu Sep 19 23:18:46 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1FC93176FD8 for ; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; cv=none; b=p/cco9aDbxwIR2qcGNwGTH4dL9ndxS78TeokNFhlGnAteUGL6tSk0wUYJPia08xnQBwXKUY2iuhRtSThDwb4CsyJbiy7Wox8wmvUP2bpE4YYHqgzUAwJiZub56JiRDF+RoDwHYSoQfJjkEGW2YdaYebe4SBwZv1+pJK+ePhddfI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; c=relaxed/simple; bh=FrXpXFM8hU8nJEtAJsJHGV8jQY/M8JZ5BXMOtazVLvA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=f9AmJm6mENKwV7w2gHZeu7yRwKNJt/CiP2e7bGKQgR/A8iysVjaQdqcZpHx39RdjS09g4r4GHPk2doJ13Exq5fXg8yJb0bzLvItqQp0Pl7/qws0SizsVlmYrWDYAtffsJZY9qi98oD7lWH7Ly1U2B0Mm68i3Q+QmwdD5JwZn500= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=l0GX4PX7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="l0GX4PX7" Received: by smtp.kernel.org (Postfix) with ESMTPS id B2B2BC4AF0E; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720601574; bh=FrXpXFM8hU8nJEtAJsJHGV8jQY/M8JZ5BXMOtazVLvA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=l0GX4PX7znoPepBB/eqfX0FErtG/Km5pzGj2aimvq14iAYS8M7JLt8k1B13TPD8ST aWf1MJ25RYQPblXbZPepj6loGWiKQq39JnRKPvGsC68Mf9GC6EZIMagRl98jys/esd xHSZbLLHNvNTQG/6BT/e+R2itwZW5ytEkKI7WH3FhCHirkdLGYBIz6upavSWiZisVW lJaSgcxD/k20aO4ng9w/i9lktrYpSEKCigQCTtsUMYmfENmMgJXFVcdrmcb2Crpz7m g+ESU2m7SOqA7nmkN1RXLiTv9z6aJ1M0hGz/Yu0W1zuOu/H2SRSWMP3kAD2Pl7X/4b nBGHem6IxXDfA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA77EC3DA42; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 10 Jul 2024 16:52:54 +0800 Subject: [PATCH v3 4/5] drm/mediatek: Support "Pre-multiplied" blending in Mixer Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240710-alpha-blending-v3-4-289c187f9c6f@mediatek.com> References: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> In-Reply-To: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1720601573; l=2211; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=L3aSZMNI/5e4YMPf4nqEmkejhrP0vtCut0YLE0pQ+qs=; b=GBrebECj+Bdc0Q3tzu4OcJAT8LCNRrNQcNpkvIuERupd7hPn8Tp7Ac47/Hr3MZXSkC8n9BFH6 O723/oqqfuuB3px3lxb9nHhgz3fuVpcxdRhbJu84VXRrc/GZazok6uY X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung Reply-To: shawn.sung@mediatek.com From: Hsiao Chien Sung Support "Pre-multiplied" alpha blending mode in Mixer. Before this patch, only the coverage mode is supported. To replace the default setting that is set in mtk_ethdr_config(), we change mtk_ddp_write_mask() to mtk_ddp_write(), and this change will also reset the NON_PREMULTI_SOURCE bit that was assigned in mtk_ethdr_config(). Therefore, we must still set NON_PREMULTI_SOURCE bit if the blend mode is not DRM_MODE_BLEND_PREMULTI. Signed-off-by: Hsiao Chien Sung Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_ethdr.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediate= k/mtk_ethdr.c index 80ccdad3741b..d1d9cf8b10e1 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -36,6 +36,7 @@ #define MIX_SRC_L0_EN BIT(0) #define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n)) #define NON_PREMULTI_SOURCE (2 << 12) +#define PREMULTI_SOURCE (3 << 12) #define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n)) #define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n)) #define MIX_FUNC_DCM0 0x120 @@ -176,6 +177,11 @@ void mtk_ethdr_layer_config(struct device *dev, unsign= ed int idx, alpha_con |=3D state->base.alpha & MIXER_ALPHA; } =20 + if (state->base.pixel_blend_mode =3D=3D DRM_MODE_BLEND_PREMULTI) + alpha_con |=3D PREMULTI_SOURCE; + else + alpha_con |=3D NON_PREMULTI_SOURCE; + if ((state->base.fb && !state->base.fb->format->has_alpha) || state->base.pixel_blend_mode =3D=3D DRM_MODE_BLEND_PIXEL_NONE) { /* @@ -193,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigne= d int idx, mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq= _base, mixer->regs, MIX_L_SRC_SIZE(idx)); mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC= _OFFSET(idx)); - mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, M= IX_L_SRC_CON(idx), - 0x1ff); + mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_= SRC_CON(idx)); mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MI= X_SRC_CON, BIT(idx)); } --=20 2.43.0 From nobody Thu Sep 19 23:18:46 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4371F17B02C for ; Wed, 10 Jul 2024 08:52:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; cv=none; b=BkOGnFwyTZxDGEWXzYG2UGnjsHX6DUnHhKnHOKOoS3jckDbmBdoLVxHXKlDusWyE9GcyKFqus+mSBOw+6jH7/IcFYZP19kklxjNdvHtS5eDexIJ87hSjW6EqJgRBADWSBhX6zyr/JrT1+M+81Xy2bvXdUJveXIgiwgX8KL+wa3E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720601575; c=relaxed/simple; bh=fyYXOHu9fHp+yDLi4tjopWasn0OOj6F3xVVYEta73ZQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QcmIMcbvo0dfo0r4D+n9H2hXNZivhQ1booeUOLe3c18w3mQKY0gfg3zXlq1wDQ2PVJ1P8mjcwd2w/K7pMa8g4c6lZaNfVsByUosQvnP/4ldkPrMz0AKB6r0TFOc6W1snuTaIq8gPDRjoMvROM8A9jHt5ecyILTweb4by67zr118= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=agMy0ZvP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="agMy0ZvP" Received: by smtp.kernel.org (Postfix) with ESMTPS id C59D8C4AF10; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720601574; bh=fyYXOHu9fHp+yDLi4tjopWasn0OOj6F3xVVYEta73ZQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=agMy0ZvPA9AgNZn1oouu2BL7h3fSH1dC8oL5gaXTLb8jDdc/L42xSzg+NrzwpoUUW YdabgmkExMiNXy91Ea3vTUyGEsWCAYoA3sqOOWIKG4sQyXHDKyrvkGjnBqQe5qjQtN 7p8ut5y5CI8kU3wr0hKevB9DD26v7OlgJdcwHG1Unkb7TOldNZ01vnFEc2rBOiJZZy AG+WqHyKIOHS1vP6M0AJ8C7TOSOQYWSRT1SxjBXZHJkibj8T9P3UtLo+U8eBZfji3l YeI1WtHI9mHaQK/VXMP/OolrCaxWW544ZB1rXEqc17aYcJSd1GV4GG0doP6Hbt+jLc DAhFACn2Fj50g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDA44C3DA45; Wed, 10 Jul 2024 08:52:54 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 10 Jul 2024 16:52:55 +0800 Subject: [PATCH v3 5/5] drm/mediatek: Support alpha blending in display driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240710-alpha-blending-v3-5-289c187f9c6f@mediatek.com> References: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> In-Reply-To: <20240710-alpha-blending-v3-0-289c187f9c6f@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , CK Hu , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1720601573; l=2210; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=NXMVY+5up48Xsv5+9pKY3kYmUYHXnlx5rItB6cJy0f4=; b=g2exBNCESLyv0OqJnjsb6aEiZ7/B0/C+zT6GweHyHS0nO0LEBQ6E0tfIYh3ix4JSSOu48bEH2 rlbJA5vUiPpA+rpTx5lzAlHRI6UtPp/+0gK9zVNnmvBcw/enxuJI6jE X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung Reply-To: shawn.sung@mediatek.com From: Hsiao Chien Sung Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by adding correct blend mode property when the planes init. Before this patch, only the "Coverage" mode (default) is supported. For more information, there are three pixel blend modes in DRM driver: "None", "Pre-multiplied", and "Coverage". To understand the difference between these modes, let's take a look at the following two approaches to do alpha blending: 1. Straight: dst.RGB =3D src.RGB * src.A + dst.RGB * (1 - src.A) This is straightforward and easy to understand, when the source layer is compositing with the destination layer, it's alpha will affect the result. This is also known as "post-multiplied", or "Coverage" mode. 2. Pre-multiplied: dst.RGB =3D src.RGB + dst.RGB * (1 - src.A) Since the source RGB have already multiplied its alpha, only destination RGB need to multiply it. This is the "Pre-multiplied" mode in DRM. For the "None" blend mode in DRM, it means the pixel alpha is ignored when compositing the layers, only the constant alpha for the composited layer will take effects. Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_plane.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c b/drivers/gpu/drm/mediate= k/mtk_plane.c index 1723d4333f37..5bf757a3ef20 100644 --- a/drivers/gpu/drm/mediatek/mtk_plane.c +++ b/drivers/gpu/drm/mediatek/mtk_plane.c @@ -346,6 +346,17 @@ int mtk_plane_init(struct drm_device *dev, struct drm_= plane *plane, DRM_INFO("Create rotation property failed\n"); } =20 + err =3D drm_plane_create_alpha_property(plane); + if (err) + DRM_ERROR("failed to create property: alpha\n"); + + err =3D drm_plane_create_blend_mode_property(plane, + BIT(DRM_MODE_BLEND_PREMULTI) | + BIT(DRM_MODE_BLEND_COVERAGE) | + BIT(DRM_MODE_BLEND_PIXEL_NONE)); + if (err) + DRM_ERROR("failed to create property: blend_mode\n"); + drm_plane_helper_add(plane, &mtk_plane_helper_funcs); =20 return 0; --=20 2.43.0