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Tue, 09 Jul 2024 13:39:46 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 469DdjEq019159 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 9 Jul 2024 13:39:45 GMT Received: from tengfan-gv.ap.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 9 Jul 2024 06:39:39 -0700 From: Tengfei Fan Date: Tue, 9 Jul 2024 21:39:29 +0800 Subject: [PATCH v2] dt-bindings: arm-smmu: Document QCS9100 SMMU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20240709-document_qcs9100_smmu_compatible-v2-1-599161b7d5c8@quicinc.com> X-B4-Tracking: v=1; b=H4sIAJA9jWYC/zXNQQ6DIBRF0a0YxsV8sFbsqPtoDKGI+pMKCmjaG PdeNOnwvMG7GwnGownknm3EmxUDOpvALxnRg7K9odgmEw78ChXUtHV6GY2NctahZgAyjOMitRs nFfH1NlSU/FapVhcCapJuJm86/JyJZ5M8YIjOf8/iyo71f14AL0UJOWcVBxCU0XlBLaOxfafs4 wBanacWafZ9/wGa9Y2RvAAAAA== To: Will Deacon , Robin Murphy , "Joerg Roedel" , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , , Tengfei Fan X-Mailer: b4 0.15-dev-a66ce X-Developer-Signature: v=1; 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QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p platform use non-SCMI resource. In the future, the SA8775p platform will move to use SCMI resources and it will have new sa8775p-related device tree. Consequently, introduce "qcom,qcs9100-smmu-500" to describe non-SCMI based SMMU. Signed-off-by: Tengfei Fan --- Introduce support for the QCS9100 SoC device tree (DTSI) and the QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p. While the QCS9100 platform is still in the early design stage, the QCS9100 RIDE board is identical to the SA8775p RIDE board, except it mounts the QCS9100 SoC instead of the SA8775p SoC. The QCS9100 SoC DTSI is directly renamed from the SA8775p SoC DTSI, and all the compatible strings will be updated from "SA8775p" to "QCS9100". The QCS9100 device tree patches will be pushed after all the device tree bindings and device driver patches are reviewed. The final dtsi will like: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-3-quic_tengfan= @quicinc.com/ The detailed cover letter reference: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan= @quicinc.com/ --- Changes in v2: - Split huge patch series into different patch series according to subsytems - Update patch commit message prevous disscussion here: [1] v1: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic= _tengfan@quicinc.com/ --- Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Docume= ntation/devicetree/bindings/iommu/arm,smmu.yaml index 5c130cf06a21..82b7e1d40ce0 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -36,6 +36,7 @@ properties: items: - enum: - qcom,qcm2290-smmu-500 + - qcom,qcs9100-smmu-500 - qcom,qdu1000-smmu-500 - qcom,sa8775p-smmu-500 - qcom,sc7180-smmu-500 @@ -84,6 +85,7 @@ properties: items: - enum: - qcom,qcm2290-smmu-500 + - qcom,qcs9100-smmu-500 - qcom,sa8775p-smmu-500 - qcom,sc7280-smmu-500 - qcom,sc8280xp-smmu-500 @@ -385,6 +387,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-smmu-500 - qcom,sa8775p-smmu-500 - qcom,sc7280-smmu-500 - qcom,sc8280xp-smmu-500 --- base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233 change-id: 20240709-document_qcs9100_smmu_compatible-85267adc3809 Best regards, --=20 Tengfei Fan