From nobody Tue Dec 16 19:42:24 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 972BA13BC0B; Wed, 3 Jul 2024 08:48:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719996518; cv=none; b=hDuX4fTMZYnOJduvWr/60gEwOABbOTDvxOwkVE5HBHL6awRYRq4zZBzTMhM8iAfTKy9YHPJzwHgkisGGS09w1yoJgJXW3W2qumJ/PHplIy2aMPgyzBdUO4oI1VJBBMEmIxabWnFr4YgX2caW+jIg8yIjVcK5qmSSHvyLgsUTvLk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719996518; c=relaxed/simple; bh=z62RBtJdUWVJAzwa/Aeq8wYi4651I8agle+ZMpscrsI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=hxXnKzWvQLhIWfNMASJDrCinj8kRWvf71iD8TPiWk2gWMRECTZ/NQNzIaTzokd8XoBcNeSXgb1pw1q0TC0DYpkmvqxqXEBMy6QsN0hvHxVtzmxYlG8smAerqqn6dfybM65rSnQOMyBMr+xrQJUNj8DDAzmveqmtLnU62It35oC8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=fail smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=CF72EWJZ; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="CF72EWJZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719996516; x=1751532516; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z62RBtJdUWVJAzwa/Aeq8wYi4651I8agle+ZMpscrsI=; b=CF72EWJZf9GheIzvWVZWX7gWGjXMvR1/gn2V1LwWlryFc2jQ20n7UA9M aKzsL4tqPQq+gtNG83lN7o/4I7333b7tUCHAXH4azk0mpmst/J4WM92Xu gOGDApLTF2tHLIxhFPxFN0Cy01rW+03DLwNkJRs9J7tYedhGHOZHrghL0 VJ/FS/z5Uou58K+IwiVNkUF/ak585gU6Lwo04HxMXvuYdwO1o+CtjWFjJ szylYEMsy3p86K8DbddAjyLZHuZbKzdXxk6A7SfHFHzLGw6Xj8PGOIQGn 9NXxoV3CACyoxOrRR7KQHCMMLq0DMV02tzWy9JGNaWdJwwqXLquhoyQgE g==; X-CSE-ConnectionGUID: s71X572eQVinIeDMsyDqRg== X-CSE-MsgGUID: 9JW94tPrRUmMAdhDudLbuA== X-IronPort-AV: E=Sophos;i="6.09,181,1716274800"; d="scan'208";a="196193650" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 03 Jul 2024 01:48:29 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 3 Jul 2024 01:48:02 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Wed, 3 Jul 2024 01:47:59 -0700 From: Andrei Simion To: , , , , , , , , CC: , , , , Claudiu Beznea , Andrei Simion Subject: [PATCH v4 1/3] eeprom: at24: Add support for Microchip 24AA025E48/24AA025E64 EEPROMs Date: Wed, 3 Jul 2024 11:47:02 +0300 Message-ID: <20240703084704.197697-2-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240703084704.197697-1-andrei.simion@microchip.com> References: <20240703084704.197697-1-andrei.simion@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Add "microchip,24aa025e48", "microchip,24aa025e64" compatible for the usage w/ 24AA025E{48, 64} type of EEPROMs where "24aa025e48" stands for EUI-48 address and "24aa025e64" stands for EUI-64 address. Signed-off-by: Claudiu Beznea [andrei.simion@microchip.com: Use AT24_DATA_CHIP with AT24_FLAG_READONLY for 24AA025E{48, 64} type of EEPROMs. Reword commit message.] Signed-off-by: Andrei Simion --- v3 -> v4: - Use AT24_CHIP_DATA with AT24_FLAG_READONLY - drop AT24_CHIP_DATA_CB_AO - drop AT24_CHIP_DATA_AO - drop u8 adjoff - change the commit title v2 -> v3: - add specific compatible name according with https://ww1.microchip.com/downloads/en/DeviceDoc/24AA02E48-24AA025E48-24AA0= 2E64-24AA025E64-Data-Sheet-20002124H.pdf - add extended macros to init structure with explicit value for adjoff - drop co-developed-by to maintain the commit history (chronological order of modifications) v1 -> v2: - no change --- drivers/misc/eeprom/at24.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c index 4bd4f32bcdab..ca872e3465ed 100644 --- a/drivers/misc/eeprom/at24.c +++ b/drivers/misc/eeprom/at24.c @@ -174,6 +174,10 @@ AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, AT24_FLAG_MAC | AT24_FLAG_READONLY); AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, AT24_FLAG_MAC | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8, + AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8, + AT24_FLAG_READONLY); /* spd is a 24c02 in memory DIMMs */ AT24_CHIP_DATA(at24_data_spd, 2048 / 8, AT24_FLAG_READONLY | AT24_FLAG_IRUGO); @@ -218,6 +222,8 @@ static const struct i2c_device_id at24_ids[] =3D { { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, + { "24aa025e48", (kernel_ulong_t)&at24_data_24aa025e48 }, + { "24aa025e64", (kernel_ulong_t)&at24_data_24aa025e64 }, { "spd", (kernel_ulong_t)&at24_data_spd }, { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, { "24c04", (kernel_ulong_t)&at24_data_24c04 }, @@ -270,6 +276,8 @@ static const struct of_device_id __maybe_unused at24_of= _match[] =3D { { .compatible =3D "atmel,24c1024", .data =3D &at24_data_24c1024 }, { .compatible =3D "atmel,24c1025", .data =3D &at24_data_24c1025 }, { .compatible =3D "atmel,24c2048", .data =3D &at24_data_24c2048 }, + { .compatible =3D "microchip,24aa025e48", .data =3D &at24_data_24aa025e48= }, + { .compatible =3D "microchip,24aa025e64", .data =3D &at24_data_24aa025e64= }, { /* END OF LIST */ }, }; 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charset="utf-8" From: Claudiu Beznea Our main boot sequence is (1) ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel. U-Boot is the stage where we set up the MAC address. Also we can skip U-Boot and use the following boot sequence : (2) ROM BOOT -> AT91Boostrap -> Linux Kernel. Add EEPROMs and nvmem-layout to describe eui48 MAC address region to be used for case (2). Signed-off-by: Claudiu Beznea [andrei.simion@microchip.com: Add nvmem-layout to describe eui48 mac region. Align compatible name with datasheet. Reword commit message.] Signed-off-by: Andrei Simion --- v3 -> v4: - reword commit message - change commit title v2 -> v3: - change from atmel,24mac02e4 to microchip,24aa025e48 to align with datashe= et - drop co-developed-by to maintain the chronological order of the changes v1 -> v2: - remove unnecessary #address-cells #size-cells --- .../arm/boot/dts/microchip/at91-sama7g5ek.dts | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot= /dts/microchip/at91-sama7g5ek.dts index 20b2497657ae..40f4480e298b 100644 --- a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts @@ -403,6 +403,42 @@ i2c8: i2c@600 { i2c-digital-filter; i2c-digital-filter-width-ns =3D <35>; status =3D "okay"; + + eeprom0: eeprom@52 { + compatible =3D "microchip,24aa025e48"; + reg =3D <0x52>; + size =3D <256>; + pagesize =3D <16>; + vcc-supply =3D <&vdd_3v3>; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + eeprom0_eui48: eui48@fa { + reg =3D <0xfa 0x6>; + }; + }; + }; + + eeprom1: eeprom@53 { + compatible =3D "microchip,24aa025e48"; + reg =3D <0x53>; + size =3D <256>; + pagesize =3D <16>; + vcc-supply =3D <&vdd_3v3>; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + eeprom1_eui48: eui48@fa { + reg =3D <0xfa 0x6>; + }; + }; + }; }; }; =20 @@ -440,6 +476,8 @@ &pinctrl_gmac0_mdio_default &pinctrl_gmac0_txck_default &pinctrl_gmac0_phy_irq>; phy-mode =3D "rgmii-id"; + nvmem-cells =3D <&eeprom0_eui48>; + nvmem-cell-names =3D "mac-address"; status =3D "okay"; =20 ethernet-phy@7 { @@ -457,6 +495,8 @@ &gmac1 { &pinctrl_gmac1_mdio_default &pinctrl_gmac1_phy_irq>; phy-mode =3D "rmii"; + nvmem-cells =3D <&eeprom1_eui48>; + nvmem-cell-names =3D "mac-address"; status =3D "okay"; /* Conflict with pdmc0. */ =20 ethernet-phy@0 { --=20 2.34.1 From nobody Tue Dec 16 19:42:24 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6EE513C8F4; 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charset="utf-8" Add support for compatible Microchip 24AA025E48/24AA025E64 EEPROMs. Reviewed-by: Conor Dooley Signed-off-by: Andrei Simion --- v3 -> v4: - change the rule to select compatible v2 -> v3: - commit subject changed to reference Microchip 24AA025E48/24AA025E64 - drop pattern: mac02e4$ and mac02e6$ and a-z from regex - add these two devices down at the bottom - added Reviewed-by v1 -> v2: - change pattern into "^atmel,(24(c|cs|mac)[a-z0-9]+|spd)$" to keep simpler --- Documentation/devicetree/bindings/eeprom/at24.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documenta= tion/devicetree/bindings/eeprom/at24.yaml index 3c36cd0510de..4d46b8c5439d 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -18,7 +18,9 @@ select: properties: compatible: contains: - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$" + anyOf: + - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$" + - enum: ["microchip,24aa025e48", "microchip,24aa025e64"] required: - compatible =20 @@ -132,6 +134,10 @@ properties: - renesas,r1ex24128 - samsung,s524ad0xd1 - const: atmel,24c128 + - items: + - const: microchip,24aa025e48 + - items: + - const: microchip,24aa025e64 - pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st =20 label: --=20 2.34.1