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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240627-dt-bindings-mfd-syscon-split-v4-3-dc6699a9f3e4@linaro.org> References: <20240627-dt-bindings-mfd-syscon-split-v4-0-dc6699a9f3e4@linaro.org> In-Reply-To: <20240627-dt-bindings-mfd-syscon-split-v4-0-dc6699a9f3e4@linaro.org> To: Orson Zhai , Baolin Wang , Chunyan Zhang , Jacky Huang , Shan-Chun Hung , Khuong Dinh , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chuanhua Lei , Rahul Tanwar , Lars Povlsen , Steen Hegelund , Daniel Machon , UNGLinuxDriver@microchip.com, Nishanth Menon , Matthias Brugger , AngeloGioacchino Del Regno Cc: Jiaxun Yang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Conor Dooley , Krzysztof Kozlowski , Rahul Tanwar , Amireddy Mallikarjuna reddy , "Zhu, Yi Xin" X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3048; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; bh=UtbVZYDkzkryXQABqoTO7fSXMXAyEAw/L2jsCfy/SN8=; b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBmfT+8Vs4KySkM/ISHPM/mllt44fo8lqKyxHXmU 2d3Cv6UqxWJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCZn0/vAAKCRDBN2bmhouD 1y6XD/4z7Yy9cF49133e6MlToxL2tOnL28Qw24UdqrqQypVdhDuvNCe6ajObx+40WkuhuiFbKxu UkGNNeaC+cqKg3eG+uPLEuU5TotMNOsHBeyIBjYXVuFMhh5U58OaFes/xEaGk0phhwpfMXnrZC3 MK3AOI9j3+Z44/6tYGWODKrVQ2SmI7tmCvMNteG1ZZzo1rImQUhAN8fVJIAKmqAwZ4mBLAd4S9Q 0qSpDl5q9AlUPXvax0kerX9rNKB2ivtODdzeNUKCK9YuaiGOHDFpXy7mQfDh3iKIWSE7CkcERf4 wikiN4ItXnv1IdlNYeeWcOGMqWfa7HIODhIgibDHEb3JpTPScuhZ0YqcsWxqptxqYWng7JHmsL+ 5R1kovA92+EV+JvYkuJnrP8K1j5sX96dqH6hMzEJgaDuGt5yBL7m7LIMjIpMVCEAM8Zp0CZmuGl uFbLwuF/24O3HRyQaIRekk6WrPesH8tSm6x+6jEWHqQ3cTddVe7PBCMiDisEJV0AghtO5+P1/7B d6P3KNw/aZ8fezv4lE0xkMFNudo/OlTJ+Binwaq+YYLey/apPvZK0CKZZzyXgbEvxHwEmG8ABc1 hp7mzxr5poffPo9wh8NiQyZRKec3GUDuUvSkYZ9n6nuyWXiGxq6EvkSDZikdzOJsHIql35TtADc nDby8bfT1SG/7qQ== X-Developer-Key: i=krzysztof.kozlowski@linaro.org; a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B intel,lgm-syscon is not a simple syscon device - it has children - thus it should be fully documented in its own binding. Reviewed-by: Conor Dooley Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski --- Context might depend on patch in Lee's MFD tree: https://lore.kernel.org/all/171828959006.2643902.8308227314531523435.b4-ty@= kernel.org/ and also further patches here depend on this one. We need to cleanup intel's emails. Does this bounce? Cc: Rahul Tanwar Cc: Amireddy Mallikarjuna reddy Cc: "Zhu, Yi Xin" --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 - .../bindings/soc/intel/intel,lgm-syscon.yaml | 57 ++++++++++++++++++= ++++ 2 files changed, 57 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentat= ion/devicetree/bindings/mfd/syscon.yaml index cc1e9fec5cc7..0e19eb0772f1 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -77,7 +77,6 @@ properties: - hisilicon,pcie-sas-subctrl - hisilicon,peri-subctrl - hpe,gxp-sysreg - - intel,lgm-syscon - loongson,ls1b-syscon - loongson,ls1c-syscon - lsi,axxia-syscon diff --git a/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.y= aml b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml new file mode 100644 index 000000000000..6951d55356d5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Lightning Mountain(LGM) Syscon + +maintainers: + - Chuanhua Lei + - Rahul Tanwar + +properties: + compatible: + items: + - const: intel,lgm-syscon + - const: syscon + + reg: + maxItems: 1 + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + "^emmc-phy@[0-9a-f]+$": + $ref: /schemas/phy/intel,lgm-emmc-phy.yaml# + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + chiptop@e0200000 { + compatible =3D "intel,lgm-syscon", "syscon"; + reg =3D <0xe0200000 0x100>; + ranges =3D <0x0 0xe0200000 0x100>; + #address-cells =3D <1>; + #size-cells =3D <1>; + + emmc-phy@a8 { + compatible =3D "intel,lgm-emmc-phy"; + reg =3D <0x00a8 0x10>; + clocks =3D <&emmc>; + #phy-cells =3D <0>; + }; + }; --=20 2.43.0