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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240627-dpu-virtual-wide-v5-9-5efb90cbb8be@linaro.org> References: <20240627-dpu-virtual-wide-v5-0-5efb90cbb8be@linaro.org> In-Reply-To: <20240627-dpu-virtual-wide-v5-0-5efb90cbb8be@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7305; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=lFD7iY25uduQrISmYezTWzbetq+0s7Q3DnmHq0jujlQ=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmfIwZKSlx7Y6RwCb75cVHPq3GyTdOv/Lb9GU5/ Xl2cLg8j+2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZnyMGQAKCRCLPIo+Aiko 1QmTB/49+NwiwfAQBT4PPq4jOBJolFhZQZv84R6Shel9QeKkmR/GwBYkb9dTyP4SKn/pGBvSsbA cOXx/GWcXrmtcephuEBrg/0T0ViWXE7o0QPB25r1Yt9+bvRIWF+y9Thm0HqXf/TFIsSofqSblme 9lJqpXC/SFbpBrCz8Nv6yHnpAPDaElFLeriDnv8e4Ey2l9kBJhmjyz7biSFGJN3WjROC1te3kEA nL+tpcQsYva7Y6Zvg4C7tFU6EQlp4xVRjWHF+bOP6S7+ClrWgNVmLpnf97xmW4q33rz9BMEkV/f 08yKG7gr03FB6DEACw8eeG850CL9n8nHF0FhZ4SE7T26Qf+W X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Move a call to dpu_plane_check_inline_rotation() to the dpu_plane_atomic_check_pipe() function, so that the rot90 constraints are checked for both pipes. Also move rotation field from struct dpu_plane_state to struct dpu_sw_pipe_cfg. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 ++ drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 55 +++++++++++++++----------= ---- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 2 -- 3 files changed, 31 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/= msm/disp/dpu1/dpu_hw_sspp.h index 4a910b808687..fc54625ae5d4 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h @@ -142,10 +142,12 @@ struct dpu_hw_pixel_ext { * @src_rect: src ROI, caller takes into account the different operations * such as decimation, flip etc to program this field * @dest_rect: destination ROI. + * @rotation: simplified drm rotation hint */ struct dpu_sw_pipe_cfg { struct drm_rect src_rect; struct drm_rect dst_rect; + unsigned int rotation; }; =20 /** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_plane.c index 9b9fe28052ad..6ad160295341 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -527,8 +527,7 @@ static const struct dpu_csc_cfg *_dpu_plane_get_csc(str= uct dpu_sw_pipe *pipe, =20 static void _dpu_plane_setup_scaler(struct dpu_sw_pipe *pipe, const struct msm_format *fmt, bool color_fill, - struct dpu_sw_pipe_cfg *pipe_cfg, - unsigned int rotation) + struct dpu_sw_pipe_cfg *pipe_cfg) { struct dpu_hw_sspp *pipe_hw =3D pipe->sspp; const struct drm_format_info *info =3D drm_format_info(fmt->pixel_format); @@ -551,7 +550,7 @@ static void _dpu_plane_setup_scaler(struct dpu_sw_pipe = *pipe, dst_height, &scaler3_cfg, fmt, info->hsub, info->vsub, - rotation); + pipe_cfg->rotation); =20 /* configure pixel extension based on scalar config */ _dpu_plane_setup_pixel_ext(&scaler3_cfg, &pixel_ext, @@ -603,7 +602,7 @@ static void _dpu_plane_color_fill_pipe(struct dpu_plane= _state *pstate, if (pipe->sspp->ops.setup_rects) pipe->sspp->ops.setup_rects(pipe, &pipe_cfg); =20 - _dpu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg, pstate->rotation); + _dpu_plane_setup_scaler(pipe, fmt, true, &pipe_cfg); } =20 /** @@ -704,12 +703,17 @@ static void dpu_plane_cleanup_fb(struct drm_plane *pl= ane, } =20 static int dpu_plane_check_inline_rotation(struct dpu_plane *pdpu, - const struct dpu_sspp_sub_blks *sblk, - struct drm_rect src, const struct msm_format *fmt) + struct dpu_sw_pipe *pipe, + struct drm_rect src, + const struct msm_format *fmt) { + const struct dpu_sspp_sub_blks *sblk =3D pipe->sspp->cap->sblk; size_t num_formats; const u32 *supported_formats; =20 + if (!test_bit(DPU_SSPP_INLINE_ROTATION, &pipe->sspp->cap->features)) + return -EINVAL; + if (!sblk->rotation_cfg) { DPU_ERROR("invalid rotation cfg\n"); return -EINVAL; @@ -739,6 +743,7 @@ static int dpu_plane_atomic_check_pipe(struct dpu_plane= *pdpu, { uint32_t min_src_size; struct dpu_kms *kms =3D _dpu_plane_get_kms(&pdpu->base); + int ret; =20 min_src_size =3D MSM_FORMAT_IS_YUV(fmt) ? 2 : 1; =20 @@ -776,6 +781,12 @@ static int dpu_plane_atomic_check_pipe(struct dpu_plan= e *pdpu, return -EINVAL; } =20 + if (pipe_cfg->rotation & DRM_MODE_ROTATE_90) { + ret =3D dpu_plane_check_inline_rotation(pdpu, pipe, pipe_cfg->src_rect, = fmt); + if (ret) + return ret; + } + /* max clk check */ if (_dpu_plane_calc_clk(mode, pipe_cfg) > kms->perf.max_core_clk_rate) { DPU_DEBUG_PLANE(pdpu, "plane exceeds max mdp core clk limits\n"); @@ -889,7 +900,6 @@ static int dpu_plane_atomic_check_pipes(struct drm_plan= e *plane, struct dpu_sw_pipe_cfg *pipe_cfg =3D &pstate->pipe_cfg; struct dpu_sw_pipe_cfg *r_pipe_cfg =3D &pstate->r_pipe_cfg; uint32_t max_linewidth; - unsigned int rotation; uint32_t supported_rotations; const struct dpu_sspp_cfg *pipe_hw_caps; const struct dpu_sspp_sub_blks *sblk; @@ -913,6 +923,15 @@ static int dpu_plane_atomic_check_pipes(struct drm_pla= ne *plane, =20 max_linewidth =3D pdpu->catalog->caps->max_linewidth; =20 + supported_rotations =3D DRM_MODE_REFLECT_MASK | DRM_MODE_ROTATE_0; + + if (pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION)) + supported_rotations |=3D DRM_MODE_ROTATE_90; + + pipe_cfg->rotation =3D drm_rotation_simplify(new_plane_state->rotation, + supported_rotations); + r_pipe_cfg->rotation =3D pipe_cfg->rotation; + ret =3D dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, fmt, &crtc_state->adjusted_mode); if (ret) @@ -936,6 +955,7 @@ static int dpu_plane_atomic_check_pipes(struct drm_plan= e *plane, drm_rect_height(&pipe_cfg->src_rect) !=3D drm_rect_height(&pipe_cfg-= >dst_rect) || (!test_bit(DPU_SSPP_SMART_DMA_V1, &pipe->sspp->cap->features) && !test_bit(DPU_SSPP_SMART_DMA_V2, &pipe->sspp->cap->features)) || + pipe_cfg->rotation & DRM_MODE_ROTATE_90 || MSM_FORMAT_IS_YUV(fmt)) { DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u, can't use = split source\n", DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); @@ -959,23 +979,6 @@ static int dpu_plane_atomic_check_pipes(struct drm_pla= ne *plane, return ret; } =20 - supported_rotations =3D DRM_MODE_REFLECT_MASK | DRM_MODE_ROTATE_0; - - if (pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION)) - supported_rotations |=3D DRM_MODE_ROTATE_90; - - rotation =3D drm_rotation_simplify(new_plane_state->rotation, - supported_rotations); - - if ((pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION)) && - (rotation & DRM_MODE_ROTATE_90)) { - ret =3D dpu_plane_check_inline_rotation(pdpu, sblk, pipe_cfg->src_rect, = fmt); - if (ret) - return ret; - } - - pstate->rotation =3D rotation; - return 0; } =20 @@ -1115,14 +1118,14 @@ static void dpu_plane_sspp_update_pipe(struct drm_p= lane *plane, pipe_cfg); } =20 - _dpu_plane_setup_scaler(pipe, fmt, false, pipe_cfg, pstate->rotation); + _dpu_plane_setup_scaler(pipe, fmt, false, pipe_cfg); =20 if (pipe->sspp->ops.setup_multirect) pipe->sspp->ops.setup_multirect( pipe); =20 if (pipe->sspp->ops.setup_format) { - unsigned int rotation =3D pstate->rotation; + unsigned int rotation =3D pipe_cfg->rotation; =20 src_flags =3D 0x0; =20 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_plane.h index abd6b21a049b..a3ae45dc95d0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h @@ -30,7 +30,6 @@ * @plane_fetch_bw: calculated BW per plane * @plane_clk: calculated clk per plane * @needs_dirtyfb: whether attached CRTC needs pixel data explicitly flush= ed - * @rotation: simplified drm rotation hint */ struct dpu_plane_state { struct drm_plane_state base; @@ -47,7 +46,6 @@ struct dpu_plane_state { u64 plane_clk; =20 bool needs_dirtyfb; - unsigned int rotation; }; =20 #define to_dpu_plane_state(x) \ --=20 2.39.2