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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240627-dpu-virtual-wide-v5-3-5efb90cbb8be@linaro.org> References: <20240627-dpu-virtual-wide-v5-0-5efb90cbb8be@linaro.org> In-Reply-To: <20240627-dpu-virtual-wide-v5-0-5efb90cbb8be@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1981; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=oZ0yq3Zy7nCQNd1WNthf0ukdXl1hN+VK6wuUcAguRdA=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ1pNj4RDTeh68xSjxS9P/pE5fDh+kX+68OcVvGy+v/p7F 34/4tzfyWjMwsDIxSArpsjiU9AyNWZTctiHHVPrYQaxMoFMYeDiFICJRDuz/9NxmCUb9DZPRp/v 5/+6tOxFJx961U9Pfyl7usfqwvnnt+81cHo27uWNW/TDdmUSy9InQbJy9nuYfx2V5Ta//C6bPej NvVrm+l2v3TJuzP6WtGJtI3u3bvPJhtTzM7K0JPiX3Gi/tdBggdKr6vUx3+fO2nHT/EhOjpf4Jd Ec98V188sYObSzis5d599som5wturrUdYPsy5virBWtdLWsNDmPLfviNPkKQ4eB4vdlSaY8WX9U fHUbMncuML3wwn/lDtq3cLNEW3eEetWMN79olXceOOP6lPVmNwJ1dUPPql/6ApZ0ezhE9c64UiT f/WT7V5Nte6frJ//1ayLUz1hbtpW/zdzrnWMe5/MunOdAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Take into account the plane rotation and flipping when calculating src positions for the wide plane parts. This is not an issue yet, because rotation is only supported for the UBWC planes and wide UBWC planes are rejected anyway because in parallel multirect case only the half of the usual width is supported for tiled formats. However it's better to fix this now rather than stumbling upon it later. Fixes: 80e8ae3b38ab ("drm/msm/dpu: add support for wide planes") Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_plane.c index 148bd79bdcef..8f2759d16247 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -862,6 +862,10 @@ static int dpu_plane_atomic_check(struct drm_plane *pl= ane, =20 max_linewidth =3D pdpu->catalog->caps->max_linewidth; =20 + drm_rect_rotate(&pipe_cfg->src_rect, + new_plane_state->fb->width, new_plane_state->fb->height, + new_plane_state->rotation); + if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) || _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_= clk_rate) { /* @@ -911,6 +915,14 @@ static int dpu_plane_atomic_check(struct drm_plane *pl= ane, r_pipe_cfg->dst_rect.x1 =3D pipe_cfg->dst_rect.x2; } =20 + drm_rect_rotate_inv(&pipe_cfg->src_rect, + new_plane_state->fb->width, new_plane_state->fb->height, + new_plane_state->rotation); + if (r_pipe->sspp) + drm_rect_rotate_inv(&r_pipe_cfg->src_rect, + new_plane_state->fb->width, new_plane_state->fb->height, + new_plane_state->rotation); + ret =3D dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, fmt, &crtc_stat= e->adjusted_mode); if (ret) return ret; --=20 2.39.2