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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF000397B0.mail.protection.outlook.com (10.167.248.54) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7677.15 via Frontend Transport; Wed, 26 Jun 2024 04:21:42 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 25 Jun 2024 23:21:40 -0500 From: Mario Limonciello To: Borislav Petkov , "Gautham R . Shenoy" , Perry Yuan CC: Thomas Gleixner , Ingo Molnar , "Dave Hansen" , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "H . Peter Anvin" , Huang Rui , Mario Limonciello , "Rafael J . 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Add definitions aligned with the amd-pstate definition for performance levels. No intended functional changes. Signed-off-by: Mario Limonciello --- arch/x86/kernel/cpu/amd.c | 30 +++++++++++++++++++++++------- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 44df3f11e731..8b730193d79e 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -29,6 +29,10 @@ =20 #include "cpu.h" =20 +#define CPPC_HIGHEST_PERF_MAX 255 +#define CPPC_HIGHEST_PERF_PERFORMANCE 196 +#define CPPC_HIGHEST_PERF_DEFAULT 166 + static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p) { u32 gprs[8] =3D { 0 }; @@ -1194,15 +1198,27 @@ u32 amd_get_highest_perf(void) { struct cpuinfo_x86 *c =3D &boot_cpu_data; =20 - if (c->x86 =3D=3D 0x17 && ((c->x86_model >=3D 0x30 && c->x86_model < 0x40= ) || - (c->x86_model >=3D 0x70 && c->x86_model < 0x80))) - return 166; + if (cpu_feature_enabled(X86_FEATURE_ZEN2)) { + switch (c->x86_model) { + case 0x30 ... 0x40: + case 0x70 ... 0x80: + return CPPC_HIGHEST_PERF_DEFAULT; + default: + return CPPC_HIGHEST_PERF_MAX; + } + } =20 - if (c->x86 =3D=3D 0x19 && ((c->x86_model >=3D 0x20 && c->x86_model < 0x30= ) || - (c->x86_model >=3D 0x40 && c->x86_model < 0x70))) - return 166; + if (cpu_feature_enabled(X86_FEATURE_ZEN3)) { + switch (c->x86_model) { + case 0x20 ... 0x30: + case 0x40 ... 0x70: + return CPPC_HIGHEST_PERF_DEFAULT; + default: + return CPPC_HIGHEST_PERF_MAX; + } + } =20 - return 255; + return CPPC_HIGHEST_PERF_MAX; } EXPORT_SYMBOL_GPL(amd_get_highest_perf); =20 --=20 2.43.0