From nobody Wed Dec 17 21:14:04 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3B87D1607B3; Tue, 25 Jun 2024 13:32:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719322378; cv=none; b=c0zfQWAk5y01EOC8R+EQJqoOTSHohPq7f/TAXTjEEHAKm1b1YIMi11ltet5CD3bUgm5vk7yfH5Ox+Tr79X5G+4uO4/oaJB2JKyjuM1d2qrIvrQqdDv/m8SR5mhlgMIkyXyZVblDyEMUAwHnhF2Sd6zc62u9aPxlqzt5wSN0zcTQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719322378; c=relaxed/simple; bh=RdemFUsY0sdo4kw7uHlBTU2el6g3PKml8fNuv/srOXE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=rXKbgDMwqXNJ2tQ2DvftKkTgtJ+Y9lddCJRMv/6C6ei7stAS/96Q/vn6ZZ5LcPbXrcPz4qrNY5+JK3msUkNg8vL6p5VoHrd5gHY5AXy/g6Ff26DCDFgzRcRYNCwzgTadwxAW79OR9/0kta69o0reb4FJrSXYYaqzpshjB0HQ2KQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 79007DA7; Tue, 25 Jun 2024 06:33:21 -0700 (PDT) Received: from e127643.broadband (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 229623F73B; Tue, 25 Jun 2024 06:32:53 -0700 (PDT) From: James Clark To: coresight@lists.linaro.org, suzuki.poulose@arm.com, gankulkarni@os.amperecomputing.com, mike.leach@linaro.org, leo.yan@linux.dev, anshuman.khandual@arm.com, jszu@nvidia.com, bwicaksono@nvidia.com Cc: James Clark , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , John Garry , Will Deacon , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Jiri Olsa , Ian Rogers , Adrian Hunter , "Liang, Kan" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-perf-users@vger.kernel.org Subject: [PATCH v4 05/17] perf: cs-etm: Only save valid trace IDs into files Date: Tue, 25 Jun 2024 14:30:48 +0100 Message-Id: <20240625133105.671245-6-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240625133105.671245-1-james.clark@arm.com> References: <20240625133105.671245-1-james.clark@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This isn't a bug because Perf always masks with CORESIGHT_TRACE_ID_VAL_MASK before using these values, but to avoid it looking like it could be, make an effort to not save bad values. Signed-off-by: James Clark --- tools/perf/arch/arm/util/cs-etm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/c= s-etm.c index b0118546cd4d..14b8afabce3a 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c @@ -643,7 +643,8 @@ static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, = struct perf_cpu cpu) =20 static __u64 cs_etm_get_legacy_trace_id(struct perf_cpu cpu) { - return CORESIGHT_LEGACY_CPU_TRACE_ID(cpu.cpu); + /* Wrap at 48 so that invalid trace IDs aren't saved into files. */ + return CORESIGHT_LEGACY_CPU_TRACE_ID(cpu.cpu % 48); } =20 static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record = *itr, struct perf_cpu cpu) --=20 2.34.1