From nobody Wed Dec 17 21:14:02 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1A075158D83; Tue, 25 Jun 2024 13:34:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719322484; cv=none; b=fIGtYDgjEP0kB+78adDvLs1J+9Y+zokNxX+cwMYV9iq17NJAm/Lan2RMcdHiAG4w8X8FQ3GLcUARWzjOjuz2wUFaZmdyCBd0gVBPdhTEjjl0Nhv/ohe7sPfy4O/zFGnEX2npB4BiVgibSbCLuBpIf8rE+L5gR9Mw+VNgAoo1kMs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719322484; c=relaxed/simple; bh=+CPbZPwm6idt1BjhNLaLWLEAeeaJnKpKlDcqDQnTcn4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MK7Ucltgjv4/sXHBTEnoaBOV9MMaBvXVPmilR0ZUsCoviecVvS5qyG60w0ZGifab7mqcJMoRv8AlDPAS4R1FOji3zX1jemY6stSFexpXDxBJ8Bz1O6TRG1gqlWks9M3mfT39IwoLFLooFeU5KbbE5WoHrnSEfgg5z8ySNNAm76U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5FF63DA7; Tue, 25 Jun 2024 06:35:07 -0700 (PDT) Received: from e127643.broadband (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 18D6C3F73B; Tue, 25 Jun 2024 06:34:38 -0700 (PDT) From: James Clark To: coresight@lists.linaro.org, suzuki.poulose@arm.com, gankulkarni@os.amperecomputing.com, mike.leach@linaro.org, leo.yan@linux.dev, anshuman.khandual@arm.com, jszu@nvidia.com, bwicaksono@nvidia.com Cc: James Clark , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , John Garry , Will Deacon , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Jiri Olsa , Ian Rogers , Adrian Hunter , "Liang, Kan" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-perf-users@vger.kernel.org Subject: [PATCH v4 17/17] coresight: Make trace ID map spinlock local to the map Date: Tue, 25 Jun 2024 14:31:00 +0100 Message-Id: <20240625133105.671245-18-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240625133105.671245-1-james.clark@arm.com> References: <20240625133105.671245-1-james.clark@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Reduce contention on the lock by replacing the global lock with one for each map. Signed-off-by: James Clark --- drivers/hwtracing/coresight/coresight-core.c | 1 + .../hwtracing/coresight/coresight-trace-id.c | 26 +++++++++---------- include/linux/coresight.h | 1 + 3 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtraci= ng/coresight/coresight-core.c index c427e9344a84..ea38ecf26fcb 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -1164,6 +1164,7 @@ struct coresight_device *coresight_register(struct co= resight_desc *desc) =20 if (csdev->type =3D=3D CORESIGHT_DEV_TYPE_SINK || csdev->type =3D=3D CORESIGHT_DEV_TYPE_LINKSINK) { + spin_lock_init(&csdev->perf_sink_id_map.lock); csdev->perf_sink_id_map.cpu_map =3D alloc_percpu(atomic_t); if (!csdev->perf_sink_id_map.cpu_map) { kfree(csdev); diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwt= racing/coresight/coresight-trace-id.c index 1e70892f5beb..82bb70c1ad73 100644 --- a/drivers/hwtracing/coresight/coresight-trace-id.c +++ b/drivers/hwtracing/coresight/coresight-trace-id.c @@ -15,12 +15,10 @@ /* Default trace ID map. Used in sysfs mode and for system sources */ static DEFINE_PER_CPU(atomic_t, id_map_default_cpu_ids) =3D ATOMIC_INIT(0); static struct coresight_trace_id_map id_map_default =3D { - .cpu_map =3D &id_map_default_cpu_ids + .cpu_map =3D &id_map_default_cpu_ids, + .lock =3D __SPIN_LOCK_UNLOCKED(id_map_default.lock) }; =20 -/* lock to protect id_map and cpu data */ -static DEFINE_SPINLOCK(id_map_lock); - /* #define TRACE_ID_DEBUG 1 */ #if defined(TRACE_ID_DEBUG) || defined(CONFIG_COMPILE_TEST) =20 @@ -124,11 +122,11 @@ static void coresight_trace_id_release_all(struct cor= esight_trace_id_map *id_map unsigned long flags; int cpu; =20 - spin_lock_irqsave(&id_map_lock, flags); + spin_lock_irqsave(&id_map->lock, flags); bitmap_zero(id_map->used_ids, CORESIGHT_TRACE_IDS_MAX); for_each_possible_cpu(cpu) atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), 0); - spin_unlock_irqrestore(&id_map_lock, flags); + spin_unlock_irqrestore(&id_map->lock, flags); DUMP_ID_MAP(id_map); } =20 @@ -137,7 +135,7 @@ static int _coresight_trace_id_get_cpu_id(int cpu, stru= ct coresight_trace_id_map unsigned long flags; int id; =20 - spin_lock_irqsave(&id_map_lock, flags); + spin_lock_irqsave(&id_map->lock, flags); =20 /* check for existing allocation for this CPU */ id =3D _coresight_trace_id_read_cpu_id(cpu, id_map); @@ -164,7 +162,7 @@ static int _coresight_trace_id_get_cpu_id(int cpu, stru= ct coresight_trace_id_map atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), id); =20 get_cpu_id_out_unlock: - spin_unlock_irqrestore(&id_map_lock, flags); + spin_unlock_irqrestore(&id_map->lock, flags); =20 DUMP_ID_CPU(cpu, id); DUMP_ID_MAP(id_map); @@ -181,12 +179,12 @@ static void _coresight_trace_id_put_cpu_id(int cpu, s= truct coresight_trace_id_ma if (!id) return; =20 - spin_lock_irqsave(&id_map_lock, flags); + spin_lock_irqsave(&id_map->lock, flags); =20 coresight_trace_id_free(id, id_map); atomic_set(per_cpu_ptr(id_map->cpu_map, cpu), 0); =20 - spin_unlock_irqrestore(&id_map_lock, flags); + spin_unlock_irqrestore(&id_map->lock, flags); DUMP_ID_CPU(cpu, id); DUMP_ID_MAP(id_map); } @@ -196,10 +194,10 @@ static int coresight_trace_id_map_get_system_id(struc= t coresight_trace_id_map *i unsigned long flags; int id; =20 - spin_lock_irqsave(&id_map_lock, flags); + spin_lock_irqsave(&id_map->lock, flags); /* prefer odd IDs for system components to avoid legacy CPU IDS */ id =3D coresight_trace_id_alloc_new_id(id_map, 0, true); - spin_unlock_irqrestore(&id_map_lock, flags); + spin_unlock_irqrestore(&id_map->lock, flags); =20 DUMP_ID(id); DUMP_ID_MAP(id_map); @@ -210,9 +208,9 @@ static void coresight_trace_id_map_put_system_id(struct= coresight_trace_id_map * { unsigned long flags; =20 - spin_lock_irqsave(&id_map_lock, flags); + spin_lock_irqsave(&id_map->lock, flags); coresight_trace_id_free(id, id_map); - spin_unlock_irqrestore(&id_map_lock, flags); + spin_unlock_irqrestore(&id_map->lock, flags); =20 DUMP_ID(id); DUMP_ID_MAP(id_map); diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 197949fd2c35..c13342594278 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -233,6 +233,7 @@ struct coresight_trace_id_map { DECLARE_BITMAP(used_ids, CORESIGHT_TRACE_IDS_MAX); atomic_t __percpu *cpu_map; atomic_t perf_cs_etm_session_active; + spinlock_t lock; }; =20 /** --=20 2.34.1