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([82.78.167.70]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a8c8b32sm12798437f8f.92.2024.06.25.05.14.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jun 2024 05:14:30 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: chris.brandt@renesas.com, andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, wsa+renesas@sang-engineering.com Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v2 06/12] i2c: riic: Add suspend/resume support Date: Tue, 25 Jun 2024 15:13:52 +0300 Message-Id: <20240625121358.590547-7-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240625121358.590547-1-claudiu.beznea.uj@bp.renesas.com> References: <20240625121358.590547-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Add suspend/resume support for the RIIC driver. This is necessary for the Renesas RZ/G3S SoC which support suspend to deep sleep state where power to most of the SoC components is turned off. As a result the I2C controller needs to be reconfigured after suspend/resume. For this, the reset line was stored in the driver private data structure as well as i2c timings. The reset line and I2C timings are necessary to re-initialize the controller after resume. Signed-off-by: Claudiu Beznea --- Changes in v2: - deassert the reset line in resume if riic_init_hw() fails as if that happens there is no way to recover the controller drivers/i2c/busses/i2c-riic.c | 68 +++++++++++++++++++++++++++++------ 1 file changed, 57 insertions(+), 11 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 24c0d62544fb..9fe007609076 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -105,6 +105,8 @@ struct riic_dev { struct completion msg_done; struct i2c_adapter adapter; struct clk *clk; + struct reset_control *rstc; + struct i2c_timings i2c_t; }; =20 struct riic_irq_desc { @@ -306,11 +308,12 @@ static const struct i2c_algorithm riic_algo =3D { .functionality =3D riic_func, }; =20 -static int riic_init_hw(struct riic_dev *riic, struct i2c_timings *t) +static int riic_init_hw(struct riic_dev *riic) { int ret; unsigned long rate; int total_ticks, cks, brl, brh; + struct i2c_timings *t =3D &riic->i2c_t; struct device *dev =3D riic->adapter.dev.parent; =20 if (t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) { @@ -429,8 +432,6 @@ static int riic_i2c_probe(struct platform_device *pdev) struct device *dev =3D &pdev->dev; struct riic_dev *riic; struct i2c_adapter *adap; - struct i2c_timings i2c_t; - struct reset_control *rstc; int i, ret; =20 riic =3D devm_kzalloc(dev, sizeof(*riic), GFP_KERNEL); @@ -447,16 +448,16 @@ static int riic_i2c_probe(struct platform_device *pde= v) return PTR_ERR(riic->clk); } =20 - rstc =3D devm_reset_control_get_optional_exclusive(dev, NULL); - if (IS_ERR(rstc)) - return dev_err_probe(dev, PTR_ERR(rstc), + riic->rstc =3D devm_reset_control_get_optional_exclusive(dev, NULL); + if (IS_ERR(riic->rstc)) + return dev_err_probe(dev, PTR_ERR(riic->rstc), "Error: missing reset ctrl\n"); =20 - ret =3D reset_control_deassert(rstc); + ret =3D reset_control_deassert(riic->rstc); if (ret) return ret; =20 - ret =3D devm_add_action_or_reset(dev, riic_reset_control_assert, rstc); + ret =3D devm_add_action_or_reset(dev, riic_reset_control_assert, riic->rs= tc); if (ret) return ret; =20 @@ -485,13 +486,13 @@ static int riic_i2c_probe(struct platform_device *pde= v) =20 init_completion(&riic->msg_done); =20 - i2c_parse_fw_timings(dev, &i2c_t, true); + i2c_parse_fw_timings(dev, &riic->i2c_t, true); =20 pm_runtime_set_autosuspend_delay(dev, 0); pm_runtime_use_autosuspend(dev); pm_runtime_enable(dev); =20 - ret =3D riic_init_hw(riic, &i2c_t); + ret =3D riic_init_hw(riic); if (ret) goto out; =20 @@ -501,7 +502,7 @@ static int riic_i2c_probe(struct platform_device *pdev) =20 platform_set_drvdata(pdev, riic); =20 - dev_info(dev, "registered with %dHz bus speed\n", i2c_t.bus_freq_hz); + dev_info(dev, "registered with %dHz bus speed\n", riic->i2c_t.bus_freq_hz= ); return 0; =20 out: @@ -562,6 +563,50 @@ static const struct riic_of_data riic_rz_v2h_info =3D { }, }; =20 +static int riic_i2c_suspend(struct device *dev) +{ + struct riic_dev *riic =3D dev_get_drvdata(dev); + int ret; + + ret =3D pm_runtime_resume_and_get(dev); + if (ret) + return ret; + + i2c_mark_adapter_suspended(&riic->adapter); + + /* Disable output on SDA, SCL pins. */ + riic_clear_set_bit(riic, ICCR1_ICE, 0, RIIC_ICCR1); + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_sync(dev); + + return reset_control_assert(riic->rstc); +} + +static int riic_i2c_resume(struct device *dev) +{ + struct riic_dev *riic =3D dev_get_drvdata(dev); + int ret; + + ret =3D reset_control_deassert(riic->rstc); + if (ret) + return ret; + + ret =3D riic_init_hw(riic); + if (ret) { + reset_control_assert(riic->rstc); + return ret; + } + + i2c_mark_adapter_resumed(&riic->adapter); + + return 0; +} + +static const struct dev_pm_ops riic_i2c_pm_ops =3D { + SYSTEM_SLEEP_PM_OPS(riic_i2c_suspend, riic_i2c_resume) +}; + static const struct of_device_id riic_i2c_dt_ids[] =3D { { .compatible =3D "renesas,riic-rz", .data =3D &riic_rz_a_info }, { .compatible =3D "renesas,riic-r9a09g057", .data =3D &riic_rz_v2h_info }, @@ -574,6 +619,7 @@ static struct platform_driver riic_i2c_driver =3D { .driver =3D { .name =3D "i2c-riic", .of_match_table =3D riic_i2c_dt_ids, + .pm =3D pm_ptr(&riic_i2c_pm_ops), }, }; =20 --=20 2.39.2