From nobody Wed Feb 11 14:05:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3303314A0BC; Tue, 25 Jun 2024 09:09:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719306576; cv=none; b=QGcjee/npcTw1SGl/nnEIaRhWQdIjSCS3fyM2mkIRU6eNjTckeSCPy4i9D+kos15Lmvt9CvLF/Hnm88FZnnmckg+dquzfZloJ9N92Bv8Is87XXZAp5FYjgKeFpx+j2WYj/ovD+gBv7OC/H4D+KCjtKK+0lk1lCmJfm0S0bywzWU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719306576; c=relaxed/simple; bh=JKCpk5dk6D/SobJZSKKYeEwrkj1EvysciZO75GXo7IY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HA9lrVwz3YFSZza24j1XqsFYdCNt+MHAQLuTQRZg0Or+2N1A/XlaVUX2nL04bfNatqqJnvddwxYAWPzIQdyFcLaWBavKy6Xo90tfk5Y4p6iuDFjiCJqa08fk3BTouC2DpcQLsLHpZPoIiY99kEcgISLK9c3g0DOq4QZM4fmakrs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=VuZ9+nxV; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="VuZ9+nxV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719306575; x=1750842575; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JKCpk5dk6D/SobJZSKKYeEwrkj1EvysciZO75GXo7IY=; b=VuZ9+nxVb9x8kYDuPvT2+dzRtOieAwd4bsOMVxn3cEMPn9q097Y86Gnh B2elPqSyFVdtrxwbZgLGGmhDKCE0vVnQRj3QBqiUDzxiprDz38DKnaHZX RP+3u6FQAyRjryEzCM/n6Z9UWdsYODd5rZceirzVeFzr0IP1JLaKd5LmP lyLE2R/ivx9JlxxNB3oSJ8JrMBODze581zfTZ2gutU+q9tfxiAGpsOtys T9ZorOHkBriBTEZ/eGCPIplbmS7PQlcIgzY6/7ApIX34PuYSwl0G1RZHU WEjttjXF6HPR8o8dU8T3MW7cqsQbEspthHTGRwSFmsSPlpspPxezvLIwZ w==; X-CSE-ConnectionGUID: VUslT87US1uPmx+Nea0QOA== X-CSE-MsgGUID: MRhWt4BEQDqSog1AnAJX2w== X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="29096477" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 25 Jun 2024 02:09:32 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 25 Jun 2024 02:09:11 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 25 Jun 2024 02:09:04 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , CC: Subject: [PATCH 1/4] dt-bindings: display: himax-hx8394: remove reset-gpio from required properties Date: Tue, 25 Jun 2024 14:38:50 +0530 Message-ID: <20240625090853.343176-2-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240625090853.343176-1-manikandan.m@microchip.com> References: <20240625090853.343176-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove "reset-gpio" property from required properties list and make it optional.When interfaced with some boards where reset line is not populated it leads to driver probe issues. Signed-off-by: Manikandan Muralidharan --- .../devicetree/bindings/display/panel/himax,hx8394.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx8394.y= aml b/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml index 644387e4fb6f..017cb19ed64f 100644 --- a/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml +++ b/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml @@ -46,7 +46,6 @@ properties: required: - compatible - reg - - reset-gpios - backlight - port - vcc-supply --=20 2.25.1 From nobody Wed Feb 11 14:05:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A27F31494D7; Tue, 25 Jun 2024 09:09:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719306582; cv=none; b=Cnt2nef0rMgZXVqwM2Bn0iIphUoAxeVgzWDH3SLO/lCBAjJK2/PI/oKyJlq6yObPSktCp9Ay/VmPGWAdwXZvxoHb6d/WHlEmmnOzLeLnNBoUF1tw5k+kWh4uMX5ZfpaLExzxYVC7xdD37pWR4UAOxNH5yApAkFbDoB23oD4DNa0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719306582; c=relaxed/simple; bh=AM6ZyQskoY2QqxOj4uW1JtEfQp/A0PBjAghkGXt3xJs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=s0OLVJHCJORyePg7ALJuS7ezk+PkptRbVs1cEG+mBfomEYEojnYUtTOHmnWHVqwC/4f1vLG95OX8nthV0byCCjzaIfPeiGfVr1cvXI1W3tan7V429q6Zplt4Zz6ktgF2yUJ/IYuvO5+az1+4U9qHx7LR8+xIKYRNE3b3mRipXpA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=gYWJYNs5; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="gYWJYNs5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719306581; x=1750842581; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AM6ZyQskoY2QqxOj4uW1JtEfQp/A0PBjAghkGXt3xJs=; b=gYWJYNs5sldR2RfaA8h2AbF27qY97ObKi450ZvqfIqscxHGVfJcUjlCP 1PeVzd/tLaMK+mn0Wk5o2VrET4o/DMutL+HYV1MqBfIw5QIaHt2Kt94GF tYGOP2ABDM7KSTHNRQs9Z8isu8W3ZltP5ySn0M1sWF+WOjJ52IF4jNDwB sKnK7QULodDLJGTYa8UfYYPYkJ4t2Z/Th4G6pjRuHGl17daaSqcr46iGM YCFOCqT98g/1YROXUz4rlFgs7e1Ihkxw4RrvzPbXopTwXUxAAvnXW45T7 FphS7TY3Zz9AHghtVSB8bO9P6KMLlptTSSrmRWuMqt2HDMPT09I8zu7N5 Q==; X-CSE-ConnectionGUID: zjd0MkvxRYe9+LbhgcS+Jw== X-CSE-MsgGUID: OTrNu+5USaKQwBn0eBlJ5w== X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="28465910" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 25 Jun 2024 02:09:39 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 25 Jun 2024 02:09:17 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 25 Jun 2024 02:09:11 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , CC: Subject: [PATCH 2/4] drm/panel: himax-hx8394: switch to devm_gpiod_get_optional() for reset_gpio Date: Tue, 25 Jun 2024 14:38:51 +0530 Message-ID: <20240625090853.343176-3-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240625090853.343176-1-manikandan.m@microchip.com> References: <20240625090853.343176-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Switch the driver to use devm_gpiod_get_optional() on reset_gpio to avoid driver probe issues when reset line is not specified. Signed-off-by: Manikandan Muralidharan --- drivers/gpu/drm/panel/panel-himax-hx8394.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-himax-hx8394.c b/drivers/gpu/drm/p= anel/panel-himax-hx8394.c index cb9f46e853de..3be461fc5615 100644 --- a/drivers/gpu/drm/panel/panel-himax-hx8394.c +++ b/drivers/gpu/drm/panel/panel-himax-hx8394.c @@ -486,7 +486,7 @@ static int hx8394_probe(struct mipi_dsi_device *dsi) if (!ctx) return -ENOMEM; =20 - ctx->reset_gpio =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + ctx->reset_gpio =3D devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(ctx->reset_gpio)) return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), "Failed to get reset gpio\n"); --=20 2.25.1 From nobody Wed Feb 11 14:05:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B65A1494D9; Tue, 25 Jun 2024 09:09:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719306583; cv=none; b=VcS4ICvTw9BsPG4vsn5SxQcUBFhA5+rzHBZ8c7LK2xTm2R9WDIa0gXwaprwVN1+e2pEwodVz93NO9j5Zq8KSXLo643DBM+d42weTwVvSvHd+1sQXHap2uMCKk7H7EocKv+YA/jDbF5nJVcehCjAw97WbUwih7ouMkjO3peKyRFU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719306583; c=relaxed/simple; bh=hGvbHljF9xjHMTI4lhUwfwH0I82vEpDfIngxhWIu2MQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=L1lnE8z3pDys7+skd6hYbPHiU0B0j+0XCfcP2odlfK5eCXGEaikzyO1uNR7mH7IFLamZ0NJZXskwOrKEr48GYhlThLWlt1Uo/TqiejQ5a0FJZRgdidq0jfX7Je8MInUTZ7foyQps51g2xrfV6oMqcxoZkZI0P1xfj1YdUGnfjiw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=RR1D9Yb1; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="RR1D9Yb1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719306582; x=1750842582; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hGvbHljF9xjHMTI4lhUwfwH0I82vEpDfIngxhWIu2MQ=; b=RR1D9Yb1m7A0IpeLL98O3rY5djO9fyyqfQMsdxkHM527HkPLUKAAm0IK uSVVIDWUYb9GeJyxRdPeNg0gabXI4/jLOJPl25R9Oft8chnqsGAudhF7A S4xPtwAagqSROaDTSt4RrtZFJnz5HLmOVQzzoetr0bZMX60wSG1ePmONm w0bxjTuQPAXj3ZcYcyIugrq+xNtaxn9oakf4yP6vaEQbIAJFUhN5PPM1o F0rpngBwskAf+9ZbulGSo5rYRgVV72hG/rTJxqq8uxSI6SUbm7ThMwhLH 5amLi6osqqn+l9+183ZIJuebFribT0N/4VEkQrBGkA3hsArIu4/DsFz8J g==; X-CSE-ConnectionGUID: zjd0MkvxRYe9+LbhgcS+Jw== X-CSE-MsgGUID: KO++c9z9R3WMG+rqCc8piw== X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="28465914" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 25 Jun 2024 02:09:40 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 25 Jun 2024 02:09:24 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 25 Jun 2024 02:09:18 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , CC: Subject: [PATCH 3/4] dt-bindings: display: himax-hx8394: Add Microchip AC40T08A MIPI Display panel Date: Tue, 25 Jun 2024 14:38:52 +0530 Message-ID: <20240625090853.343176-4-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240625090853.343176-1-manikandan.m@microchip.com> References: <20240625090853.343176-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add compatible string for the Microchip's AC40T08A MIPI Display panel.This panel uses a Himax HX8394 display controller. Signed-off-by: Manikandan Muralidharan --- .../devicetree/bindings/display/panel/himax,hx8394.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx8394.y= aml b/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml index 017cb19ed64f..d547df794b3b 100644 --- a/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml +++ b/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml @@ -24,6 +24,7 @@ properties: - enum: - hannstar,hsd060bhw4 - powkiddy,x55-panel + - microchip,ac40t08a-mipi-panel - const: himax,hx8394 =20 reg: --=20 2.25.1 From nobody Wed Feb 11 14:05:11 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 06B8F24B34; Tue, 25 Jun 2024 09:10:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719306624; cv=none; b=qBvheQvqkDdze9/mSGVjjKDYGGi5580lnUFLiyH8FOMr+CR8YBYA7keCscqwHXXUb/25acWoI8FZfIzjsviu0niUhLo/3Sz8/803jW+tGmpV43Ng74RBU6Jw+RVminc9Hj3+QReqxd5PMOSv/Rh8/g47wRERJAMcfQ516htghrw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719306624; c=relaxed/simple; bh=7d67MtNzgki1K1l7k4JkBWIBosjUeC2yFKZQLmUzIg8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=J8PDdCzmjkIFyuw1nnaKCuEa2LyZ5OKGMZ+8YljWrnTm4+kvQC5U8+FCLxUQfKOneKsSUPCef6u4ZhR5SjYqRryexm+Xn4LelXXDZcdO3vn8JU5OACrbYIwPtmeLBXK5XaoH1kNyFPqW45QcHJWcB3W1Jwud1k8NADeuqC7Eh9c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=mcCkyQSU; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="mcCkyQSU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719306623; x=1750842623; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7d67MtNzgki1K1l7k4JkBWIBosjUeC2yFKZQLmUzIg8=; b=mcCkyQSUUtEUoSEjiee0vfXC0v0g9GFqT2kjpKURCB1bdZwMZg4J0ow5 j3suv0jqOlhbDRKWxRVLuFs1X+R5Q8CwAk82msv7/aHV5xIh47sIvL+4y uWsPkgXZSB5zIkbxzFiWMsMErJvPLHeQA1bS6moLExw8839BsBqUIYx2M zMkYUSH5mjwGu/UhFCWptW2USqX67dm4GL0vhowFTVLDRMpUKfOMLLym8 8OYik2yiNIGKnO3GwBgpbPnX+uBKkqT1t0UvoqDVFjT/sB0tt/M5uRQTa h/ArdsW6Fp8LAMhSj/q1lsDDOzqZoNaZdg/KtYiauuLmah+mAK7kh1sgm Q==; X-CSE-ConnectionGUID: 0ilkPG6JRCK6A+/+T6Es+w== X-CSE-MsgGUID: 4Nt9WlNlTpiT/o/EZ49O9w== X-IronPort-AV: E=Sophos;i="6.08,263,1712646000"; d="scan'208";a="195857230" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 25 Jun 2024 02:10:21 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 25 Jun 2024 02:09:31 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 25 Jun 2024 02:09:25 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , CC: Subject: [PATCH 4/4] drm/panel: himax-hx8394: Add Support for Microchip AC40T08A MIPI Display Panel Date: Tue, 25 Jun 2024 14:38:53 +0530 Message-ID: <20240625090853.343176-5-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240625090853.343176-1-manikandan.m@microchip.com> References: <20240625090853.343176-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for the Microchip AC40T08A MIPI Display panel. This panel uses a Himax HX8394 display controller and requires a vendor provided init sequence. The display resolution is 720x1280@60Hz with width and height of 76mm and 132mm respectively. Signed-off-by: Manikandan Muralidharan --- drivers/gpu/drm/panel/panel-himax-hx8394.c | 151 +++++++++++++++++++++ 1 file changed, 151 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-himax-hx8394.c b/drivers/gpu/drm/p= anel/panel-himax-hx8394.c index 3be461fc5615..92b03a2f65a3 100644 --- a/drivers/gpu/drm/panel/panel-himax-hx8394.c +++ b/drivers/gpu/drm/panel/panel-himax-hx8394.c @@ -339,6 +339,156 @@ static const struct hx8394_panel_desc powkiddy_x55_de= sc =3D { .init_sequence =3D powkiddy_x55_init_sequence, }; =20 +static int mchp_ac40t08a_init_sequence(struct hx8394 *ctx) +{ + struct mipi_dsi_device *dsi =3D to_mipi_dsi_device(ctx->dev); + + /* DCS commands do not seem to be sent correclty without this delay */ + msleep(20); + + /* 5.19.8 SETEXTC: Set extension command (B9h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETEXTC, + 0xff, 0x83, 0x94); + + /* 5.19.9 SETMIPI: Set MIPI control (BAh) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETMIPI, + 0x63, 0x03, 0x68, 0x6b, 0xb2, 0xc0); + + /* 5.19.2 SETPOWER: Set power (B1h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPOWER, + 0x48, 0x12, 0x72, 0x09, 0x32, 0x54, + 0x71, 0x71, 0x57, 0x47); + + /* 5.19.3 SETDISP: Set display related register (B2h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETDISP, + 0x00, 0x80, 0x64, 0x0c, 0x0d, 0x2f); + + /* 5.19.4 SETCYC: Set display waveform cycles (B4h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETCYC, + 0x73, 0x74, 0x73, 0x74, 0x73, 0x74, + 0x01, 0x0c, 0x86, 0x75, 0x00, 0x3f, + 0x73, 0x74, 0x73, 0x74, 0x73, 0x74, + 0x01, 0x0c, 0x86); + + /* 5.19.5 SETVCOM: Set VCOM voltage (B6h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETVCOM, + 0x6e, 0x6e); + + /* 5.19.19 SETGIP0: Set GIP Option0 (D3h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP0, + 0x00, 0x00, 0x07, 0x07, 0x40, 0x07, + 0x0c, 0x00, 0x08, 0x10, 0x08, 0x00, + 0x08, 0x54, 0x15, 0x0a, 0x05, 0x0a, + 0x02, 0x15, 0x06, 0x05, 0x06, 0x47, + 0x44, 0x0a, 0x0a, 0x4b, 0x10, 0x07, + 0x07, 0x0c, 0x40); + + /* 5.19.20 Set GIP Option1 (D5h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP1, + 0x1c, 0x1c, 0x1d, 0x1d, 0x00, 0x01, + 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x24, 0x25, + 0x18, 0x18, 0x26, 0x27, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x20, 0x21, 0x18, 0x18, + 0x18, 0x18); + + /* 5.19.21 Set GIP Option2 (D6h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP2, + 0x1c, 0x1c, 0x1d, 0x1d, 0x07, 0x06, + 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, + 0x0b, 0x0a, 0x09, 0x08, 0x21, 0x20, + 0x18, 0x18, 0x27, 0x26, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x25, 0x24, 0x18, 0x18, + 0x18, 0x18); + + /* 5.19.25 SETGAMMA: Set gamma curve related setting (E0h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGAMMA, + 0x00, 0x0a, 0x15, 0x1b, 0x1e, 0x21, + 0x24, 0x22, 0x47, 0x56, 0x65, 0x66, + 0x6e, 0x82, 0x88, 0x8b, 0x9a, 0x9d, + 0x98, 0xa8, 0xb9, 0x5d, 0x5c, 0x61, + 0x66, 0x6a, 0x6f, 0x7f, 0x7f, 0x00, + 0x0a, 0x15, 0x1b, 0x1e, 0x21, 0x24, + 0x22, 0x47, 0x56, 0x65, 0x65, 0x6e, + 0x81, 0x87, 0x8b, 0x98, 0x9d, 0x99, + 0xa8, 0xba, 0x5d, 0x5d, 0x62, 0x67, + 0x6b, 0x72, 0x7f, 0x7f); + + /* Unknown command, not listed in the HX8394-F datasheet (C0H) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN1, + 0x1f, 0x73); + + /* Set CABC control (C9h)*/ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETCABC, + 0x76, 0x00, 0x30); + + /* 5.19.17 SETPANEL (CCh) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPANEL, + 0x0b); + + /* Unknown command, not listed in the HX8394-F datasheet (D4h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN3, + 0x02); + + /* 5.19.11 Set register bank (BDh) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, + 0x02); + + /* 5.19.11 Set register bank (D8h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN4, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff); + + /* 5.19.11 Set register bank (BDh) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, + 0x00); + + /* 5.19.11 Set register bank (BDh) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, + 0x01); + + /* 5.19.2 SETPOWER: Set power (B1h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPOWER, + 0x00); + + /* 5.19.11 Set register bank (BDh) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, + 0x00); + + /* Unknown command, not listed in the HX8394-F datasheet (C6h) */ + mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN2, + 0xed); + + return 0; +} + +static const struct drm_display_mode mchp_ac40t08a_mode =3D { + .hdisplay =3D 720, + .hsync_start =3D 720 + 12, + .hsync_end =3D 720 + 12 + 24, + .htotal =3D 720 + 12 + 12 + 24, + .vdisplay =3D 1280, + .vsync_start =3D 1280 + 13, + .vsync_end =3D 1280 + 14, + .vtotal =3D 1280 + 14 + 13, + .clock =3D 60226, + .flags =3D DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, + .width_mm =3D 76, + .height_mm =3D 132, +}; + +static const struct hx8394_panel_desc mchp_ac40t08a_desc =3D { + .mode =3D &mchp_ac40t08a_mode, + .lanes =3D 4, + .mode_flags =3D MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST, + .format =3D MIPI_DSI_FMT_RGB888, + .init_sequence =3D mchp_ac40t08a_init_sequence, +}; + static int hx8394_enable(struct drm_panel *panel) { struct hx8394 *ctx =3D panel_to_hx8394(panel); @@ -555,6 +705,7 @@ static void hx8394_remove(struct mipi_dsi_device *dsi) static const struct of_device_id hx8394_of_match[] =3D { { .compatible =3D "hannstar,hsd060bhw4", .data =3D &hsd060bhw4_desc }, { .compatible =3D "powkiddy,x55-panel", .data =3D &powkiddy_x55_desc }, + { .compatible =3D "microchip,ac40t08a-mipi-panel", .data =3D &mchp_ac40t0= 8a_desc }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, hx8394_of_match); --=20 2.25.1