From nobody Wed Dec 17 17:42:44 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27993136669; Mon, 24 Jun 2024 10:05:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719223533; cv=none; b=ge6UBB+QljvOiTM2ELsnDIr52QAwEwZJqNgMo5+kc7Nli7TpxA5X5gaKng9o/k6FFHzYI2+vDzRuVDEm/9novLGXSxW0MZan+6RO1xgR5SivGcOnVUcXa8A4d4Qpr2ljlbfqXd9y5WOvTgNm7YND5b3FaWhBrKbm7Xh2hGd5KhA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719223533; c=relaxed/simple; bh=vflnbH7npqoOpXbEC4oZYpiOh7nINA5cDaOQcY0TZeY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=sZiXBKPcVEAv8PnmLdaUF8lqLngMoYQes0OO0kIsOdDikGDiloBg3G/BME/dw1+EfNWsQJiK9Q1TYHy8kE4MiBdGfYnHZSCnfey/7yKvJjxCWqfNMk8zSSFgBPPotvleSNc+yJnYRkQqhYEA6ROCQyfcCxXBgYHxm6Xr3rDEu+U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=z+eDPhB0; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="z+eDPhB0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719223532; x=1750759532; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vflnbH7npqoOpXbEC4oZYpiOh7nINA5cDaOQcY0TZeY=; b=z+eDPhB0Eem2RQ7kUygoiMOuOahhagw81sFBHTpg3JIb+tSaasAqHjr+ 3zjbAXE+syZb/HtBGgZFxu0TpUnDOVLbZX9E+9myEZFLeMdpTRxUWbzRz ymvb7qEE6Q9R2uUy0UiA5706iELj56bED6GPP0pkoQK4jQFR32xMcNVD5 UfTGtGHAZYxoOUnJohkgQbKJMqvkOGAccW40nMMJ4P4W3a1s1W35NzSsP qVJzUFcF5nfwSAJrI5M9P9v0y36MCQcq8wfu1l6NZWTlDVk3kRQnnk4zC ifYvlTIWkwFzzkAwasYklHjFEkjAU+CNYKxIOH/+IwdVG2YOdwV93rOhc A==; X-CSE-ConnectionGUID: 3dTUNmvLQy2rS/y02F+uOA== X-CSE-MsgGUID: ArgjNlhGTaaWGWif61EC8Q== X-IronPort-AV: E=Sophos;i="6.08,261,1712646000"; d="scan'208";a="259283598" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 24 Jun 2024 03:05:25 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 24 Jun 2024 03:05:03 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 24 Jun 2024 03:04:56 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , CC: , , , , , , , , "Manikandan Muralidharan" Subject: [PATCH 2/5] ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes Date: Mon, 24 Jun 2024 15:34:28 +0530 Message-ID: <20240624100431.191172-3-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240624100431.191172-1-manikandan.m@microchip.com> References: <20240624100431.191172-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The driver data specific to each pinctrl GPIO bank compatible nodes are not the same and declaring additional compatible string as fallback has no specific purpose, hence, removing the additional compatible string from the pinctrl nodes in DT to comply with atmel,at91-pinctrl.txt documentation. Signed-off-by: Manikandan Muralidharan --- arch/arm/boot/dts/microchip/at91sam9n12.dtsi | 2 +- arch/arm/boot/dts/microchip/at91sam9x5.dtsi | 2 +- arch/arm/boot/dts/microchip/sam9x60.dtsi | 2 +- arch/arm/boot/dts/microchip/sama5d3.dtsi | 2 +- arch/arm/boot/dts/microchip/sama5d4.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi b/arch/arm/boot/d= ts/microchip/at91sam9n12.dtsi index 9aa22195051d..844bd50943fc 100644 --- a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi @@ -226,7 +226,7 @@ dma: dma-controller@ffffec00 { pinctrl@fffff400 { #address-cells =3D <1>; #size-cells =3D <1>; - compatible =3D "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl",= "simple-mfd"; + compatible =3D "atmel,at91sam9x5-pinctrl", "simple-mfd"; ranges =3D <0xfffff400 0xfffff400 0x800>; =20 atmel,mux-mask =3D < diff --git a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi b/arch/arm/boot/dt= s/microchip/at91sam9x5.dtsi index d41d7c844200..27c1f2861cc3 100644 --- a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi @@ -202,7 +202,7 @@ dma1: dma-controller@ffffee00 { pinctrl: pinctrl@fffff400 { #address-cells =3D <1>; #size-cells =3D <1>; - compatible =3D "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl",= "simple-mfd"; + compatible =3D "atmel,at91sam9x5-pinctrl", "simple-mfd"; ranges =3D <0xfffff400 0xfffff400 0x800>; =20 /* shared pinctrl settings */ diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/m= icrochip/sam9x60.dtsi index 4e71ae63edf1..797855e78058 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -1223,7 +1223,7 @@ AT91_XDMAC_DT_PERID(28))>, pinctrl: pinctrl@fffff400 { #address-cells =3D <1>; #size-cells =3D <1>; - compatible =3D "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl"= , "atmel,at91rm9200-pinctrl", "simple-mfd"; + compatible =3D "microchip,sam9x60-pinctrl", "simple-mfd"; ranges =3D <0xfffff400 0xfffff400 0x800>; =20 /* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */ diff --git a/arch/arm/boot/dts/microchip/sama5d3.dtsi b/arch/arm/boot/dts/m= icrochip/sama5d3.dtsi index f1614dcd7d28..39865133aa56 100644 --- a/arch/arm/boot/dts/microchip/sama5d3.dtsi +++ b/arch/arm/boot/dts/microchip/sama5d3.dtsi @@ -493,7 +493,7 @@ aic: interrupt-controller@fffff000 { pinctrl: pinctrl@fffff200 { #address-cells =3D <1>; #size-cells =3D <1>; - compatible =3D "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "s= imple-mfd"; + compatible =3D "atmel,sama5d3-pinctrl", "simple-mfd"; ranges =3D <0xfffff200 0xfffff200 0xa00>; atmel,mux-mask =3D < /* A B C */ diff --git a/arch/arm/boot/dts/microchip/sama5d4.dtsi b/arch/arm/boot/dts/m= icrochip/sama5d4.dtsi index 69dd4e7b4c14..b253ba33fc38 100644 --- a/arch/arm/boot/dts/microchip/sama5d4.dtsi +++ b/arch/arm/boot/dts/microchip/sama5d4.dtsi @@ -791,7 +791,7 @@ dbgu: serial@fc069000 { pinctrl: pinctrl@fc06a000 { #address-cells =3D <1>; #size-cells =3D <1>; - compatible =3D "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "s= imple-mfd"; + compatible =3D "atmel,sama5d3-pinctrl", "simple-mfd"; ranges =3D <0xfc068000 0xfc068000 0x100 0xfc06a000 0xfc06a000 0x4000>; /* WARNING: revisit as pin spec has changed */ --=20 2.25.1