From nobody Wed Dec 17 12:19:19 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37FFA16F298; Sat, 22 Jun 2024 15:07:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719068855; cv=none; b=f4fktF3LSR5FL/n1/A4xbL+UnMi1xMX4YWLAKWFhhFqebJZs27cxa5XORAbB9ixUdO1g2NQEZs5kBySv42EG6fd2Eou1ljTWVmS7wDr29x5zflCeTLrioIzgiA2UyzQqyVMEshYqkOb3bDz/8zdeNyLsKGkGK89AA553mJ4SQTc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719068855; c=relaxed/simple; bh=IkrAfY68bFi4o7WHsDeoec80a79Xpih8gQk2O74LGVQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=AS5i0jufrCC8m3GP/QpaLsnenQTOpA8QvU6/XyOuwlJFFqZ3Dh+p77IYaTVMmX3sM0c0ApsulL409WEksCaFdnoBKAH6dGbSK7ep5JCal92I0YpqS/yxHwwCB1zH4WLfNZTrZ0PUALd8K7SiATtLQoppL2yL8lfLzB+4Cj0iJ2I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=d13D9Fyj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="d13D9Fyj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C67ADC4AF0A; Sat, 22 Jun 2024 15:07:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719068854; bh=IkrAfY68bFi4o7WHsDeoec80a79Xpih8gQk2O74LGVQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=d13D9FyjAlFWXRdMgr71ZKD1qPOw+wJTwoX7hVGFBBoiAjJ1STpWSbehVKbnj9Zxt o0+2Ta9E1ngJpPDNlVDg2cSgRNp2tMncWQX8l5r/q7SAQRhlNBcKfbpjPgjS+iYVy5 8PXDJQ07Uqb8VTecB+CNOjMtTnIeiPSNtDY3qTtCgFDjn9uTl3ca31H16l956UEJT7 57wj8MXzl3rhmTgYllDOUTriq2lDaAe+lByy085XEHrHcgLr0jsB166JjMTi4FtQRT CR2zam6ADrcnmUG0bjckvePbNAELQ2YC2+kkoznM+8x1Drb1e3uMgKR8G8kKaKcf1P SqF7Gk3eFx9zQ== Received: by wens.tw (Postfix, from userid 1000) id A31E15F725; Sat, 22 Jun 2024 23:07:32 +0800 (CST) From: Chen-Yu Tsai To: Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Chen-Yu Tsai Subject: [PATCH 1/3] dt-bindings: sram: sunxi-sram: Add regulators child Date: Sat, 22 Jun 2024 23:07:29 +0800 Message-Id: <20240622150731.1105901-2-wens@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240622150731.1105901-1-wens@kernel.org> References: <20240622150731.1105901-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Samuel Holland Some sunxi SoCs have in-package regulators controlled by a register in the system control MMIO block. Allow a child node for this regulator device in addition to SRAM child nodes. Signed-off-by: Samuel Holland Reviewed-by: Krzysztof Kozlowski Signed-off-by: Chen-Yu Tsai --- .../allwinner,sun4i-a10-system-control.yaml | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-sys= tem-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a= 10-system-control.yaml index cf07b8f787a6..d9322704f358 100644 --- a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-con= trol.yaml +++ b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-con= trol.yaml @@ -56,6 +56,9 @@ properties: ranges: true =20 patternProperties: + "^regulators@[0-9a-f]+$": + $ref: /schemas/regulator/allwinner,sun20i-d1-system-ldos.yaml# + "^sram@[a-f0-9]+": $ref: /schemas/sram/sram.yaml# unevaluatedProperties: false @@ -130,3 +133,28 @@ examples: }; }; }; + + - | + syscon@3000000 { + compatible =3D "allwinner,sun20i-d1-system-control"; + reg =3D <0x3000000 0x1000>; + ranges; + #address-cells =3D <1>; + #size-cells =3D <1>; + + regulators@3000150 { + compatible =3D "allwinner,sun20i-d1-system-ldos"; + reg =3D <0x3000150 0x4>; + + reg_ldoa: ldoa { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + reg_ldob: ldob { + regulator-name =3D "vcc-dram"; + regulator-min-microvolt =3D <1500000>; + regulator-max-microvolt =3D <1500000>; + }; + }; + }; --=20 2.39.2 From nobody Wed Dec 17 12:19:19 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37F73154BE7; Sat, 22 Jun 2024 15:07:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719068855; cv=none; b=BWP5B3mwt0/SomAJ/lEgnBOUS6V/BwMDNmbUADP/F47iIZpJn4/6iMSo8csQm0JIdCIgOkNNpcZtMeq4GPhOz3+wtFDn63BP+8URbf6iqkdkqnNH/xLxfBj11fxJTlOcseQMaF6K7Bh8LSsvmHvTW9Nw35AXvPQ8MY0pBXX0y5I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719068855; c=relaxed/simple; bh=FkLEANghdY0F2D5oAhPpzR3TSX+luZAk5onCsfRlqBA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Ht+O8dkRBNXOqriuxJIpqxkP7VtNy0Ncy2SFWXYX50eOFNJQD//DGUcYGPQ5t3xe+BVl5U63Ht18wgLe1smZX1iWZwWkThl7gJJk00prOvm11MIV/Iu7N7m2pQgyEU4B13sh+V3jdmibYU7xs7atPAGIhSkN5aDXozEU/Kwq3fQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KAHAxa3c; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KAHAxa3c" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C450CC4AF09; Sat, 22 Jun 2024 15:07:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719068854; bh=FkLEANghdY0F2D5oAhPpzR3TSX+luZAk5onCsfRlqBA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KAHAxa3cyqn+is4Ur9RvX89VJ5N24VnFsJ4lM9RIBxdR1c4OlWYUt1ck7wimyjFqL cyrwM32ibLLYu/jbT8anZF4vdW4lfswSeZ7d2OtdIY4u0lCGpp+Yz9jdLjs5rc4Ae5 QnAclpNZkg2OX1ZPgJywYRMp/FWeFUgpKkil/1+WUnqCGsgl8Q4R57f/Tks29rnFJ1 0ZhsbNVUg24Wduhlzl99PP4GStWBUTQhAoou674xYgb9aMGYS1WTEZuz8o9mcQJ8Qa WyUwG/f4SE7zdyEmzXqXOLE4f5hnmFJjZ3a0PY0CnoH6m+iCxAE/tq+xZZ4NOrdl9a k4uvOWV3hmaXw== Received: by wens.tw (Postfix, from userid 1000) id AFE9B60341; Sat, 22 Jun 2024 23:07:32 +0800 (CST) From: Chen-Yu Tsai To: Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] riscv: dts: allwinner: d1s-t113: Add system LDOs Date: Sat, 22 Jun 2024 23:07:30 +0800 Message-Id: <20240622150731.1105901-3-wens@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240622150731.1105901-1-wens@kernel.org> References: <20240622150731.1105901-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen-Yu Tsai Now that the bindings for the system LDOs have been merged, the nodes for the system LDOs can be added. These are used on the ClockworkPi. This was originally part of Samuel's D1 device tree series [1], but was dropped in v5 as the regulator bindings weren't merged at the time. [1] https://lore.kernel.org/linux-sunxi/20221231233851.24923-1-samuel@sholl= and.org/ Signed-off-by: Chen-Yu Tsai --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv= /boot/dts/allwinner/sunxi-d1s-t113.dtsi index 5a9d7f5a75b4..e4175adb028d 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -396,6 +396,17 @@ syscon: syscon@3000000 { ranges; #address-cells =3D <1>; #size-cells =3D <1>; + + regulators@3000150 { + compatible =3D "allwinner,sun20i-d1-system-ldos"; + reg =3D <0x3000150 0x4>; + + reg_ldoa: ldoa { + }; + + reg_ldob: ldob { + }; + }; }; =20 dma: dma-controller@3002000 { --=20 2.39.2 From nobody Wed Dec 17 12:19:19 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37F2214C5A4; Sat, 22 Jun 2024 15:07:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719068855; cv=none; b=cVbzcxSpwXDVXy2YhirAzRuV+AZCXehdyJH6E6IqaF/fsd7EN8IdOcr9bQ0ZnQAEgCFw/SIXyQ6sUDzBAJ+VtOhwp1Z3n2Y0QxcrpWv01ktsCosmz+DMkF8xIozVaVMZ6iH+xReKnHbA2NMM32iq7WUe9EV7rN7pzD5zpRCEdEw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719068855; c=relaxed/simple; bh=pPpig+G1GRgZ3bzBtjA5Gx0xHcrH1G49ovyzLm8XB/Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WJ43B3Gbcen/qVowOnceoHaSKI5k7Cdfu1wi/1QzdyUldFs3+hsGWOzwXCswuaMQXV7Cacxpn3JoKs46LBqtywh54cusDLABzIOLLchgAIFvAT9IM4lCTpp91Wuh91zj2n2HLoUc/cLInbzKSX8/uTuhsC7IrOnJOsXYf5vRNb4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bjIYGYx+; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bjIYGYx+" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C0FDBC32789; Sat, 22 Jun 2024 15:07:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719068854; bh=pPpig+G1GRgZ3bzBtjA5Gx0xHcrH1G49ovyzLm8XB/Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bjIYGYx+oHWeU9C+o5a6LmdN9SK9KzgzCo+G1iVxMGWkzBCCpua/lAcCdsXxKtPci 3MjSUXGi5HDrtinArzGv/1fen2jQSJdj3Y/3nKPRIRFCRewnvJZiYRUn+HtyVCo6/N 7luaRZVCSTAysZUZlcZy2Yb6yOpDun6bbxpcFS429Ds2U8wdbRaUTXcpyEi0fPo9FJ fvKlJZ5yKnxVqSO5Tr2sE2P96yCbqPxbsLClSH1KscmGtgIVfuuI6GcUQ8Sl7Z8OIa 3SKcjYwpky4CVTj7kPa9/VcLlcuw5fDaFIMEpldfmDy/BADKe0MQ0C1DRChfQJsJST 0wAjtWJzfsJew== Received: by wens.tw (Postfix, from userid 1000) id B68F260319; Sat, 22 Jun 2024 23:07:32 +0800 (CST) From: Chen-Yu Tsai To: Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt , Chen-Yu Tsai Subject: [PATCH 3/3] riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees Date: Sat, 22 Jun 2024 23:07:31 +0800 Message-Id: <20240622150731.1105901-4-wens@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240622150731.1105901-1-wens@kernel.org> References: <20240622150731.1105901-1-wens@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Samuel Holland Clockwork Tech manufactures several SoMs for their RasPi CM3-compatible "ClockworkPi" mainboard. Their R-01 SoM features the Allwinner D1 SoC. The R-01 contains only the CPU, DRAM, and always-on voltage regulation; it does not merit a separate devicetree. The ClockworkPi mainboard features analog audio, a MIPI-DSI panel, USB host and peripheral ports, an Ampak AP6256 WiFi/Bluetooth module, and an X-Powers AXP228 PMIC for managing a Li-ion battery. The DevTerm is a complete system which extends the ClockworkPi mainboard with a MIPI-DSI panel and a pair of expansion boards. These expansion boards provide a fan, a USB keyboard, speakers, and a thermal printer. Acked-by: Palmer Dabbelt Signed-off-by: Samuel Holland Signed-off-by: Chen-Yu Tsai --- arch/riscv/boot/dts/allwinner/Makefile | 2 + .../allwinner/sun20i-d1-clockworkpi-v3.14.dts | 252 ++++++++++++++++++ .../dts/allwinner/sun20i-d1-devterm-v3.14.dts | 36 +++ 3 files changed, 290 insertions(+) create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.= 14.dts create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.d= ts diff --git a/arch/riscv/boot/dts/allwinner/Makefile b/arch/riscv/boot/dts/a= llwinner/Makefile index 87f70b1af6b4..1c91be38ea16 100644 --- a/arch/riscv/boot/dts/allwinner/Makefile +++ b/arch/riscv/boot/dts/allwinner/Makefile @@ -1,4 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_SUNXI) +=3D sun20i-d1-clockworkpi-v3.14.dtb +dtb-$(CONFIG_ARCH_SUNXI) +=3D sun20i-d1-devterm-v3.14.dtb dtb-$(CONFIG_ARCH_SUNXI) +=3D sun20i-d1-dongshan-nezha-stu.dtb dtb-$(CONFIG_ARCH_SUNXI) +=3D sun20i-d1-lichee-rv-86-panel-480p.dtb dtb-$(CONFIG_ARCH_SUNXI) +=3D sun20i-d1-lichee-rv-86-panel-720p.dtb diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dts = b/arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dts new file mode 100644 index 000000000000..750aec6cf2f2 --- /dev/null +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dts @@ -0,0 +1,252 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// Copyright (C) 2022 Samuel Holland + +#include + +/dts-v1/; + +#include "sun20i-d1.dtsi" +#include "sun20i-common-regulators.dtsi" + +/ { + model =3D "ClockworkPi v3.14 (R-01)"; + compatible =3D "clockwork,r-01-clockworkpi-v3.14", "allwinner,sun20i-d1"; + + aliases { + ethernet0 =3D &ap6256; + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + /* + * This regulator is PWM-controlled, but the PWM controller is not + * yet supported, so fix the regulator to its default voltage. + */ + reg_vdd_cpu: vdd-cpu { + compatible =3D "regulator-fixed"; + regulator-name =3D "vdd-cpu"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <®_vcc>; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + reset-gpios =3D <&pio 6 11 GPIO_ACTIVE_LOW>; /* PG11/GPIO3 */ + }; +}; + +&cpu0 { + cpu-supply =3D <®_vdd_cpu>; +}; + +&dcxo { + clock-frequency =3D <24000000>; +}; + +&ehci1 { + status =3D "okay"; +}; + +&i2c0 { + pinctrl-0 =3D <&i2c0_pb10_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; + + axp221: pmic@34 { + compatible =3D "x-powers,axp228", "x-powers,axp221"; + reg =3D <0x34>; + interrupt-parent =3D <&pio>; + interrupts =3D <4 9 IRQ_TYPE_LEVEL_LOW>; /* PE9/GPIO2 */ + interrupt-controller; + #interrupt-cells =3D <1>; + + ac_power_supply: ac-power { + compatible =3D "x-powers,axp221-ac-power-supply"; + }; + + axp_adc: adc { + compatible =3D "x-powers,axp221-adc"; + #io-channel-cells =3D <1>; + }; + + battery_power_supply: battery-power { + compatible =3D "x-powers,axp221-battery-power-supply"; + }; + + axp_gpio: gpio { + compatible =3D "x-powers,axp221-gpio"; + gpio-controller; + #gpio-cells =3D <2>; + }; + + regulators { + x-powers,dcdc-freq =3D <3000>; + + reg_dcdc1: dcdc1 { + regulator-name =3D "sys-3v3"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_dcdc3: dcdc3 { + regulator-name =3D "sys-1v8"; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + reg_aldo1: aldo1 { + regulator-name =3D "aud-3v3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_aldo2: aldo2 { + regulator-name =3D "disp-3v3"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_aldo3: aldo3 { + regulator-name =3D "vdd-wifi"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + }; + + /* DLDO1 and ELDO1-3 are connected in parallel. */ + reg_dldo1: dldo1 { + regulator-name =3D "vbat-wifi-a"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + /* DLDO2-DLDO4 are connected in parallel. */ + reg_dldo2: dldo2 { + regulator-name =3D "vcc-3v3-ext-a"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_dldo3: dldo3 { + regulator-name =3D "vcc-3v3-ext-b"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_dldo4: dldo4 { + regulator-name =3D "vcc-3v3-ext-c"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_eldo1: eldo1 { + regulator-name =3D "vbat-wifi-b"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_eldo2: eldo2 { + regulator-name =3D "vbat-wifi-c"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_eldo3: eldo3 { + regulator-name =3D "vbat-wifi-d"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + }; + + usb_power_supply: usb-power { + compatible =3D "x-powers,axp221-usb-power-supply"; + status =3D "disabled"; + }; + }; +}; + +&mmc0 { + broken-cd; + bus-width =3D <4>; + disable-wp; + vmmc-supply =3D <®_dcdc1>; + vqmmc-supply =3D <®_vcc_3v3>; + pinctrl-0 =3D <&mmc0_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&mmc1 { + bus-width =3D <4>; + mmc-pwrseq =3D <&wifi_pwrseq>; + non-removable; + vmmc-supply =3D <®_dldo1>; + vqmmc-supply =3D <®_aldo3>; + pinctrl-0 =3D <&mmc1_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; + + ap6256: wifi@1 { + compatible =3D "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; + reg =3D <1>; + interrupt-parent =3D <&pio>; + interrupts =3D <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10/GPIO4 */ + interrupt-names =3D "host-wake"; + }; +}; + +&ohci1 { + status =3D "okay"; +}; + +&pio { + vcc-pg-supply =3D <®_ldoa>; +}; + +&uart0 { + pinctrl-0 =3D <&uart0_pb8_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&uart1 { + uart-has-rtscts; + pinctrl-0 =3D <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; + + bluetooth { + compatible =3D "brcm,bcm4345c5"; + interrupt-parent =3D <&pio>; + interrupts =3D <6 17 IRQ_TYPE_LEVEL_HIGH>; /* PG17/GPIO6 */ + device-wakeup-gpios =3D <&pio 6 16 GPIO_ACTIVE_HIGH>; /* PG16/GPIO7 */ + shutdown-gpios =3D <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18/GPIO5 */ + max-speed =3D <1500000>; + vbat-supply =3D <®_dldo1>; + vddio-supply =3D <®_aldo3>; + }; +}; + +&usb_otg { + dr_mode =3D "peripheral"; + status =3D "okay"; +}; + +&usbphy { + usb0_vbus_power-supply =3D <&ac_power_supply>; + usb1_vbus-supply =3D <®_vcc>; + status =3D "okay"; +}; diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts b/ar= ch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts new file mode 100644 index 000000000000..bc5c84f22762 --- /dev/null +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// Copyright (C) 2022 Samuel Holland + +#include "sun20i-d1-clockworkpi-v3.14.dts" + +/ { + model =3D "Clockwork DevTerm (R-01)"; + compatible =3D "clockwork,r-01-devterm-v3.14", + "clockwork,r-01-clockworkpi-v3.14", + "allwinner,sun20i-d1"; + + fan { + compatible =3D "gpio-fan"; + gpios =3D <&pio 3 10 GPIO_ACTIVE_HIGH>; /* PD10/GPIO41 */ + gpio-fan,speed-map =3D <0 0>, + <6000 1>; + #cooling-cells =3D <2>; + }; + + i2c-gpio-0 { + compatible =3D "i2c-gpio"; + sda-gpios =3D <&pio 3 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD14/GP= IO44 */ + scl-gpios =3D <&pio 3 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD15/GP= IO45 */ + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@54 { + compatible =3D "ti,adc101c"; + reg =3D <0x54>; + interrupt-parent =3D <&pio>; + interrupts =3D <4 12 IRQ_TYPE_LEVEL_LOW>; /* PE12/GPIO35 */ + vref-supply =3D <®_dldo2>; + #io-channel-cells =3D <1>; + }; + }; +}; --=20 2.39.2