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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240621-topic-sm8650-upstream-fix-dispcc-v1-1-7b297dd9fcc1@linaro.org> References: <20240621-topic-sm8650-upstream-fix-dispcc-v1-0-7b297dd9fcc1@linaro.org> In-Reply-To: <20240621-topic-sm8650-upstream-fix-dispcc-v1-0-7b297dd9fcc1@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Konrad Dybcio , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2843; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=o8Jk/KDgS55zSjUEldegAfGbkL6Ys6e48LJPFBGTp74=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBmdYfDnD+UDG34Hq8SxNde8xLsCxAmu9Zzo8CqFw2x vfwtYZyJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZnWHwwAKCRB33NvayMhJ0a+pD/ 9Pj5oFBpclrEjkPLmY5u7a/C8FuDKtb2YBM+SrWBilpqGoUo0F7A6U3iuqvpvA/6GPGRHwZMKnC29X 8W4OWwUwIiJnc6a1N/3J7eZC4OFE0HwiWxiF8dVPKj2BPNeTFVungpupJ11ODK9ZzzgpOAqNZYxyXV YDTvyJCvFsgMmL18Es62eiNbTPkMnvayk0DJz+LYkDIXNrFmHaiedzT8yZM9yF2ONkfXCJfzeGAQ8q cHW2OkAgRWDu++oL8SpOrjFCLRVZcziUXvVgEfbNUe3Pns64y2x4meC2s6bEksj/xjm3j9ErxzUU7u T/0ffojPHMAm0SV2uFDOKAyKE/2lyz5IX5APxaup+sHUvTBNs9+AssqWTzYWcpHOd4sR32iNL6Xiut GslGCicZPdBgBMneR2p2n9HYLHPbyQakx7d6hf6r9l+C0oXrVLMv7EagnLsKwPMT6Wz6DmxhxS+CWi sf+vnBr9jxhSV049aCdjNWAFf3sgI4YUBNH2NxwjjjaE0hh0SNPLVKCry7MGDRch5lacgjX+3HOaAm pdSxpk8nfzFL5KiCZgLSGmoUVGQz2p2UEnlaJNmm44d+K67vFfLDUdD+ACJGxvkN+AZPKFGhKEIz1h A3UFwwqKlZ8stW01HdW1tTBMhIE90liIIBRv2wA2JLshPH/wQTGpUAo3f8cA== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE The RCG's clk src has to be parked at XO while disabling as per the HW recommendation, hence use clk_rcg2_shared_ops to achieve the same. Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller dr= iver") Signed-off-by: Neil Armstrong --- drivers/clk/qcom/dispcc-sm8650.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/clk/qcom/dispcc-sm8650.c b/drivers/clk/qcom/dispcc-sm8= 650.c index c9d2751f5cb8..31c82f791b44 100644 --- a/drivers/clk/qcom/dispcc-sm8650.c +++ b/drivers/clk/qcom/dispcc-sm8650.c @@ -339,7 +339,7 @@ static struct clk_rcg2 disp_cc_mdss_dptx0_aux_clk_src = =3D { .parent_data =3D disp_cc_parent_data_0, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_0), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 @@ -457,7 +457,7 @@ static struct clk_rcg2 disp_cc_mdss_dptx2_aux_clk_src = =3D { .parent_data =3D disp_cc_parent_data_0, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_0), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 @@ -516,7 +516,7 @@ static struct clk_rcg2 disp_cc_mdss_dptx3_aux_clk_src = =3D { .parent_data =3D disp_cc_parent_data_0, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_0), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 @@ -560,7 +560,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src =3D { .parent_data =3D disp_cc_parent_data_5, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_5), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 @@ -575,7 +575,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src =3D { .parent_data =3D disp_cc_parent_data_5, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_5), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 @@ -647,7 +647,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src =3D { .parent_data =3D disp_cc_parent_data_0, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_0), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 @@ -667,7 +667,7 @@ static struct clk_rcg2 disp_cc_sleep_clk_src =3D { .parent_data =3D disp_cc_parent_data_9, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_9), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 @@ -682,7 +682,7 @@ static struct clk_rcg2 disp_cc_xo_clk_src =3D { .parent_data =3D disp_cc_parent_data_0_ao, .num_parents =3D ARRAY_SIZE(disp_cc_parent_data_0_ao), .flags =3D CLK_SET_RATE_PARENT, - .ops =3D &clk_rcg2_ops, + .ops =3D &clk_rcg2_shared_ops, }, }; =20 --=20 2.34.1