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Renaming done automatically through sed rules: s/stm32_exti_set_type/stm32mp_exti_convert_type/g s/stm32_exti_h_/stm32mp_exti_/g s/stm32_exti/stm32mp_exti/g s/stm32_bank/bank/g s/stm32_/stm32mp_/g s/STM32_/STM32MP_/g s/STM32MP1_/STM32MP_/g s/stm32mp1_exti_/stm32mp_exti_/g s/stm32-exti-h/stm32mp-exti/g Manually fix some indentation after the rename. Signed-off-by: Antonio Borneo --- drivers/irqchip/irq-stm32mp-exti.c | 272 ++++++++++++++--------------- 1 file changed, 136 insertions(+), 136 deletions(-) diff --git a/drivers/irqchip/irq-stm32mp-exti.c b/drivers/irqchip/irq-stm32= mp-exti.c index 8a45ece2e198f..3ceff6d25b702 100644 --- a/drivers/irqchip/irq-stm32mp-exti.c +++ b/drivers/irqchip/irq-stm32mp-exti.c @@ -38,7 +38,7 @@ =20 #define EXTI_CID1 1 =20 -struct stm32_exti_bank { +struct stm32mp_exti_bank { u32 imr_ofst; u32 rtsr_ofst; u32 ftsr_ofst; @@ -49,15 +49,15 @@ struct stm32_exti_bank { u32 seccfgr_ofst; }; =20 -struct stm32_exti_drv_data { - const struct stm32_exti_bank **exti_banks; +struct stm32mp_exti_drv_data { + const struct stm32mp_exti_bank **exti_banks; const u8 *desc_irqs; u32 bank_nr; }; =20 -struct stm32_exti_chip_data { - struct stm32_exti_host_data *host_data; - const struct stm32_exti_bank *reg_bank; +struct stm32mp_exti_chip_data { + struct stm32mp_exti_host_data *host_data; + const struct stm32mp_exti_bank *reg_bank; struct raw_spinlock rlock; u32 wake_active; u32 mask_cache; @@ -66,16 +66,16 @@ struct stm32_exti_chip_data { u32 event_reserved; }; =20 -struct stm32_exti_host_data { +struct stm32mp_exti_host_data { void __iomem *base; struct device *dev; - struct stm32_exti_chip_data *chips_data; - const struct stm32_exti_drv_data *drv_data; + struct stm32mp_exti_chip_data *chips_data; + const struct stm32mp_exti_drv_data *drv_data; struct hwspinlock *hwlock; bool dt_has_irqs_desc; /* skip internal desc_irqs array and get it from D= T */ }; =20 -static const struct stm32_exti_bank stm32mp1_exti_b1 =3D { +static const struct stm32mp_exti_bank stm32mp_exti_b1 =3D { .imr_ofst =3D 0x80, .rtsr_ofst =3D 0x00, .ftsr_ofst =3D 0x04, @@ -86,7 +86,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 =3D { .seccfgr_ofst =3D 0x14, }; =20 -static const struct stm32_exti_bank stm32mp1_exti_b2 =3D { +static const struct stm32mp_exti_bank stm32mp_exti_b2 =3D { .imr_ofst =3D 0x90, .rtsr_ofst =3D 0x20, .ftsr_ofst =3D 0x24, @@ -97,7 +97,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 =3D { .seccfgr_ofst =3D 0x34, }; =20 -static const struct stm32_exti_bank stm32mp1_exti_b3 =3D { +static const struct stm32mp_exti_bank stm32mp_exti_b3 =3D { .imr_ofst =3D 0xA0, .rtsr_ofst =3D 0x40, .ftsr_ofst =3D 0x44, @@ -108,17 +108,17 @@ static const struct stm32_exti_bank stm32mp1_exti_b3 = =3D { .seccfgr_ofst =3D 0x54, }; =20 -static const struct stm32_exti_bank *stm32mp1_exti_banks[] =3D { - &stm32mp1_exti_b1, - &stm32mp1_exti_b2, - &stm32mp1_exti_b3, +static const struct stm32mp_exti_bank *stm32mp_exti_banks[] =3D { + &stm32mp_exti_b1, + &stm32mp_exti_b2, + &stm32mp_exti_b3, }; =20 -static struct irq_chip stm32_exti_h_chip; -static struct irq_chip stm32_exti_h_chip_direct; +static struct irq_chip stm32mp_exti_chip; +static struct irq_chip stm32mp_exti_chip_direct; =20 #define EXTI_INVALID_IRQ U8_MAX -#define STM32MP1_DESC_IRQ_SIZE (ARRAY_SIZE(stm32mp1_exti_banks) * IRQS_PER= _BANK) +#define STM32MP_DESC_IRQ_SIZE (ARRAY_SIZE(stm32mp_exti_banks) * IRQS_PER_= BANK) =20 /* * Use some intentionally tricky logic here to initialize the whole array = to @@ -132,7 +132,7 @@ __diag_ignore_all("-Woverride-init", =20 static const u8 stm32mp1_desc_irq[] =3D { /* default value */ - [0 ... (STM32MP1_DESC_IRQ_SIZE - 1)] =3D EXTI_INVALID_IRQ, + [0 ... (STM32MP_DESC_IRQ_SIZE - 1)] =3D EXTI_INVALID_IRQ, =20 [0] =3D 6, [1] =3D 7, @@ -181,7 +181,7 @@ static const u8 stm32mp1_desc_irq[] =3D { =20 static const u8 stm32mp13_desc_irq[] =3D { /* default value */ - [0 ... (STM32MP1_DESC_IRQ_SIZE - 1)] =3D EXTI_INVALID_IRQ, + [0 ... (STM32MP_DESC_IRQ_SIZE - 1)] =3D EXTI_INVALID_IRQ, =20 [0] =3D 6, [1] =3D 7, @@ -226,20 +226,20 @@ static const u8 stm32mp13_desc_irq[] =3D { =20 __diag_pop(); =20 -static const struct stm32_exti_drv_data stm32mp1_drv_data =3D { - .exti_banks =3D stm32mp1_exti_banks, - .bank_nr =3D ARRAY_SIZE(stm32mp1_exti_banks), +static const struct stm32mp_exti_drv_data stm32mp1_drv_data =3D { + .exti_banks =3D stm32mp_exti_banks, + .bank_nr =3D ARRAY_SIZE(stm32mp_exti_banks), .desc_irqs =3D stm32mp1_desc_irq, }; =20 -static const struct stm32_exti_drv_data stm32mp13_drv_data =3D { - .exti_banks =3D stm32mp1_exti_banks, - .bank_nr =3D ARRAY_SIZE(stm32mp1_exti_banks), +static const struct stm32mp_exti_drv_data stm32mp13_drv_data =3D { + .exti_banks =3D stm32mp_exti_banks, + .bank_nr =3D ARRAY_SIZE(stm32mp_exti_banks), .desc_irqs =3D stm32mp13_desc_irq, }; =20 -static int stm32_exti_set_type(struct irq_data *d, - unsigned int type, u32 *rtsr, u32 *ftsr) +static int stm32mp_exti_convert_type(struct irq_data *d, + unsigned int type, u32 *rtsr, u32 *ftsr) { u32 mask =3D BIT(d->hwirq % IRQS_PER_BANK); =20 @@ -263,45 +263,45 @@ static int stm32_exti_set_type(struct irq_data *d, return 0; } =20 -static void stm32_chip_suspend(struct stm32_exti_chip_data *chip_data, - u32 wake_active) +static void stm32mp_chip_suspend(struct stm32mp_exti_chip_data *chip_data, + u32 wake_active) { - const struct stm32_exti_bank *stm32_bank =3D chip_data->reg_bank; + const struct stm32mp_exti_bank *bank =3D chip_data->reg_bank; void __iomem *base =3D chip_data->host_data->base; =20 /* save rtsr, ftsr registers */ - chip_data->rtsr_cache =3D readl_relaxed(base + stm32_bank->rtsr_ofst); - chip_data->ftsr_cache =3D readl_relaxed(base + stm32_bank->ftsr_ofst); + chip_data->rtsr_cache =3D readl_relaxed(base + bank->rtsr_ofst); + chip_data->ftsr_cache =3D readl_relaxed(base + bank->ftsr_ofst); =20 - writel_relaxed(wake_active, base + stm32_bank->imr_ofst); + writel_relaxed(wake_active, base + bank->imr_ofst); } =20 -static void stm32_chip_resume(struct stm32_exti_chip_data *chip_data, - u32 mask_cache) +static void stm32mp_chip_resume(struct stm32mp_exti_chip_data *chip_data, + u32 mask_cache) { - const struct stm32_exti_bank *stm32_bank =3D chip_data->reg_bank; + const struct stm32mp_exti_bank *bank =3D chip_data->reg_bank; void __iomem *base =3D chip_data->host_data->base; =20 /* restore rtsr, ftsr, registers */ - writel_relaxed(chip_data->rtsr_cache, base + stm32_bank->rtsr_ofst); - writel_relaxed(chip_data->ftsr_cache, base + stm32_bank->ftsr_ofst); + writel_relaxed(chip_data->rtsr_cache, base + bank->rtsr_ofst); + writel_relaxed(chip_data->ftsr_cache, base + bank->ftsr_ofst); =20 - writel_relaxed(mask_cache, base + stm32_bank->imr_ofst); + writel_relaxed(mask_cache, base + bank->imr_ofst); } =20 /* directly set the target bit without reading first. */ -static inline void stm32_exti_write_bit(struct irq_data *d, u32 reg) +static inline void stm32mp_exti_write_bit(struct irq_data *d, u32 reg) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); void __iomem *base =3D chip_data->host_data->base; u32 val =3D BIT(d->hwirq % IRQS_PER_BANK); =20 writel_relaxed(val, base + reg); } =20 -static inline u32 stm32_exti_set_bit(struct irq_data *d, u32 reg) +static inline u32 stm32mp_exti_set_bit(struct irq_data *d, u32 reg) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); void __iomem *base =3D chip_data->host_data->base; u32 val; =20 @@ -312,9 +312,9 @@ static inline u32 stm32_exti_set_bit(struct irq_data *d= , u32 reg) return val; } =20 -static inline u32 stm32_exti_clr_bit(struct irq_data *d, u32 reg) +static inline u32 stm32mp_exti_clr_bit(struct irq_data *d, u32 reg) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); void __iomem *base =3D chip_data->host_data->base; u32 val; =20 @@ -325,15 +325,15 @@ static inline u32 stm32_exti_clr_bit(struct irq_data = *d, u32 reg) return val; } =20 -static void stm32_exti_h_eoi(struct irq_data *d) +static void stm32mp_exti_eoi(struct irq_data *d) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); - const struct stm32_exti_bank *stm32_bank =3D chip_data->reg_bank; + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); + const struct stm32mp_exti_bank *bank =3D chip_data->reg_bank; =20 raw_spin_lock(&chip_data->rlock); =20 - stm32_exti_write_bit(d, stm32_bank->rpr_ofst); - stm32_exti_write_bit(d, stm32_bank->fpr_ofst); + stm32mp_exti_write_bit(d, bank->rpr_ofst); + stm32mp_exti_write_bit(d, bank->fpr_ofst); =20 raw_spin_unlock(&chip_data->rlock); =20 @@ -341,36 +341,36 @@ static void stm32_exti_h_eoi(struct irq_data *d) irq_chip_eoi_parent(d); } =20 -static void stm32_exti_h_mask(struct irq_data *d) +static void stm32mp_exti_mask(struct irq_data *d) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); - const struct stm32_exti_bank *stm32_bank =3D chip_data->reg_bank; + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); + const struct stm32mp_exti_bank *bank =3D chip_data->reg_bank; =20 raw_spin_lock(&chip_data->rlock); - chip_data->mask_cache =3D stm32_exti_clr_bit(d, stm32_bank->imr_ofst); + chip_data->mask_cache =3D stm32mp_exti_clr_bit(d, bank->imr_ofst); raw_spin_unlock(&chip_data->rlock); =20 if (d->parent_data->chip) irq_chip_mask_parent(d); } =20 -static void stm32_exti_h_unmask(struct irq_data *d) +static void stm32mp_exti_unmask(struct irq_data *d) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); - const struct stm32_exti_bank *stm32_bank =3D chip_data->reg_bank; + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); + const struct stm32mp_exti_bank *bank =3D chip_data->reg_bank; =20 raw_spin_lock(&chip_data->rlock); - chip_data->mask_cache =3D stm32_exti_set_bit(d, stm32_bank->imr_ofst); + chip_data->mask_cache =3D stm32mp_exti_set_bit(d, bank->imr_ofst); raw_spin_unlock(&chip_data->rlock); =20 if (d->parent_data->chip) irq_chip_unmask_parent(d); } =20 -static int stm32_exti_h_set_type(struct irq_data *d, unsigned int type) +static int stm32mp_exti_set_type(struct irq_data *d, unsigned int type) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); - const struct stm32_exti_bank *stm32_bank =3D chip_data->reg_bank; + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); + const struct stm32mp_exti_bank *bank =3D chip_data->reg_bank; struct hwspinlock *hwlock =3D chip_data->host_data->hwlock; void __iomem *base =3D chip_data->host_data->base; u32 rtsr, ftsr; @@ -386,15 +386,15 @@ static int stm32_exti_h_set_type(struct irq_data *d, = unsigned int type) } } =20 - rtsr =3D readl_relaxed(base + stm32_bank->rtsr_ofst); - ftsr =3D readl_relaxed(base + stm32_bank->ftsr_ofst); + rtsr =3D readl_relaxed(base + bank->rtsr_ofst); + ftsr =3D readl_relaxed(base + bank->ftsr_ofst); =20 - err =3D stm32_exti_set_type(d, type, &rtsr, &ftsr); + err =3D stm32mp_exti_convert_type(d, type, &rtsr, &ftsr); if (err) goto unspinlock; =20 - writel_relaxed(rtsr, base + stm32_bank->rtsr_ofst); - writel_relaxed(ftsr, base + stm32_bank->ftsr_ofst); + writel_relaxed(rtsr, base + bank->rtsr_ofst); + writel_relaxed(ftsr, base + bank->ftsr_ofst); =20 unspinlock: if (hwlock) @@ -405,9 +405,9 @@ static int stm32_exti_h_set_type(struct irq_data *d, un= signed int type) return err; } =20 -static int stm32_exti_h_set_wake(struct irq_data *d, unsigned int on) +static int stm32mp_exti_set_wake(struct irq_data *d, unsigned int on) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); u32 mask =3D BIT(d->hwirq % IRQS_PER_BANK); =20 raw_spin_lock(&chip_data->rlock); @@ -422,7 +422,7 @@ static int stm32_exti_h_set_wake(struct irq_data *d, un= signed int on) return 0; } =20 -static int stm32_exti_h_set_affinity(struct irq_data *d, +static int stm32mp_exti_set_affinity(struct irq_data *d, const struct cpumask *dest, bool force) { if (d->parent_data->chip) @@ -431,77 +431,77 @@ static int stm32_exti_h_set_affinity(struct irq_data = *d, return IRQ_SET_MASK_OK_DONE; } =20 -static int stm32_exti_h_suspend(struct device *dev) +static int stm32mp_exti_suspend(struct device *dev) { - struct stm32_exti_host_data *host_data =3D dev_get_drvdata(dev); - struct stm32_exti_chip_data *chip_data; + struct stm32mp_exti_host_data *host_data =3D dev_get_drvdata(dev); + struct stm32mp_exti_chip_data *chip_data; int i; =20 for (i =3D 0; i < host_data->drv_data->bank_nr; i++) { chip_data =3D &host_data->chips_data[i]; - stm32_chip_suspend(chip_data, chip_data->wake_active); + stm32mp_chip_suspend(chip_data, chip_data->wake_active); } =20 return 0; } =20 -static int stm32_exti_h_resume(struct device *dev) +static int stm32mp_exti_resume(struct device *dev) { - struct stm32_exti_host_data *host_data =3D dev_get_drvdata(dev); - struct stm32_exti_chip_data *chip_data; + struct stm32mp_exti_host_data *host_data =3D dev_get_drvdata(dev); + struct stm32mp_exti_chip_data *chip_data; int i; =20 for (i =3D 0; i < host_data->drv_data->bank_nr; i++) { chip_data =3D &host_data->chips_data[i]; - stm32_chip_resume(chip_data, chip_data->mask_cache); + stm32mp_chip_resume(chip_data, chip_data->mask_cache); } =20 return 0; } =20 -static int stm32_exti_h_retrigger(struct irq_data *d) +static int stm32mp_exti_retrigger(struct irq_data *d) { - struct stm32_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d); - const struct stm32_exti_bank *stm32_bank =3D chip_data->reg_bank; + struct stm32mp_exti_chip_data *chip_data =3D irq_data_get_irq_chip_data(d= ); + const struct stm32mp_exti_bank *bank =3D chip_data->reg_bank; void __iomem *base =3D chip_data->host_data->base; u32 mask =3D BIT(d->hwirq % IRQS_PER_BANK); =20 - writel_relaxed(mask, base + stm32_bank->swier_ofst); + writel_relaxed(mask, base + bank->swier_ofst); =20 return 0; } =20 -static struct irq_chip stm32_exti_h_chip =3D { - .name =3D "stm32-exti-h", - .irq_eoi =3D stm32_exti_h_eoi, - .irq_mask =3D stm32_exti_h_mask, - .irq_unmask =3D stm32_exti_h_unmask, - .irq_retrigger =3D stm32_exti_h_retrigger, - .irq_set_type =3D stm32_exti_h_set_type, - .irq_set_wake =3D stm32_exti_h_set_wake, +static struct irq_chip stm32mp_exti_chip =3D { + .name =3D "stm32mp-exti", + .irq_eoi =3D stm32mp_exti_eoi, + .irq_mask =3D stm32mp_exti_mask, + .irq_unmask =3D stm32mp_exti_unmask, + .irq_retrigger =3D stm32mp_exti_retrigger, + .irq_set_type =3D stm32mp_exti_set_type, + .irq_set_wake =3D stm32mp_exti_set_wake, .flags =3D IRQCHIP_MASK_ON_SUSPEND, - .irq_set_affinity =3D IS_ENABLED(CONFIG_SMP) ? stm32_exti_h_set_affinity = : NULL, + .irq_set_affinity =3D IS_ENABLED(CONFIG_SMP) ? stm32mp_exti_set_affinity = : NULL, }; =20 -static struct irq_chip stm32_exti_h_chip_direct =3D { - .name =3D "stm32-exti-h-direct", +static struct irq_chip stm32mp_exti_chip_direct =3D { + .name =3D "stm32mp-exti-direct", .irq_eoi =3D irq_chip_eoi_parent, .irq_ack =3D irq_chip_ack_parent, - .irq_mask =3D stm32_exti_h_mask, - .irq_unmask =3D stm32_exti_h_unmask, + .irq_mask =3D stm32mp_exti_mask, + .irq_unmask =3D stm32mp_exti_unmask, .irq_retrigger =3D irq_chip_retrigger_hierarchy, .irq_set_type =3D irq_chip_set_type_parent, - .irq_set_wake =3D stm32_exti_h_set_wake, + .irq_set_wake =3D stm32mp_exti_set_wake, .flags =3D IRQCHIP_MASK_ON_SUSPEND, .irq_set_affinity =3D IS_ENABLED(CONFIG_SMP) ? irq_chip_set_affinity_pare= nt : NULL, }; =20 -static int stm32_exti_h_domain_alloc(struct irq_domain *dm, +static int stm32mp_exti_domain_alloc(struct irq_domain *dm, unsigned int virq, unsigned int nr_irqs, void *data) { - struct stm32_exti_host_data *host_data =3D dm->host_data; - struct stm32_exti_chip_data *chip_data; + struct stm32mp_exti_host_data *host_data =3D dm->host_data; + struct stm32mp_exti_chip_data *chip_data; u8 desc_irq; struct irq_fwspec *fwspec =3D data; struct irq_fwspec p_fwspec; @@ -525,7 +525,7 @@ static int stm32_exti_h_domain_alloc(struct irq_domain = *dm, =20 event_trg =3D readl_relaxed(host_data->base + chip_data->reg_bank->trg_of= st); chip =3D (event_trg & BIT(hwirq % IRQS_PER_BANK)) ? - &stm32_exti_h_chip : &stm32_exti_h_chip_direct; + &stm32mp_exti_chip : &stm32mp_exti_chip_direct; =20 irq_domain_set_hwirq_and_chip(dm, virq, hwirq, chip, chip_data); =20 @@ -564,18 +564,18 @@ static int stm32_exti_h_domain_alloc(struct irq_domai= n *dm, } =20 static struct -stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_= data, - u32 bank_idx, - struct device_node *node) +stm32mp_exti_chip_data *stm32mp_exti_chip_init(struct stm32mp_exti_host_da= ta *h_data, + u32 bank_idx, + struct device_node *node) { - const struct stm32_exti_bank *stm32_bank; - struct stm32_exti_chip_data *chip_data; + const struct stm32mp_exti_bank *bank; + struct stm32mp_exti_chip_data *chip_data; void __iomem *base =3D h_data->base; =20 - stm32_bank =3D h_data->drv_data->exti_banks[bank_idx]; + bank =3D h_data->drv_data->exti_banks[bank_idx]; chip_data =3D &h_data->chips_data[bank_idx]; chip_data->host_data =3D h_data; - chip_data->reg_bank =3D stm32_bank; + chip_data->reg_bank =3D bank; =20 raw_spin_lock_init(&chip_data->rlock); =20 @@ -583,23 +583,23 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm= 32_exti_host_data *h_data, * This IP has no reset, so after hot reboot we should * clear registers to avoid residue */ - writel_relaxed(0, base + stm32_bank->imr_ofst); + writel_relaxed(0, base + bank->imr_ofst); =20 /* reserve Secure events */ - chip_data->event_reserved =3D readl_relaxed(base + stm32_bank->seccfgr_of= st); + chip_data->event_reserved =3D readl_relaxed(base + bank->seccfgr_ofst); =20 pr_info("%pOF: bank%d\n", node, bank_idx); =20 return chip_data; } =20 -static const struct irq_domain_ops stm32_exti_h_domain_ops =3D { - .alloc =3D stm32_exti_h_domain_alloc, +static const struct irq_domain_ops stm32mp_exti_domain_ops =3D { + .alloc =3D stm32mp_exti_domain_alloc, .free =3D irq_domain_free_irqs_common, .xlate =3D irq_domain_xlate_twocell, }; =20 -static void stm32_exti_check_rif(struct stm32_exti_host_data *host_data) +static void stm32mp_exti_check_rif(struct stm32mp_exti_host_data *host_dat= a) { unsigned int bank, i, event; u32 cid, cidcfgr, hwcfgr1; @@ -620,21 +620,21 @@ static void stm32_exti_check_rif(struct stm32_exti_ho= st_data *host_data) } } =20 -static void stm32_exti_remove_irq(void *data) +static void stm32mp_exti_remove_irq(void *data) { struct irq_domain *domain =3D data; =20 irq_domain_remove(domain); } =20 -static int stm32_exti_probe(struct platform_device *pdev) +static int stm32mp_exti_probe(struct platform_device *pdev) { int ret, i; struct device *dev =3D &pdev->dev; struct device_node *np =3D dev->of_node; struct irq_domain *parent_domain, *domain; - struct stm32_exti_host_data *host_data; - const struct stm32_exti_drv_data *drv_data; + struct stm32mp_exti_host_data *host_data; + const struct stm32mp_exti_drv_data *drv_data; =20 host_data =3D devm_kzalloc(dev, sizeof(*host_data), GFP_KERNEL); if (!host_data) @@ -680,9 +680,9 @@ static int stm32_exti_probe(struct platform_device *pde= v) return PTR_ERR(host_data->base); =20 for (i =3D 0; i < drv_data->bank_nr; i++) - stm32_exti_chip_init(host_data, i, np); + stm32mp_exti_chip_init(host_data, i, np); =20 - stm32_exti_check_rif(host_data); + stm32mp_exti_check_rif(host_data); =20 parent_domain =3D irq_find_host(of_irq_find_parent(np)); if (!parent_domain) { @@ -692,7 +692,7 @@ static int stm32_exti_probe(struct platform_device *pde= v) =20 domain =3D irq_domain_add_hierarchy(parent_domain, 0, drv_data->bank_nr * IRQS_PER_BANK, - np, &stm32_exti_h_domain_ops, + np, &stm32mp_exti_domain_ops, host_data); =20 if (!domain) { @@ -700,7 +700,7 @@ static int stm32_exti_probe(struct platform_device *pde= v) return -ENOMEM; } =20 - ret =3D devm_add_action_or_reset(dev, stm32_exti_remove_irq, domain); + ret =3D devm_add_action_or_reset(dev, stm32mp_exti_remove_irq, domain); if (ret) return ret; =20 @@ -710,35 +710,35 @@ static int stm32_exti_probe(struct platform_device *p= dev) return 0; } =20 -static const struct of_device_id stm32_exti_ids[] =3D { +static const struct of_device_id stm32mp_exti_ids[] =3D { { .compatible =3D "st,stm32mp1-exti", .data =3D &stm32mp1_drv_data}, { .compatible =3D "st,stm32mp13-exti", .data =3D &stm32mp13_drv_data}, {}, }; -MODULE_DEVICE_TABLE(of, stm32_exti_ids); +MODULE_DEVICE_TABLE(of, stm32mp_exti_ids); =20 -static const struct dev_pm_ops stm32_exti_dev_pm_ops =3D { - NOIRQ_SYSTEM_SLEEP_PM_OPS(stm32_exti_h_suspend, stm32_exti_h_resume) +static const struct dev_pm_ops stm32mp_exti_dev_pm_ops =3D { + NOIRQ_SYSTEM_SLEEP_PM_OPS(stm32mp_exti_suspend, stm32mp_exti_resume) }; =20 -static struct platform_driver stm32_exti_driver =3D { - .probe =3D stm32_exti_probe, +static struct platform_driver stm32mp_exti_driver =3D { + .probe =3D stm32mp_exti_probe, .driver =3D { - .name =3D "stm32_exti", - .of_match_table =3D stm32_exti_ids, - .pm =3D &stm32_exti_dev_pm_ops, + .name =3D "stm32mp_exti", + .of_match_table =3D stm32mp_exti_ids, + .pm =3D &stm32mp_exti_dev_pm_ops, }, }; =20 -static int __init stm32_exti_arch_init(void) +static int __init stm32mp_exti_arch_init(void) { - return platform_driver_register(&stm32_exti_driver); + return platform_driver_register(&stm32mp_exti_driver); } =20 -static void __exit stm32_exti_arch_exit(void) +static void __exit stm32mp_exti_arch_exit(void) { - return platform_driver_unregister(&stm32_exti_driver); + return platform_driver_unregister(&stm32mp_exti_driver); } =20 -arch_initcall(stm32_exti_arch_init); -module_exit(stm32_exti_arch_exit); +arch_initcall(stm32mp_exti_arch_init); +module_exit(stm32mp_exti_arch_exit); --=20 2.34.1