From nobody Fri Dec 19 02:17:25 2025 Received: from mail-lj1-f181.google.com (mail-lj1-f181.google.com [209.85.208.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD52F14F9F1 for ; Wed, 19 Jun 2024 11:35:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718796954; cv=none; b=i7PozpzvppOvUrDa0yZ2d+Qnxd+yoL9o16VG0yQr7GPU8Lq+GL1+UUIAmlav0Zn82pig3jIdd1OUKRPGHxpGrIH5PQtv8tgoMWegfWuMhEMzlKH+zxCIDxv51p9Djf3mP163fnIyAw1t1k4xcJV4pUUWAReKGrYhj1doKIx68rc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718796954; c=relaxed/simple; bh=wS0PfgYkz/9P/N4HO75l9Imx1hqqHj8YIr6P010xDZA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jic3YYy/TzfxyfDRvvZN9PrcluQ3V50p9zyJ4cFlWuT0Unw148NbFsizDon24ghU/x1NKw4rBe8cNVHzPaVdIHbQ3zKuMgkllM3c59F7zPt3QpceDCZZiiN7MS0CJ0ozCtBhp4JaYe+e1q0o4yHxH2EZ54QvyK/9PO91Wy5gGqA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=IORZRoHn; arc=none smtp.client-ip=209.85.208.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="IORZRoHn" Received: by mail-lj1-f181.google.com with SMTP id 38308e7fff4ca-2ec34f0110dso1516091fa.1 for ; Wed, 19 Jun 2024 04:35:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1718796951; x=1719401751; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8DCplyIcxOlnYOD05MVWPnelaWgV0jkCglAEoSEzjaM=; b=IORZRoHnOmQMJjr7+8f4hjH4FOaN9fjHzMYqEkp+UkTZFAcnmkRzCEXll5lxKwCy2p kIzI4mVMs4pgM+AC39C4zMZyp5Sk9XnigGJqWpZWbChmcr40xqz8tMnucoxF8SaHF48S Xp9gZAl0m+PRiCpYNVfeXHWNivTXoTNaN50oihOmWP37SnRTL6DVh+cuTQe3qOSwGyIa Tx97Va3Pa4dw4KfhwT1/JQHyVmsHWBeHywThhsXD67Er/Zf9bZR7gfUm0LjMMJ4rPMNc aaqpn1n5qMF1aPNjhdWVIz6SkOrstOMfbn8GHCW5Ri5zJrMQxhMp6240/RoXLihbSgMU vQTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718796951; x=1719401751; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8DCplyIcxOlnYOD05MVWPnelaWgV0jkCglAEoSEzjaM=; b=pTmKNgeGpbjLr+g+Fz7IXjkvTBdP8aeQL56owYNcwrZxIff8v5kkKAqs2j0pd1yleN v5ZHHJLyki6s3DWwdtW9NcAfHqY7CWdXccxVgjHI8PlMUSlHQthkDovGm7bKyAQ1ohb1 6HXnr6O2YhwQ5boQyLbPldFTkK7hRKp6KUJzWoWj0+EI244UEQ4Juvd0zvtrfgraUj+Y 7CVQhIoSeKg803XjTWn94c+Rmr1cjBH0kCGX342HSAcS+XJwtinAwq2fRrPa39VnM018 EjJ4xud4cBbJazy7K/2E0CU/X6Gxc0nEaszKtuIg2Pif5ki5PomdqBp+GJ0lI6qPHPq0 JWUw== X-Forwarded-Encrypted: i=1; AJvYcCX9vuC/1xPJHvK4MoRqb3lrV/Cxr/PpHQ9c6n+ifIIVs3eyxTH2f78ebrETPVoq6mWsao35FSQvN7Q/XyabHBqS00v/Ty2D+rhnNhua X-Gm-Message-State: AOJu0Yx7tmTiaBa+S/15mku/NsVrdBjmEsLtmcVzGAgfn/u1/t5Wa/au bVduQcrte9+AvjfZmPVNJotlrxmd14F7ClOWzsZNN/G0ELws5n5kuQzb/zyhOMg= X-Google-Smtp-Source: AGHT+IFl03ofxCd9GRyKvjy/WzBtKYyK50aV8FZIus6pcW5Xx8qBswD4fqlYnwmmuxyZ9pdqNk8BJA== X-Received: by 2002:a05:651c:1255:b0:2ec:31d9:16e1 with SMTP id 38308e7fff4ca-2ec3cff8f63mr10405361fa.5.1718796949125; Wed, 19 Jun 2024 04:35:49 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:e67b:7ea9:5658:701a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422870e9681sm266192075e9.28.2024.06.19.04.35.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jun 2024 04:35:48 -0700 (PDT) From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v7 10/16] RISC-V: KVM: Allow Zca, Zcf, Zcd and Zcb extensions for Guest/VM Date: Wed, 19 Jun 2024 13:35:20 +0200 Message-ID: <20240619113529.676940-11-cleger@rivosinc.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240619113529.676940-1-cleger@rivosinc.com> References: <20240619113529.676940-1-cleger@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Zca, Zcf, Zcd and Zcb extensions for Guest/VM. Signed-off-by: Cl=C3=A9ment L=C3=A9ger Reviewed-by: Anup Patel Acked-by: Anup Patel --- arch/riscv/include/uapi/asm/kvm.h | 4 ++++ arch/riscv/kvm/vcpu_onereg.c | 8 ++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/as= m/kvm.h index db482ef0ae1e..71b17a6799e6 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -169,6 +169,10 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_ZACAS, KVM_RISCV_ISA_EXT_SSCOFPMF, KVM_RISCV_ISA_EXT_ZIMOP, + KVM_RISCV_ISA_EXT_ZCA, + KVM_RISCV_ISA_EXT_ZCB, + KVM_RISCV_ISA_EXT_ZCD, + KVM_RISCV_ISA_EXT_ZCF, KVM_RISCV_ISA_EXT_MAX, }; =20 diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 09f0aa92a4da..f68b15b15f0e 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -49,6 +49,10 @@ static const unsigned long kvm_isa_ext_arr[] =3D { KVM_ISA_EXT_ARR(ZBKC), KVM_ISA_EXT_ARR(ZBKX), KVM_ISA_EXT_ARR(ZBS), + KVM_ISA_EXT_ARR(ZCA), + KVM_ISA_EXT_ARR(ZCB), + KVM_ISA_EXT_ARR(ZCD), + KVM_ISA_EXT_ARR(ZCF), KVM_ISA_EXT_ARR(ZFA), KVM_ISA_EXT_ARR(ZFH), KVM_ISA_EXT_ARR(ZFHMIN), @@ -134,6 +138,10 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigne= d long ext) case KVM_RISCV_ISA_EXT_ZBKC: case KVM_RISCV_ISA_EXT_ZBKX: case KVM_RISCV_ISA_EXT_ZBS: + case KVM_RISCV_ISA_EXT_ZCA: + case KVM_RISCV_ISA_EXT_ZCB: + case KVM_RISCV_ISA_EXT_ZCD: + case KVM_RISCV_ISA_EXT_ZCF: case KVM_RISCV_ISA_EXT_ZFA: case KVM_RISCV_ISA_EXT_ZFH: case KVM_RISCV_ISA_EXT_ZFHMIN: --=20 2.45.2