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charset="utf-8" Introduces a more generalized ABI documentation for DAC. Instead of having separate ABI files for each DAC, we now have a single ABI file that covers the common sysfs interface for all DAC. Co-developed-by: Michael Hennerich Signed-off-by: Michael Hennerich Signed-off-by: Kim Seer Paller --- Documentation/ABI/testing/sysfs-bus-iio-dac | 61 +++++++++++++++++++ .../ABI/testing/sysfs-bus-iio-dac-ltc2688 | 31 ---------- 2 files changed, 61 insertions(+), 31 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-dac diff --git a/Documentation/ABI/testing/sysfs-bus-iio-dac b/Documentation/AB= I/testing/sysfs-bus-iio-dac new file mode 100644 index 000000000000..810eaac5533c --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-dac @@ -0,0 +1,61 @@ +What: /sys/bus/iio/devices/iio:deviceX/out_currentY_toggle_en +KernelVersion: 5.18 +Contact: linux-iio@vger.kernel.org +Description: + Toggle enable. Write 1 to enable toggle or 0 to disable it. This + is useful when one wants to change the DAC output codes. For + autonomous toggling, the way it should be done is: + + - disable toggle operation; + - change out_currentY_rawN, where N is the integer value of the symbol; + - enable toggle operation. + +What: /sys/bus/iio/devices/iio:deviceX/out_currentY_rawN +KernelVersion: 5.18 +Contact: linux-iio@vger.kernel.org +Description: + This attribute has the same meaning as out_currentY_raw. It is + specific to toggle enabled channels and refers to the DAC output + code in INPUT_N (_rawN), where N is the integer value of the symbol. + The same scale and offset as in out_currentY_raw applies. + +What: /sys/bus/iio/devices/iio:deviceX/out_currentY_symbol +KernelVersion: 5.18 +Contact: linux-iio@vger.kernel.org +Description: + Performs a SW switch to a predefined output symbol. This attribute + is specific to toggle enabled channels and allows switching between + multiple predefined symbols. Each symbol corresponds to a different + output, denoted as out_currentY_rawN, where N is the integer value + of the symbol. Writing an integer value N will select out_currentY_rawN. + +What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_toggle_en +KernelVersion: 5.18 +Contact: linux-iio@vger.kernel.org +Description: + Toggle enable. Write 1 to enable toggle or 0 to disable it. This + is useful when one wants to change the DAC output codes. For + autonomous toggling, the way it should be done is: + + - disable toggle operation; + - change out_voltageY_rawN, where N is the integer value of the symbol; + - enable toggle operation. + +What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_rawN +KernelVersion: 5.18 +Contact: linux-iio@vger.kernel.org +Description: + This attribute has the same meaning as out_currentY_raw. It is + specific to toggle enabled channels and refers to the DAC output + code in INPUT_N (_rawN), where N is the integer value of the symbol. + The same scale and offset as in out_currentY_raw applies. + +What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_symbol +KernelVersion: 5.18 +Contact: linux-iio@vger.kernel.org +Description: + Performs a SW switch to a predefined output symbol. This attribute + is specific to toggle enabled channels and allows switching between + multiple predefined symbols. Each symbol corresponds to a different + output, denoted as out_voltageY_rawN, where N is the integer value + of the symbol. Writing an integer value N will select out_voltageY_rawN. diff --git a/Documentation/ABI/testing/sysfs-bus-iio-dac-ltc2688 b/Document= ation/ABI/testing/sysfs-bus-iio-dac-ltc2688 index 1c35971277ba..ae95a5477382 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio-dac-ltc2688 +++ b/Documentation/ABI/testing/sysfs-bus-iio-dac-ltc2688 @@ -53,34 +53,3 @@ KernelVersion: 5.18 Contact: linux-iio@vger.kernel.org Description: Returns the available values for the dither phase. - -What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_toggle_en -KernelVersion: 5.18 -Contact: linux-iio@vger.kernel.org -Description: - Toggle enable. Write 1 to enable toggle or 0 to disable it. This is - useful when one wants to change the DAC output codes. The way it should - be done is: - - - disable toggle operation; - - change out_voltageY_raw0 and out_voltageY_raw1; - - enable toggle operation. - -What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_raw0 -What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_raw1 -KernelVersion: 5.18 -Contact: linux-iio@vger.kernel.org -Description: - It has the same meaning as out_voltageY_raw. This attribute is - specific to toggle enabled channels and refers to the DAC output - code in INPUT_A (_raw0) and INPUT_B (_raw1). The same scale and offset - as in out_voltageY_raw applies. - -What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_symbol -KernelVersion: 5.18 -Contact: linux-iio@vger.kernel.org -Description: - Performs a SW toggle. This attribute is specific to toggle - enabled channels and allows to toggle between out_voltageY_raw0 - and out_voltageY_raw1 through software. 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charset="utf-8" Add a new powerdown mode for DACs with 42kohm resistor to GND. Co-developed-by: Michael Hennerich Signed-off-by: Michael Hennerich Signed-off-by: Kim Seer Paller --- Documentation/ABI/testing/sysfs-bus-iio | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/te= sting/sysfs-bus-iio index 7cee78ad4108..6ee58f59065b 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -708,6 +708,7 @@ Description: 2.5kohm_to_gnd: connected to ground via a 2.5kOhm resistor, 6kohm_to_gnd: connected to ground via a 6kOhm resistor, 20kohm_to_gnd: connected to ground via a 20kOhm resistor, + 42kohm_to_gnd: connected to ground via a 42kOhm resistor, 90kohm_to_gnd: connected to ground via a 90kOhm resistor, 100kohm_to_gnd: connected to ground via an 100kOhm resistor, 125kohm_to_gnd: connected to ground via an 125kOhm resistor, --=20 2.34.1 From nobody Wed Feb 11 22:55:58 2026 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 858EA74E09; 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Co-developed-by: Michael Hennerich Signed-off-by: Michael Hennerich Signed-off-by: Kim Seer Paller --- .../bindings/iio/dac/adi,ltc2664.yaml | 167 ++++++++++++++++++ MAINTAINERS | 8 + 2 files changed, 175 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/dac/adi,ltc2664.y= aml diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml b/D= ocumentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml new file mode 100644 index 000000000000..be37700e3b1f --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml @@ -0,0 +1,167 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/adi,ltc2664.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices LTC2664 DAC + +maintainers: + - Michael Hennerich + - Kim Seer Paller + +description: | + Analog Devices LTC2664 4 channel, 12-/16-Bit, +-10V DAC + https://www.analog.com/media/en/technical-documentation/data-sheets/2664= fa.pdf + +properties: + compatible: + enum: + - adi,ltc2664 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 50000000 + + vcc-supply: + description: Analog Supply Voltage Input. + + v-pos-supply: + description: Positive Supply Voltage Input. + + v-neg-supply: + description: Negative Supply Voltage Input. + + iovcc-supply: + description: Digital Input/Output Supply Voltage. + + ref-supply: + description: + Reference Input/Output. The voltage at the REF pin sets the full-sca= le + range of all channels. If not provided the internal reference is use= d and + also provided on the VREF pin. + + reset-gpios: + description: + Active-low Asynchronous Clear Input. A logic low at this level-trigg= ered + input clears the part to the reset code and range determined by the + hardwired option chosen using the MSPAN pins. The control registers = are + cleared to zero. + maxItems: 1 + + adi,manual-span-operation-config: + description: + This property must mimic the MSPAN pin configurations. By tying the = MSPAN + pins (MSP2, MSP1 and MSP0) to GND and/or VCC, any output range can be + hardware-configured with different mid-scale or zero-scale reset opt= ions. + The hardware configuration is latched during power on reset for prop= er + operation. + 0 - MPS2=3DGND, MPS1=3DGND, MSP0=3DGND (+-10V, reset to 0V) + 1 - MPS2=3DGND, MPS1=3DGND, MSP0=3DVCC (+-5V, reset to 0V) + 2 - MPS2=3DGND, MPS1=3DVCC, MSP0=3DGND (+-2.5V, reset to 0V) + 3 - MPS2=3DGND, MPS1=3DVCC, MSP0=3DVCC (0V to 10, reset to 0V) + 4 - MPS2=3DVCC, MPS1=3DGND, MSP0=3DGND (0V to 10V, reset to 5V) + 5 - MPS2=3DVCC, MPS1=3DGND, MSP0=3DVCC (0V to 5V, reset to 0V) + 6 - MPS2=3DVCC, MPS1=3DVCC, MSP0=3DGND (0V to 5V, reset to 2.5V) + 7 - MPS2=3DVCC, MPS1=3DVCC, MSP0=3DVCC (0V to 5V, reset to 0V, ena= bles SoftSpan) + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7] + default: 7 + + io-channels: + description: + ADC channel to monitor voltages and temperature at the MUXOUT pin. + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^channel@[0-3]$": + type: object + additionalProperties: false + + properties: + reg: + description: The channel number representing the DAC output channe= l. + maximum: 3 + + adi,toggle-mode: + description: + Set the channel as a toggle enabled channel. Toggle operation en= ables + fast switching of a DAC output between two different DAC codes w= ithout + any SPI transaction. + type: boolean + + adi,output-range-microvolt: + description: Specify the channel output full scale range. + oneOf: + - items: + - const: 0 + - enum: [5000000, 10000000] + - items: + - const: -5000000 + - const: 5000000 + - items: + - const: -10000000 + - const: 10000000 + - items: + - const: -2500000 + - const: 2500000 + + required: + - reg + - adi,output-range-microvolt + +required: + - compatible + - reg + - spi-max-frequency + - vcc-supply + - iovcc-supply + - v-pos-supply + - v-neg-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +additionalProperties: false + +examples: + - | + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + dac@0 { + compatible =3D "adi,ltc2664"; + reg =3D <0>; + spi-max-frequency =3D <10000000>; + + vcc-supply =3D <&vcc>; + iovcc-supply =3D <&vcc>; + ref-supply =3D <&vref>; + v-pos-supply =3D <&vpos>; + v-neg-supply =3D <&vneg>; + + io-channels =3D <&adc 0>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + channel@0 { + reg =3D <0>; + adi,toggle-mode; + adi,output-range-microvolt =3D <(-10000000) 10000000>; + }; + + channel@1 { + reg =3D <1>; + adi,output-range-microvolt =3D <0 10000000>; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index be590c462d91..849800d9cbf7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13074,6 +13074,14 @@ S: Maintained F: Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml F: drivers/iio/dac/ltc1660.c =20 +LTC2664 IIO DAC DRIVER +M: Michael Hennerich +M: Kim Seer Paller +L: linux-iio@vger.kernel.org +S: Supported +W: https://ez.analog.com/linux-software-drivers +F: Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml + LTC2688 IIO DAC DRIVER M: Nuno S=C3=A1 L: linux-iio@vger.kernel.org --=20 2.34.1 From nobody Wed Feb 11 22:55:58 2026 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA9586F30D; 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Co-developed-by: Michael Hennerich Signed-off-by: Michael Hennerich Signed-off-by: Kim Seer Paller --- .../bindings/iio/dac/adi,ltc2672.yaml | 158 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 159 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/dac/adi,ltc2672.y= aml diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml b/D= ocumentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml new file mode 100644 index 000000000000..0ccf53fb22cc --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml @@ -0,0 +1,158 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/dac/adi,ltc2672.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices LTC2672 DAC + +maintainers: + - Michael Hennerich + - Kim Seer Paller + +description: | + Analog Devices LTC2672 5 channel, 12-/16-Bit, 300mA DAC + https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2= 672.pdf + +properties: + compatible: + enum: + - adi,ltc2672 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 50000000 + + vcc-supply: + description: Analog Supply Voltage Input. + + v-neg-supply: + description: Negative Supply Voltage Input. + + vdd0-supply: + description: Positive Supply Voltage Input for DAC OUT0. + + vdd1-supply: + description: Positive Supply Voltage Input for DAC OUT1. + + vdd2-supply: + description: Positive Supply Voltage Input for DAC OUT2. + + vdd3-supply: + description: Positive Supply Voltage Input for DAC OUT3. + + vdd4-supply: + description: Positive Supply Voltage Input for DAC OUT4. + + iovcc-supply: + description: Digital Input/Output Supply Voltage. + + ref-supply: + description: + Reference Input/Output. The voltage at the REF pin sets the full-sca= le + range of all channels. If not provided the internal reference is use= d and + also provided on the VREF pin. + + reset-gpios: + description: + Active Low Asynchronous Clear Input. A logic low at this level trigg= ered + input clears the device to the default reset code and output range, = which + is zero-scale with the outputs off. The control registers are cleare= d to + zero. + maxItems: 1 + + adi,rfsadj-ohms: + description: + If FSADJ is tied to VCC, an internal RFSADJ (20 k=CE=A9) is selected= , which + results in nominal output ranges. When an external resistor of 19 k= =CE=A9 to + 41 k=CE=A9 can be used instead by connecting the resistor between FS= ADJ and GND + it controls the scaling of the ranges, and the internal resistor is + automatically disconnected. + minimum: 19000 + maximum: 41000 + default: 20000 + + io-channels: + description: + ADC channel to monitor voltages and currents at the MUX pin. + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + "^channel@[0-4]$": + type: object + additionalProperties: false + + properties: + reg: + description: The channel number representing the DAC output channe= l. + maximum: 4 + + adi,toggle-mode: + description: + Set the channel as a toggle enabled channel. Toggle operation en= ables + fast switching of a DAC output between two different DAC codes w= ithout + any SPI transaction. + type: boolean + + adi,output-range-microamp: + description: Specify the channel output full scale range. + enum: [3125000, 6250000, 12500000, 25000000, 50000000, 100000000, + 200000000, 300000000] + + required: + - reg + - adi,output-range-microamp + +required: + - compatible + - reg + - spi-max-frequency + - vcc-supply + - iovcc-supply + - v-neg-supply + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +additionalProperties: false + +examples: + - | + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + dac@0 { + compatible =3D "adi,ltc2672"; + reg =3D <0>; + spi-max-frequency =3D <10000000>; + + vcc-supply =3D <&vcc>; + iovcc-supply =3D <&vcc>; + ref-supply =3D <&vref>; + v-neg-supply =3D <&vneg>; + + io-channels =3D <&adc 0>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + channel@0 { + reg =3D <0>; + adi,toggle-mode; + adi,output-range-microamp =3D <3125000>; + }; + + channel@1 { + reg =3D <1>; + adi,output-range-microamp =3D <6250000>; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 849800d9cbf7..f4a5b5bc8ccc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13081,6 +13081,7 @@ L: linux-iio@vger.kernel.org S: Supported W: https://ez.analog.com/linux-software-drivers F: Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml +F: Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml =20 LTC2688 IIO DAC DRIVER M: Nuno S=C3=A1 --=20 2.34.1 From nobody Wed Feb 11 22:55:58 2026 Received: from mx0b-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E2AC71B45; Wed, 19 Jun 2024 06:50:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.135.77 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718779813; 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Wed, 19 Jun 2024 02:49:43 -0400 From: Kim Seer Paller To: , , CC: Jonathan Cameron , David Lechner , Lars-Peter Clausen , Liam Girdwood , Mark Brown , Dimitri Fedrau , Krzysztof Kozlowski , "Rob Herring" , Conor Dooley , "Michael Hennerich" , =?UTF-8?q?Nuno=20S=C3=A1?= , Kim Seer Paller Subject: [PATCH v4 5/5] iio: dac: ltc2664: Add driver for LTC2664 and LTC2672 Date: Wed, 19 Jun 2024 14:49:04 +0800 Message-ID: <20240619064904.73832-6-kimseer.paller@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240619064904.73832-1-kimseer.paller@analog.com> References: <20240619064904.73832-1-kimseer.paller@analog.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: G0ajBeVD3Qg-3AryJMGhae9w_Bn9ylEC X-Proofpoint-ORIG-GUID: G0ajBeVD3Qg-3AryJMGhae9w_Bn9ylEC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-19_02,2024-06-17_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 mlxlogscore=999 adultscore=0 clxscore=1015 suspectscore=0 impostorscore=0 malwarescore=0 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406190049 LTC2664 4 channel, 12-/16-Bit Voltage Output SoftSpan DAC LTC2672 5 channel, 12-/16-Bit Current Output Softspan DAC Co-developed-by: Michael Hennerich Signed-off-by: Michael Hennerich Signed-off-by: Kim Seer Paller Reviewed-by: Nuno Sa --- MAINTAINERS | 1 + drivers/iio/dac/Kconfig | 11 + drivers/iio/dac/Makefile | 1 + drivers/iio/dac/ltc2664.c | 755 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 768 insertions(+) create mode 100644 drivers/iio/dac/ltc2664.c diff --git a/MAINTAINERS b/MAINTAINERS index f4a5b5bc8ccc..7a02d9a196fb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13082,6 +13082,7 @@ S: Supported W: https://ez.analog.com/linux-software-drivers F: Documentation/devicetree/bindings/iio/dac/adi,ltc2664.yaml F: Documentation/devicetree/bindings/iio/dac/adi,ltc2672.yaml +F: drivers/iio/dac/ltc2664.c =20 LTC2688 IIO DAC DRIVER M: Nuno S=C3=A1 diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index fb48dddbcc20..3a7691db3998 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -371,6 +371,17 @@ config LTC2632 To compile this driver as a module, choose M here: the module will be called ltc2632. =20 +config LTC2664 + tristate "Analog Devices LTC2664 and LTC2672 DAC SPI driver" + depends on SPI + select REGMAP + help + Say yes here to build support for Analog Devices + LTC2664 and LTC2672 converters (DAC). + + To compile this driver as a module, choose M here: the + module will be called ltc2664. + config M62332 tristate "Mitsubishi M62332 DAC driver" depends on I2C diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 8432a81a19dc..2cf148f16306 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_DS4424) +=3D ds4424.o obj-$(CONFIG_LPC18XX_DAC) +=3D lpc18xx_dac.o obj-$(CONFIG_LTC1660) +=3D ltc1660.o obj-$(CONFIG_LTC2632) +=3D ltc2632.o +obj-$(CONFIG_LTC2664) +=3D ltc2664.o obj-$(CONFIG_LTC2688) +=3D ltc2688.o obj-$(CONFIG_M62332) +=3D m62332.o obj-$(CONFIG_MAX517) +=3D max517.o diff --git a/drivers/iio/dac/ltc2664.c b/drivers/iio/dac/ltc2664.c new file mode 100644 index 000000000000..9b73b9c6a7a7 --- /dev/null +++ b/drivers/iio/dac/ltc2664.c @@ -0,0 +1,755 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * LTC2664 4 channel, 12-/16-Bit Voltage Output SoftSpan DAC driver + * LTC2672 5 channel, 12-/16-Bit Current Output Softspan DAC driver + * + * Copyright 2024 Analog Devices Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define LTC2664_CMD_WRITE_N(n) (0x00 + (n)) +#define LTC2664_CMD_UPDATE_N(n) (0x10 + (n)) +#define LTC2664_CMD_WRITE_N_UPDATE_ALL 0x20 +#define LTC2664_CMD_WRITE_N_UPDATE_N(n) (0x30 + (n)) +#define LTC2664_CMD_POWER_DOWN_N(n) (0x40 + (n)) +#define LTC2664_CMD_POWER_DOWN_ALL 0x50 +#define LTC2664_CMD_SPAN_N(n) (0x60 + (n)) +#define LTC2664_CMD_CONFIG 0x70 +#define LTC2664_CMD_MUX 0xB0 +#define LTC2664_CMD_TOGGLE_SEL 0xC0 +#define LTC2664_CMD_GLOBAL_TOGGLE 0xD0 +#define LTC2664_CMD_NO_OPERATION 0xF0 +#define LTC2664_REF_DISABLE 0x0001 +#define LTC2664_MSPAN_SOFTSPAN 7 + +#define LTC2672_MAX_CHANNEL 5 +#define LTC2672_MAX_SPAN 7 +#define LTC2672_SCALE_MULTIPLIER(n) (50 * BIT(n)) + +enum ltc2664_ids { + LTC2664, + LTC2672, +}; + +enum { + LTC2664_SPAN_RANGE_0V_5V, + LTC2664_SPAN_RANGE_0V_10V, + LTC2664_SPAN_RANGE_M5V_5V, + LTC2664_SPAN_RANGE_M10V_10V, + LTC2664_SPAN_RANGE_M2V5_2V5, +}; + +enum { + LTC2664_INPUT_A, + LTC2664_INPUT_B, + LTC2664_INPUT_B_AVAIL, + LTC2664_POWERDOWN, + LTC2664_POWERDOWN_MODE, + LTC2664_TOGGLE_EN, + LTC2664_GLOBAL_TOGGLE, +}; + +static const u16 ltc2664_mspan_lut[8][2] =3D { + { LTC2664_SPAN_RANGE_M10V_10V, 32768 }, /* MPS2=3D0, MPS1=3D0, MSP0=3D0 (= 0)*/ + { LTC2664_SPAN_RANGE_M5V_5V, 32768 }, /* MPS2=3D0, MPS1=3D0, MSP0=3D1 (1)= */ + { LTC2664_SPAN_RANGE_M2V5_2V5, 32768 }, /* MPS2=3D0, MPS1=3D1, MSP0=3D0 (= 2)*/ + { LTC2664_SPAN_RANGE_0V_10V, 0 }, /* MPS2=3D0, MPS1=3D1, MSP0=3D1 (3)*/ + { LTC2664_SPAN_RANGE_0V_10V, 32768 }, /* MPS2=3D1, MPS1=3D0, MSP0=3D0 (4)= */ + { LTC2664_SPAN_RANGE_0V_5V, 0 }, /* MPS2=3D1, MPS1=3D0, MSP0=3D1 (5)*/ + { LTC2664_SPAN_RANGE_0V_5V, 32768 }, /* MPS2=3D1, MPS1=3D1, MSP0=3D0 (6)*/ + { LTC2664_SPAN_RANGE_0V_5V, 0 } /* MPS2=3D1, MPS1=3D1, MSP0=3D1 (7)*/ +}; + +struct ltc2664_state; + +struct ltc2664_chip_info { + enum ltc2664_ids id; + const char *name; + int (*scale_get)(const struct ltc2664_state *st, int c); + int (*offset_get)(const struct ltc2664_state *st, int c); + int measurement_type; + unsigned int num_channels; + const struct iio_chan_spec *iio_chan; + const int (*span_helper)[2]; + unsigned int num_span; + unsigned int internal_vref_mv; + bool manual_span_support; + bool rfsadj_support; +}; + +struct ltc2664_chan { + /* indicates if the channel should be toggled */ + bool toggle_chan; + /* indicates if the channel is in powered down state */ + bool powerdown; + /* span code of the channel */ + u8 span; + /* raw data of the current state of the chip registers (A/B) */ + u16 raw[2]; +}; + +struct ltc2664_state { + struct spi_device *spi; + struct regmap *regmap; + struct ltc2664_chan channels[LTC2672_MAX_CHANNEL]; + /* lock to protect against multiple access to the device and shared data = */ + struct mutex lock; + const struct ltc2664_chip_info *chip_info; + struct iio_chan_spec *iio_channels; + int vref_mv; + u32 rfsadj_ohms; + u32 toggle_sel; + bool global_toggle; +}; + +static const int ltc2664_span_helper[][2] =3D { + { 0, 5000 }, + { 0, 10000 }, + { -5000, 5000 }, + { -10000, 10000 }, + { -2500, 2500 }, +}; + +static const int ltc2672_span_helper[][2] =3D { + { 0, 0 }, + { 0, 3125 }, + { 0, 6250 }, + { 0, 12500 }, + { 0, 25000 }, + { 0, 50000 }, + { 0, 100000 }, + { 0, 200000 }, + { 0, 300000 }, +}; + +static int ltc2664_scale_get(const struct ltc2664_state *st, int c) +{ + const struct ltc2664_chan *chan =3D &st->channels[c]; + const int (*span_helper)[2] =3D st->chip_info->span_helper; + int span, fs; + + span =3D chan->span; + if (span < 0) + return span; + + fs =3D span_helper[span][1] - span_helper[span][0]; + + return fs * st->vref_mv / 2500; +} + +static int ltc2672_scale_get(const struct ltc2664_state *st, int c) +{ + const struct ltc2664_chan *chan =3D &st->channels[c]; + int span, fs; + + span =3D chan->span - 1; + if (span < 0) + return span; + + fs =3D 1000 * st->vref_mv; + + if (span =3D=3D LTC2672_MAX_SPAN) + return mul_u64_u32_div(4800, fs, st->rfsadj_ohms); + + return mul_u64_u32_div(LTC2672_SCALE_MULTIPLIER(span), fs, st->rfsadj_ohm= s); +} + +static int ltc2664_offset_get(const struct ltc2664_state *st, int c) +{ + const struct ltc2664_chan *chan =3D &st->channels[c]; + int span; + + span =3D chan->span; + if (span < 0) + return span; + + if (st->chip_info->span_helper[span][0] < 0) + return -32768; + + return 0; +} + +static int ltc2664_dac_code_write(struct ltc2664_state *st, u32 chan, u32 = input, + u16 code) +{ + struct ltc2664_chan *c =3D &st->channels[chan]; + int ret, reg; + + guard(mutex)(&st->lock); + /* select the correct input register to write to */ + if (c->toggle_chan) { + ret =3D regmap_write(st->regmap, LTC2664_CMD_TOGGLE_SEL, + input << chan); + if (ret) + return ret; + } + /* + * If in toggle mode the dac should be updated by an + * external signal (or sw toggle) and not here. + */ + if (st->toggle_sel & BIT(chan)) + reg =3D LTC2664_CMD_WRITE_N(chan); + else + reg =3D LTC2664_CMD_WRITE_N_UPDATE_N(chan); + + ret =3D regmap_write(st->regmap, reg, code); + if (ret) + return ret; + + c->raw[input] =3D code; + + if (c->toggle_chan) { + ret =3D regmap_write(st->regmap, LTC2664_CMD_TOGGLE_SEL, + st->toggle_sel); + if (ret) + return ret; + } + + return 0; +} + +static int ltc2664_dac_code_read(struct ltc2664_state *st, u32 chan, u32 i= nput, + u32 *code) +{ + guard(mutex)(&st->lock); + *code =3D st->channels[chan].raw[input]; + + return 0; +} + +static const int ltc2664_raw_range[] =3D { 0, 1, U16_MAX }; + +static int ltc2664_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long info) +{ + switch (info) { + case IIO_CHAN_INFO_RAW: + *vals =3D ltc2664_raw_range; + *type =3D IIO_VAL_INT; + + return IIO_AVAIL_RANGE; + default: + return -EINVAL; + } +} + +static int ltc2664_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long info) +{ + struct ltc2664_state *st =3D iio_priv(indio_dev); + int ret; + + switch (info) { + case IIO_CHAN_INFO_RAW: + ret =3D ltc2664_dac_code_read(st, chan->channel, + LTC2664_INPUT_A, val); + if (ret) + return ret; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_OFFSET: + *val =3D st->chip_info->offset_get(st, chan->channel); + + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + *val =3D st->chip_info->scale_get(st, chan->channel); + + *val2 =3D 16; + return IIO_VAL_FRACTIONAL_LOG2; + default: + return -EINVAL; + } +} + +static int ltc2664_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long info) +{ + struct ltc2664_state *st =3D iio_priv(indio_dev); + + switch (info) { + case IIO_CHAN_INFO_RAW: + if (val > U16_MAX || val < 0) + return -EINVAL; + + return ltc2664_dac_code_write(st, chan->channel, + LTC2664_INPUT_A, val); + default: + return -EINVAL; + } +} + +static ssize_t ltc2664_reg_bool_get(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + char *buf) +{ + struct ltc2664_state *st =3D iio_priv(indio_dev); + u32 val; + + guard(mutex)(&st->lock); + switch (private) { + case LTC2664_POWERDOWN: + val =3D st->channels[chan->channel].powerdown; + + return sysfs_emit(buf, "%u\n", val); + case LTC2664_POWERDOWN_MODE: + return sysfs_emit(buf, "42kohm_to_gnd\n"); + case LTC2664_TOGGLE_EN: + val =3D !!(st->toggle_sel & BIT(chan->channel)); + + return sysfs_emit(buf, "%u\n", val); + case LTC2664_GLOBAL_TOGGLE: + val =3D st->global_toggle; + + return sysfs_emit(buf, "%u\n", val); + default: + return -EINVAL; + } +} + +static ssize_t ltc2664_reg_bool_set(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct ltc2664_state *st =3D iio_priv(indio_dev); + int ret; + bool en; + + ret =3D kstrtobool(buf, &en); + if (ret) + return ret; + + guard(mutex)(&st->lock); + switch (private) { + case LTC2664_POWERDOWN: + ret =3D regmap_write(st->regmap, + en ? LTC2664_CMD_POWER_DOWN_N(chan->channel) : + LTC2664_CMD_UPDATE_N(chan->channel), en); + if (ret) + return ret; + + st->channels[chan->channel].powerdown =3D en; + + return len; + case LTC2664_TOGGLE_EN: + if (en) + st->toggle_sel |=3D BIT(chan->channel); + else + st->toggle_sel &=3D ~BIT(chan->channel); + + ret =3D regmap_write(st->regmap, LTC2664_CMD_TOGGLE_SEL, + st->toggle_sel); + if (ret) + return ret; + + return len; + case LTC2664_GLOBAL_TOGGLE: + ret =3D regmap_write(st->regmap, LTC2664_CMD_GLOBAL_TOGGLE, en); + if (ret) + return ret; + + st->global_toggle =3D en; + + return len; + default: + return -EINVAL; + } +} + +static ssize_t ltc2664_dac_input_read(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + char *buf) +{ + struct ltc2664_state *st =3D iio_priv(indio_dev); + int ret; + u32 val; + + if (private =3D=3D LTC2664_INPUT_B_AVAIL) + return sysfs_emit(buf, "[%u %u %u]\n", ltc2664_raw_range[0], + ltc2664_raw_range[1], + ltc2664_raw_range[2] / 4); + + ret =3D ltc2664_dac_code_read(st, chan->channel, private, &val); + if (ret) + return ret; + + return sysfs_emit(buf, "%u\n", val); +} + +static ssize_t ltc2664_dac_input_write(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct ltc2664_state *st =3D iio_priv(indio_dev); + int ret; + u16 val; + + if (private =3D=3D LTC2664_INPUT_B_AVAIL) + return -EINVAL; + + ret =3D kstrtou16(buf, 10, &val); + if (ret) + return ret; + + ret =3D ltc2664_dac_code_write(st, chan->channel, private, val); + if (ret) + return ret; + + return len; +} + +static int ltc2664_reg_access(struct iio_dev *indio_dev, + unsigned int reg, + unsigned int writeval, + unsigned int *readval) +{ + struct ltc2664_state *st =3D iio_priv(indio_dev); + + if (readval) + return -EOPNOTSUPP; + + return regmap_write(st->regmap, reg, writeval); +} + +#define LTC2664_CHAN_EXT_INFO(_name, _what, _shared, _read, _write) { \ + .name =3D _name, \ + .read =3D (_read), \ + .write =3D (_write), \ + .private =3D (_what), \ + .shared =3D (_shared), \ +} + +/* + * For toggle mode we only expose the symbol attr (sw_toggle) in case a TG= Px is + * not provided in dts. + */ +static const struct iio_chan_spec_ext_info ltc2664_toggle_sym_ext_info[] = =3D { + LTC2664_CHAN_EXT_INFO("raw0", LTC2664_INPUT_A, IIO_SEPARATE, + ltc2664_dac_input_read, ltc2664_dac_input_write), + LTC2664_CHAN_EXT_INFO("raw1", LTC2664_INPUT_B, IIO_SEPARATE, + ltc2664_dac_input_read, ltc2664_dac_input_write), + LTC2664_CHAN_EXT_INFO("powerdown", LTC2664_POWERDOWN, IIO_SEPARATE, + ltc2664_reg_bool_get, ltc2664_reg_bool_set), + LTC2664_CHAN_EXT_INFO("powerdown_mode", LTC2664_POWERDOWN_MODE, + IIO_SEPARATE, ltc2664_reg_bool_get, NULL), + LTC2664_CHAN_EXT_INFO("symbol", LTC2664_GLOBAL_TOGGLE, IIO_SEPARATE, + ltc2664_reg_bool_get, ltc2664_reg_bool_set), + LTC2664_CHAN_EXT_INFO("toggle_en", LTC2664_TOGGLE_EN, + IIO_SEPARATE, ltc2664_reg_bool_get, + ltc2664_reg_bool_set), + { } +}; + +static const struct iio_chan_spec_ext_info ltc2664_ext_info[] =3D { + LTC2664_CHAN_EXT_INFO("powerdown", LTC2664_POWERDOWN, IIO_SEPARATE, + ltc2664_reg_bool_get, ltc2664_reg_bool_set), + LTC2664_CHAN_EXT_INFO("powerdown_mode", LTC2664_POWERDOWN_MODE, + IIO_SEPARATE, ltc2664_reg_bool_get, NULL), + { } +}; + +static const struct iio_chan_spec ltc2664_channel_template =3D { + .indexed =3D 1, + .output =3D 1, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_OFFSET) | + BIT(IIO_CHAN_INFO_RAW), + .info_mask_separate_available =3D BIT(IIO_CHAN_INFO_RAW), + .ext_info =3D ltc2664_ext_info, +}; + +static const struct ltc2664_chip_info ltc2664_chip =3D { + .name =3D "ltc2664", + .scale_get =3D ltc2664_scale_get, + .offset_get =3D ltc2664_offset_get, + .measurement_type =3D IIO_VOLTAGE, + .num_channels =3D 4, + .span_helper =3D ltc2664_span_helper, + .num_span =3D ARRAY_SIZE(ltc2664_span_helper), + .internal_vref_mv =3D 2500, + .manual_span_support =3D true, + .rfsadj_support =3D false, +}; + +static const struct ltc2664_chip_info ltc2672_chip =3D { + .name =3D "ltc2672", + .scale_get =3D ltc2672_scale_get, + .offset_get =3D ltc2664_offset_get, + .measurement_type =3D IIO_CURRENT, + .num_channels =3D 5, + .span_helper =3D ltc2672_span_helper, + .num_span =3D ARRAY_SIZE(ltc2672_span_helper), + .internal_vref_mv =3D 1250, + .manual_span_support =3D false, + .rfsadj_support =3D true, +}; + +static int ltc2664_set_span(const struct ltc2664_state *st, int min, int m= ax, + int chan) +{ + const struct ltc2664_chip_info *chip_info =3D st->chip_info; + const int (*span_helper)[2] =3D chip_info->span_helper; + int span, ret; + + for (span =3D 0; span < chip_info->num_span; span++) { + if (min =3D=3D span_helper[span][0] && max =3D=3D span_helper[span][1]) + break; + } + + if (span =3D=3D chip_info->num_span) + return -EINVAL; + + ret =3D regmap_write(st->regmap, LTC2664_CMD_SPAN_N(chan), span); + if (ret) + return ret; + + return span; +} + +static int ltc2664_channel_config(struct ltc2664_state *st) +{ + const struct ltc2664_chip_info *chip_info =3D st->chip_info; + struct device *dev =3D &st->spi->dev; + u32 reg, tmp[2], mspan; + int ret, span =3D 0; + + mspan =3D LTC2664_MSPAN_SOFTSPAN; + ret =3D device_property_read_u32(dev, "adi,manual-span-operation-config", + &mspan); + if (!ret) { + if (!chip_info->manual_span_support) + return dev_err_probe(dev, -EINVAL, + "adi,manual-span-operation-config not supported\n"); + + if (mspan > ARRAY_SIZE(ltc2664_mspan_lut)) + return dev_err_probe(dev, -EINVAL, + "adi,manual-span-operation-config not in range\n"); + } + + st->rfsadj_ohms =3D 20000; + ret =3D device_property_read_u32(dev, "adi,rfsadj-ohms", &st->rfsadj_ohms= ); + if (!ret) { + if (!chip_info->rfsadj_support) + return dev_err_probe(dev, -EINVAL, + "adi,rfsadj-ohms not supported\n"); + + if (st->rfsadj_ohms < 19000 || st->rfsadj_ohms > 41000) + return dev_err_probe(dev, -EINVAL, + "adi,rfsadj-ohms not in range\n"); + } + + device_for_each_child_node_scoped(dev, child) { + struct ltc2664_chan *chan; + + ret =3D fwnode_property_read_u32(child, "reg", ®); + if (ret) + return dev_err_probe(dev, ret, + "Failed to get reg property\n"); + + if (reg >=3D chip_info->num_channels) + return dev_err_probe(dev, -EINVAL, + "reg bigger than: %d\n", + chip_info->num_channels); + + chan =3D &st->channels[reg]; + + if (fwnode_property_read_bool(child, "adi,toggle-mode")) { + chan->toggle_chan =3D true; + /* assume sw toggle ABI */ + st->iio_channels[reg].ext_info =3D ltc2664_toggle_sym_ext_info; + + /* + * Clear IIO_CHAN_INFO_RAW bit as toggle channels expose + * out_voltage/current_raw{0|1} files. + */ + __clear_bit(IIO_CHAN_INFO_RAW, + &st->iio_channels[reg].info_mask_separate); + } + + chan->raw[0] =3D ltc2664_mspan_lut[mspan][1]; + chan->raw[1] =3D ltc2664_mspan_lut[mspan][1]; + + chan->span =3D ltc2664_mspan_lut[mspan][0]; + + ret =3D fwnode_property_read_u32_array(child, "adi,output-range-microvol= t", + tmp, ARRAY_SIZE(tmp)); + if (!ret && mspan =3D=3D LTC2664_MSPAN_SOFTSPAN) { + chan->span =3D ltc2664_set_span(st, tmp[0] / 1000, + tmp[1] / 1000, reg); + if (span < 0) + return dev_err_probe(dev, span, + "Failed to set span\n"); + + } + + ret =3D fwnode_property_read_u32(child, + "adi,output-range-microamp", + &tmp[0]); + if (!ret) { + chan->span =3D ltc2664_set_span(st, 0, tmp[0] / 1000, reg); + if (span < 0) + return dev_err_probe(dev, span, + "Failed to set span\n"); + } + } + + return 0; +} + +static int ltc2664_setup(struct ltc2664_state *st) +{ + const struct ltc2664_chip_info *chip_info =3D st->chip_info; + struct gpio_desc *gpio; + int ret, i; + + /* If we have a clr/reset pin, use that to reset the chip. */ + gpio =3D devm_gpiod_get_optional(&st->spi->dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(gpio)) + return dev_err_probe(&st->spi->dev, PTR_ERR(gpio), + "Failed to get reset gpio"); + if (gpio) { + fsleep(1000); + gpiod_set_value_cansleep(gpio, 0); + } + + /* + * Duplicate the default channel configuration as it can change during + * @ltc2664_channel_config() + */ + st->iio_channels =3D devm_kcalloc(&st->spi->dev, + chip_info->num_channels, + sizeof(struct iio_chan_spec), + GFP_KERNEL); + if (!st->iio_channels) + return -ENOMEM; + + for (i =3D 0; i < chip_info->num_channels; i++) { + st->iio_channels[i] =3D ltc2664_channel_template; + st->iio_channels[i].type =3D chip_info->measurement_type; + st->iio_channels[i].channel =3D i; + } + + ret =3D ltc2664_channel_config(st); + if (ret) + return ret; + + return regmap_set_bits(st->regmap, LTC2664_CMD_CONFIG, LTC2664_REF_DISABL= E); +} + +static const struct regmap_config ltc2664_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 16, + .max_register =3D LTC2664_CMD_NO_OPERATION, +}; + +static const struct iio_info ltc2664_info =3D { + .write_raw =3D ltc2664_write_raw, + .read_raw =3D ltc2664_read_raw, + .read_avail =3D ltc2664_read_avail, + .debugfs_reg_access =3D ltc2664_reg_access, +}; + +static int ltc2664_probe(struct spi_device *spi) +{ + static const char * const regulators[] =3D { "vcc", "iovcc", "v-neg" }; + const struct ltc2664_chip_info *chip_info; + struct device *dev =3D &spi->dev; + struct iio_dev *indio_dev; + struct ltc2664_state *st; + int ret; + + indio_dev =3D devm_iio_device_alloc(dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st =3D iio_priv(indio_dev); + st->spi =3D spi; + + chip_info =3D spi_get_device_match_data(spi); + if (!chip_info) + return -ENODEV; + + st->chip_info =3D chip_info; + + mutex_init(&st->lock); + + st->regmap =3D devm_regmap_init_spi(spi, <c2664_regmap_config); + if (IS_ERR(st->regmap)) + return dev_err_probe(dev, PTR_ERR(st->regmap), + "Failed to init regmap"); + + ret =3D devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators), + regulators); + if (ret) + return dev_err_probe(dev, ret, "Failed to enable regulators\n"); + + ret =3D devm_regulator_get_enable_read_voltage(dev, "ref"); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to get vref voltage\n"); + else if (ret =3D=3D -ENODEV) + st->vref_mv =3D chip_info->internal_vref_mv; + else + st->vref_mv =3D ret / 1000; + + ret =3D ltc2664_setup(st); + if (ret) + return ret; + + indio_dev->name =3D chip_info->name; + indio_dev->info =3D <c2664_info; + indio_dev->modes =3D INDIO_DIRECT_MODE; + indio_dev->channels =3D st->iio_channels; + indio_dev->num_channels =3D chip_info->num_channels; + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct spi_device_id ltc2664_id[] =3D { + { "ltc2664", (kernel_ulong_t)<c2664_chip }, + { "ltc2672", (kernel_ulong_t)<c2672_chip }, + { } +}; +MODULE_DEVICE_TABLE(spi, ltc2664_id); + +static const struct of_device_id ltc2664_of_id[] =3D { + { .compatible =3D "adi,ltc2664", .data =3D <c2664_chip }, + { .compatible =3D "adi,ltc2672", .data =3D <c2672_chip }, + { } +}; +MODULE_DEVICE_TABLE(of, ltc2664_of_id); + +static struct spi_driver ltc2664_driver =3D { + .driver =3D { + .name =3D "ltc2664", + .of_match_table =3D ltc2664_of_id, + }, + .probe =3D ltc2664_probe, + .id_table =3D ltc2664_id, +}; +module_spi_driver(ltc2664_driver); + +MODULE_AUTHOR("Michael Hennerich "); +MODULE_AUTHOR("Kim Seer Paller "); +MODULE_DESCRIPTION("Analog Devices LTC2664 and LTC2672 DAC"); +MODULE_LICENSE("GPL"); --=20 2.34.1