From nobody Thu Dec 18 12:18:00 2025 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B80233DF for ; Tue, 18 Jun 2024 03:00:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.60.130.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718679654; cv=none; b=jRPwZFYJvCkrTTznqRJHDSHqNIKLxl5gJTA1W7LxznZRu3or46mbJSgBNGcb/CxhnSv8vrj54UNpAU05Q9T31QiIDSdMWIJyRtNihrQalvXxQOdmodixHtj8D0LP73rCq//GzoiVVFB9B3kciwD5fKWfAYnwwa5NjbvgIz09+qM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718679654; c=relaxed/simple; bh=Dh2KtUvAtiglq0b5/QtxJb7/lWsVoYr0FusrI650O/U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=P1EBOpF6AGVLOqJlmmTEu1BJzylKwd6tCnZjbERhSlb6XJ2ee1q3NGtlZn2yN/YiUF5P2uxAXFxkUoyvt1cjGnFkfOR9uRjV1US5E21UmPrGAyhF855Py0C3dvACL9LujJcAuNJH1kkCi+ZUMqcTJswgBMns4W53dE0Mu5WE8x8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=mw/EUmuT; arc=none smtp.client-ip=178.60.130.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="mw/EUmuT" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=Ld6CWp6MvzsfLCexkDmw2gq97DL2MMR6pnNJDMxtfIA=; b=mw/EUmuTRH+Mvzsqt73ouRnJz3 LWS2nHuqMo/Q4WgO+Gsi441NQIraJa28h7vsH/F60J7RpYJLaoKIlLi62s2cUNf9GAEBeyIyIVYmu 4Gn9bm5BFI2ADzOBUxNgw/2MnRa/uEB/1BDOjpFbkzeU+0aJaYxylOsCbt3T+7n/JWXLi2mcE3bWA B/kpcmLGis8/MgHXqmHpM7Sw5Mt1+H5tEgSZ07a8xu9FVuL8kH59tg5/mTr5cZnKRnylMHFVfVkaF QLhKajlp8aHcR8YgH/XKghxUgHBwIy001z1BUhbV93QAFSXqT2vBL5zyzVPSJsO3VO4yi4K0Gq8Do wXODCEww==; Received: from [191.8.29.108] (helo=localhost.localdomain) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1sJP5O-004YXc-NX; Tue, 18 Jun 2024 05:00:43 +0200 From: =?UTF-8?q?Andr=C3=A9=20Almeida?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, nouveau@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Dmitry Baryshkov Cc: kernel-dev@igalia.com, Melissa Wen , alexander.deucher@amd.com, christian.koenig@amd.com, Simon Ser , Pekka Paalanen , daniel@ffwll.ch, Daniel Stone , =?UTF-8?q?=27Marek=20Ol=C5=A1=C3=A1k=27?= , Dave Airlie , ville.syrjala@linux.intel.com, Xaver Hugl , Joshua Ashton , =?UTF-8?q?Michel=20D=C3=A4nzer?= , Sam Ravnborg , Boris Brezillon , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jani Nikula , Rodrigo Vivi , Karol Herbst , Lyude Paul , =?UTF-8?q?Andr=C3=A9=20Almeida?= Subject: [PATCH v7 1/9] drm/atomic: Allow userspace to use explicit sync with atomic async flips Date: Tue, 18 Jun 2024 00:00:16 -0300 Message-ID: <20240618030024.500532-2-andrealmeid@igalia.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240618030024.500532-1-andrealmeid@igalia.com> References: <20240618030024.500532-1-andrealmeid@igalia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Allow userspace to use explicit synchronization with atomic async flips. That means that the flip will wait for some hardware fence, and then will flip as soon as possible (async) in regard of the vblank. Signed-off-by: Andr=C3=A9 Almeida --- drivers/gpu/drm/drm_atomic_uapi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic= _uapi.c index 22bbb2d83e30..2e1d9391febe 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -1070,7 +1070,9 @@ int drm_atomic_set_property(struct drm_atomic_state *= state, break; } =20 - if (async_flip && prop !=3D config->prop_fb_id) { + if (async_flip && + prop !=3D config->prop_fb_id && + prop !=3D config->prop_in_fence_fd) { ret =3D drm_atomic_plane_get_property(plane, plane_state, prop, &old_val); ret =3D drm_atomic_check_prop_changes(ret, old_val, prop_value, prop); --=20 2.45.2