From nobody Thu Feb 12 05:12:09 2026 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9585719538E for ; Mon, 17 Jun 2024 10:53:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718621635; cv=none; b=bpo3Mbnps3YTngKA3vD4EXOBvtzolAWVnTiujEnS4spcDBCHT/AaxR2xqMfUjhkLQrV4iVsMzJJjqLdZMYIhRNjcOYU6b38/LXdreA2Hu4ZLvpcoF9aPp+HReRDxU0jV3QQ+ztgVnGVj7YBseTN9OzLiMo5kGLBwCffAt4F1ZMo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718621635; c=relaxed/simple; bh=aZ0WxDyAxXM6Vy3HQzN0PE+zEkRl66rR064Z6t+YzuY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AlQTjQqIKYa8Z1pahqcv3mDzCLIvg36DTPOVpYWkMiZeGkkrUYbQu7S1MnB50VtBB9X3PZ6xWI9/jYYRDMywwkVp1hyeQoCCXgfmMDCnO2+1hz10pYgjrBDAevOGZo5xhC+hux7HMJXiKVY/z07xp2pftp8AdWaa8nxexcVWW+w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=gFLLp7GE; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="gFLLp7GE" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45HArJi8082683; Mon, 17 Jun 2024 05:53:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1718621599; bh=+a/BEq/jotd7F7kcHNtW6KCfAyRRYr6msGCCq8I6qJM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gFLLp7GE+gxgwfogHALigcDMnGoslaQIK6v6hS39z04ZwM4wMY/iwopmx4gZorUNe c6tMTZ89yDm9U+CSt8v9r5OLa+IKw6DKEyvpniLvfASfHq4qYnk7wVDbbhMtKRKwBF ufh9pRt3hWFAdqXFiuTRXwvy1JUixFNe1z6+MYBM= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45HArJcM032611 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 17 Jun 2024 05:53:19 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 17 Jun 2024 05:53:19 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 17 Jun 2024 05:53:19 -0500 Received: from localhost (uda0496377.dhcp.ti.com [172.24.227.31]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45HArI7g015859; Mon, 17 Jun 2024 05:53:18 -0500 From: Aradhya Bhatia To: Dmitry Baryshkov , Tomi Valkeinen , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Jyri Sarha , Thomas Zimmermann , David Airlie , Daniel Vetter CC: DRI Development List , Linux Kernel List , Dominik Haller , Sam Ravnborg , Thierry Reding , Kieran Bingham , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra , Aradhya Bhatia Subject: [PATCH v3 04/10] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid() Date: Mon, 17 Jun 2024 16:23:05 +0530 Message-ID: <20240617105311.1587489-5-a-bhatia1@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240617105311.1587489-1-a-bhatia1@ti.com> References: <20240617105311.1587489-1-a-bhatia1@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Content-Type: text/plain; charset="utf-8" Allow the D-Phy config checks to use mode->clock instead of mode->crtc_clock during mode_valid checks, like everywhere else in the driver. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/d= rm/bridge/cadence/cdns-dsi-core.c index 371a3453970c..557b037bbc67 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -574,7 +574,7 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi, if (ret) return ret; =20 - phy_mipi_dphy_get_default_config(mode->crtc_clock * 1000, + phy_mipi_dphy_get_default_config((mode_valid_check ? mode->clock : mode->= crtc_clock) * 1000, mipi_dsi_pixel_format_to_bpp(output->dev->format), nlanes, phy_cfg); =20 --=20 2.34.1