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[24.150.219.207]) by smtp.gmail.com with ESMTPSA id af79cd13be357-798aaecc004sm432892285a.31.2024.06.17.06.50.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jun 2024 06:50:31 -0700 (PDT) From: Trevor Gamblin Date: Mon, 17 Jun 2024 09:50:02 -0400 Subject: [PATCH v3 22/41] iio: gyro: mpu3050-core: make use of regmap_clear_bits(), regmap_set_bits() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240617-review-v3-22-88d1338c4cca@baylibre.com> References: <20240617-review-v3-0-88d1338c4cca@baylibre.com> In-Reply-To: <20240617-review-v3-0-88d1338c4cca@baylibre.com> To: Jonathan Cameron , Lars-Peter Clausen , Dmitry Rokosov , Michael Hennerich , Cosmin Tanislav , Chen-Yu Tsai , Hans de Goede , Ray Jui , Scott Branden , Broadcom internal kernel review list , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Saravanan Sekar , Orson Zhai , Baolin Wang , Chunyan Zhang , Maxime Coquelin , Alexandre Torgue , =?utf-8?q?Nuno_S=C3=A1?= , Linus Walleij , Jean-Baptiste Maneyrol , Crt Mori Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Trevor Gamblin X-Mailer: b4 0.13.0 Instead of using regmap_update_bits() and passing the mask twice, use regmap_set_bits(). Instead of using regmap_update_bits() and passing val =3D 0, use regmap_clear_bits(). Suggested-by: Uwe Kleine-K=C3=B6nig Signed-off-by: Trevor Gamblin --- drivers/iio/gyro/mpu3050-core.c | 33 ++++++++++++--------------------- 1 file changed, 12 insertions(+), 21 deletions(-) diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-cor= e.c index a791ba3a693a..ff1c81553045 100644 --- a/drivers/iio/gyro/mpu3050-core.c +++ b/drivers/iio/gyro/mpu3050-core.c @@ -197,8 +197,8 @@ static int mpu3050_start_sampling(struct mpu3050 *mpu30= 50) int i; =20 /* Reset */ - ret =3D regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, - MPU3050_PWR_MGM_RESET, MPU3050_PWR_MGM_RESET); + ret =3D regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM, + MPU3050_PWR_MGM_RESET); if (ret) return ret; =20 @@ -513,12 +513,8 @@ static irqreturn_t mpu3050_trigger_handler(int irq, vo= id *p) "FIFO overflow! Emptying and resetting FIFO\n"); fifo_overflow =3D true; /* Reset and enable the FIFO */ - ret =3D regmap_update_bits(mpu3050->map, - MPU3050_USR_CTRL, - MPU3050_USR_CTRL_FIFO_EN | - MPU3050_USR_CTRL_FIFO_RST, - MPU3050_USR_CTRL_FIFO_EN | - MPU3050_USR_CTRL_FIFO_RST); + ret =3D regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL, + MPU3050_USR_CTRL_FIFO_EN | MPU3050_USR_CTRL_FIFO_RST); if (ret) { dev_info(mpu3050->dev, "error resetting FIFO\n"); goto out_trigger_unlock; @@ -799,10 +795,8 @@ static int mpu3050_hw_init(struct mpu3050 *mpu3050) u64 otp; =20 /* Reset */ - ret =3D regmap_update_bits(mpu3050->map, - MPU3050_PWR_MGM, - MPU3050_PWR_MGM_RESET, - MPU3050_PWR_MGM_RESET); + ret =3D regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM, + MPU3050_PWR_MGM_RESET); if (ret) return ret; =20 @@ -872,8 +866,8 @@ static int mpu3050_power_up(struct mpu3050 *mpu3050) msleep(200); =20 /* Take device out of sleep mode */ - ret =3D regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, - MPU3050_PWR_MGM_SLEEP, 0); + ret =3D regmap_clear_bits(mpu3050->map, MPU3050_PWR_MGM, + MPU3050_PWR_MGM_SLEEP); if (ret) { regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs); dev_err(mpu3050->dev, "error setting power mode\n"); @@ -895,8 +889,8 @@ static int mpu3050_power_down(struct mpu3050 *mpu3050) * then we would be wasting power unless we go to sleep mode * first. */ - ret =3D regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, - MPU3050_PWR_MGM_SLEEP, MPU3050_PWR_MGM_SLEEP); + ret =3D regmap_set_bits(mpu3050->map, MPU3050_PWR_MGM, + MPU3050_PWR_MGM_SLEEP); if (ret) dev_err(mpu3050->dev, "error putting to sleep\n"); =20 @@ -997,11 +991,8 @@ static int mpu3050_drdy_trigger_set_state(struct iio_t= rigger *trig, return ret; =20 /* Reset and enable the FIFO */ - ret =3D regmap_update_bits(mpu3050->map, MPU3050_USR_CTRL, - MPU3050_USR_CTRL_FIFO_EN | - MPU3050_USR_CTRL_FIFO_RST, - MPU3050_USR_CTRL_FIFO_EN | - MPU3050_USR_CTRL_FIFO_RST); + ret =3D regmap_set_bits(mpu3050->map, MPU3050_USR_CTRL, + MPU3050_USR_CTRL_FIFO_EN | MPU3050_USR_CTRL_FIFO_RST); if (ret) return ret; =20 --=20 2.45.2