From nobody Thu Dec 18 05:00:03 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3C7F17E915 for ; Sun, 16 Jun 2024 06:14:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718518480; cv=none; b=fBdWq9TG2IOt+aYjjN9Jj+3eeWD5crnBmV6gw2l8DTAIdIhCY064hlFNo68WqYotouMNwdZouiM99yml3O4+2MaCSE6KNz9jwh3c/D2pw7WnlTM3aQkIcmUUnF4EdK5L/HLuNfmUir5p8ecjPGnk+atICEzW6epAP/tcNbBtFp4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718518480; c=relaxed/simple; bh=aLGsugUEiksa0H2A/nbQKQsDAz1AlA/KrgpmQomaKhA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=i9YkEuuekH8trcklkG6+e4E90eZCiO8zprTJpwNXwrd35qNYrwCZPPsJEbaQD7sASWaLjBoZMG8oZHR21dTES2RMu/XQ5p+z9GqELO8VsKuMQeDtXiWFcyuri30RPw0SKcEn0YNg5E9LgpEGmQOg4Pe6ngGkhD/pDH6bt039tzE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ewYewHF0; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ewYewHF0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718518479; x=1750054479; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aLGsugUEiksa0H2A/nbQKQsDAz1AlA/KrgpmQomaKhA=; b=ewYewHF0gvaAwUr6r/pSU9NZYgTzMD3UF1BdXu73xlKgaZ23tkggeXpw HqfylR+Vui1RJKnGA5FpGM4Z/Epgq7aMoYfnBUNcRrq6PWs5ARCwKxUFN 0rlY4SFwrlwyMRvORgYACPTc9Uvi7QByG6bSlw9w8I0sPVxnyTyLpFggQ 6mjYBvKv/w0E3C7EHHH3A7xeXZscODkyp3uJGpZr8OGtkDRc14JfUd4p6 8RgFwRJd5tnGosEwQ/MQAS9/SwGvqZ9sY5+sPvc9dQ/a8Htt8yh5zZpED mXdl7H2Teehg0/Lpg5E3cMHP2iU84uB1rbw612fDT0cBajiUNmoSg7BJY Q==; X-CSE-ConnectionGUID: 4guazmKYTUuUcaeU6NsGaw== X-CSE-MsgGUID: FJrPmnMLQMGFaFbb2h4sTw== X-IronPort-AV: E=McAfee;i="6700,10204,11104"; a="18290044" X-IronPort-AV: E=Sophos;i="6.08,241,1712646000"; d="scan'208";a="18290044" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2024 23:14:38 -0700 X-CSE-ConnectionGUID: RFkxFeq6SjOpET29ZN9klg== X-CSE-MsgGUID: cnpjl7MWTFa4ZAXCiBli4g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,241,1712646000"; d="scan'208";a="40748175" Received: from unknown (HELO allen-box.sh.intel.com) ([10.239.159.127]) by fmviesa007.fm.intel.com with ESMTP; 15 Jun 2024 23:14:35 -0700 From: Lu Baolu To: Jason Gunthorpe , Kevin Tian , Joerg Roedel , Will Deacon , Robin Murphy , Jean-Philippe Brucker , Nicolin Chen , Yi Liu , Jacob Pan , Joel Granados Cc: iommu@lists.linux.dev, virtualization@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v7 05/10] iommufd: Add fault and response message definitions Date: Sun, 16 Jun 2024 14:11:50 +0800 Message-Id: <20240616061155.169343-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240616061155.169343-1-baolu.lu@linux.intel.com> References: <20240616061155.169343-1-baolu.lu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" iommu_hwpt_pgfaults represent fault messages that the userspace can retrieve. Multiple iommu_hwpt_pgfaults might be put in an iopf group, with the IOMMU_PGFAULT_FLAGS_LAST_PAGE flag set only for the last iommu_hwpt_pgfault. An iommu_hwpt_page_response is a response message that the userspace should send to the kernel after finishing handling a group of fault messages. The @dev_id, @pasid, and @grpid fields in the message identify an outstanding iopf group for a device. The @cookie field, which matches the cookie field of the last fault in the group, will be used by the kernel to look up the pending message. Signed-off-by: Lu Baolu --- include/uapi/linux/iommufd.h | 83 ++++++++++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h index 1dfeaa2e649e..4d89ed97b533 100644 --- a/include/uapi/linux/iommufd.h +++ b/include/uapi/linux/iommufd.h @@ -692,4 +692,87 @@ struct iommu_hwpt_invalidate { __u32 __reserved; }; #define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDAT= E) + +/** + * enum iommu_hwpt_pgfault_flags - flags for struct iommu_hwpt_pgfault + * @IOMMU_PGFAULT_FLAGS_PASID_VALID: The pasid field of the fault data is + * valid. + * @IOMMU_PGFAULT_FLAGS_LAST_PAGE: It's the last fault of a fault group. + */ +enum iommu_hwpt_pgfault_flags { + IOMMU_PGFAULT_FLAGS_PASID_VALID =3D (1 << 0), + IOMMU_PGFAULT_FLAGS_LAST_PAGE =3D (1 << 1), +}; + +/** + * enum iommu_hwpt_pgfault_perm - perm bits for struct iommu_hwpt_pgfault + * @IOMMU_PGFAULT_PERM_READ: request for read permission + * @IOMMU_PGFAULT_PERM_WRITE: request for write permission + * @IOMMU_PGFAULT_PERM_EXEC: (PCIE 10.4.1) request with a PASID that has t= he + * Execute Requested bit set in PASID TLP Prefix. + * @IOMMU_PGFAULT_PERM_PRIV: (PCIE 10.4.1) request with a PASID that has t= he + * Privileged Mode Requested bit set in PASID TLP + * Prefix. + */ +enum iommu_hwpt_pgfault_perm { + IOMMU_PGFAULT_PERM_READ =3D (1 << 0), + IOMMU_PGFAULT_PERM_WRITE =3D (1 << 1), + IOMMU_PGFAULT_PERM_EXEC =3D (1 << 2), + IOMMU_PGFAULT_PERM_PRIV =3D (1 << 3), +}; + +/** + * struct iommu_hwpt_pgfault - iommu page fault data + * @flags: Combination of enum iommu_hwpt_pgfault_flags + * @dev_id: id of the originated device + * @pasid: Process Address Space ID + * @grpid: Page Request Group Index + * @perm: Combination of enum iommu_hwpt_pgfault_perm + * @addr: Fault address + * @length: a hint of how much data the requestor is expecting to fetch. F= or + * example, if the PRI initiator knows it is going to do a 10MB + * transfer, it could fill in 10MB and the OS could pre-fault in + * 10MB of IOVA. It's default to 0 if there's no such hint. + * @cookie: kernel-managed cookie identifying a group of fault messages. T= he + * cookie number encoded in the last page fault of the group shou= ld + * be echoed back in the response message. + */ +struct iommu_hwpt_pgfault { + __u32 flags; + __u32 dev_id; + __u32 pasid; + __u32 grpid; + __u32 perm; + __u64 addr; + __u32 length; + __u32 cookie; +}; + +/** + * enum iommufd_page_response_code - Return status of fault handlers + * @IOMMUFD_PAGE_RESP_SUCCESS: Fault has been handled and the page tables + * populated, retry the access. This is the + * "Success" defined in PCI 10.4.2.1. + * @IOMMUFD_PAGE_RESP_INVALID: Could not handle this fault, don't retry the + * access. This is the "Invalid Request" in PCI + * 10.4.2.1. + * @IOMMUFD_PAGE_RESP_FAILURE: General error. Drop all subsequent faults f= rom + * this device if possible. This is the "Respo= nse + * Failure" in PCI 10.4.2.1. + */ +enum iommufd_page_response_code { + IOMMUFD_PAGE_RESP_SUCCESS =3D 0, + IOMMUFD_PAGE_RESP_INVALID, + IOMMUFD_PAGE_RESP_FAILURE, +}; + +/** + * struct iommu_hwpt_page_response - IOMMU page fault response + * @cookie: The kernel-managed cookie reported in the fault message. + * @code: One of response code in enum iommufd_page_response_code. + */ +struct iommu_hwpt_page_response { + __u32 cookie; + __u32 code; +}; #endif --=20 2.34.1